/external/llvm/test/MC/ARM/ |
D | neon-mul-encoding.s | 3 vmul.i8 d16, d16, d17 4 vmul.i16 d16, d16, d17 5 vmul.i32 d16, d16, d17 6 vmul.f32 d16, d16, d17 7 vmul.i8 q8, q8, q9 8 vmul.i16 q8, q8, q9 9 vmul.i32 q8, q8, q9 10 vmul.f32 q8, q8, q9 11 vmul.p8 d16, d16, d17 12 vmul.p8 q8, q8, q9 [all …]
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D | neont2-mul-encoding.s | 5 vmul.i8 d16, d16, d17 6 vmul.i16 d16, d16, d17 7 vmul.i32 d16, d16, d17 8 vmul.f32 d16, d16, d17 9 vmul.i8 q8, q8, q9 10 vmul.i16 q8, q8, q9 11 vmul.i32 q8, q8, q9 12 vmul.f32 q8, q8, q9 13 vmul.p8 d16, d16, d17 14 vmul.p8 q8, q8, q9 [all …]
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D | simple-fp-encoding.s | 21 @ CHECK: vmul.f64 d16, d17, d16 @ encoding: [0xa0,0x0b,0x61,0xee] 22 vmul.f64 d16, d17, d16 24 @ CHECK: vmul.f64 d20, d20, d17 @ encoding: [0xa1,0x4b,0x64,0xee] 25 vmul.f64 d20, d17 27 @ CHECK: vmul.f32 s0, s1, s0 @ encoding: [0x80,0x0a,0x20,0xee] 28 vmul.f32 s0, s1, s0 30 @ CHECK: vmul.f32 s11, s11, s21 @ encoding: [0xaa,0x5a,0x65,0xee] 31 vmul.f32 s11, s21
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/external/llvm/test/CodeGen/ARM/ |
D | fmacs.ll | 16 ; A8: vmul.f32 32 ; A8: vmul.f64 48 ; A8: vmul.f32 60 ; A8: vmul.f32 61 ; A8: vmul.f32 85 ; A8: vmul.f32 86 ; A8: vmul.f32 92 ; A9: vmul.f32 97 ; HARD: vmul.f32 s0, s2, s3
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D | fmuls.ll | 13 ; VFP2: vmul.f32 s0, s1, s0 16 ; NFP1: vmul.f32 d0, d1, d0 18 ; NFP0: vmul.f32 s0, s1, s0 21 ; CORTEXA8: vmul.f32 d0, d1, d0 23 ; CORTEXA9: vmul.f32 s{{.}}, s{{.}}, s{{.}}
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D | vdiv_combine.ll | 11 ; CHECK-NOT: {{vdiv|vmul}} 27 ; CHECK-NOT: {{vdiv|vmul}} 41 ; CHECK: {{vdiv|vmul}} 55 ; CHECK: {{vdiv|vmul}} 69 ; CHECK-NOT: {{vdiv|vmul}} 83 ; CHECK-NOT: {{vdiv|vmul}}
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D | vcvt_combine.ll | 7 ; CHECK-NOT: vmul 23 ; CHECK-NOT: vmul 39 ; CHECK: vmul 53 ; CHECK: vmul 67 ; CHECK-NOT: vmul 81 ; CHECK-NOT: vmul
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D | vmul.ll | 5 ;CHECK: vmul.i8 14 ;CHECK: vmul.i16 23 ;CHECK: vmul.i32 32 ;CHECK: vmul.f32 41 ;CHECK: vmul.p8 50 ;CHECK: vmul.i8 59 ;CHECK: vmul.i16 68 ;CHECK: vmul.i32 77 ;CHECK: vmul.f32 86 ;CHECK: vmul.p8 [all …]
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D | arm-modifier.ll | 11 …call void asm sideeffect "vmul.f32 q0, q0, ${0:y} \0A\09vmul.f32 q1, q1, ${0:y} \0A\09vmul.f…
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D | fnmacs.ll | 14 ; A8: vmul.f32 30 ; A8: vmul.f64
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D | fmscs.ll | 14 ; A8: vmul.f32 30 ; A8: vmul.f64
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D | fparith.ll | 21 ;CHECK: vmul.f32 29 ;CHECK: vmul.f64
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D | fnmul.ll | 2 ; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 -enable-sign-dependent-rounding-fp-math | grep vmul.f64
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D | vector-extend-narrow.ll | 55 ; CHECK: vmul
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D | reg_sequence.ll | 50 ; CHECK: vmul.i16 52 ; CHECK: vmul.i16 78 ; CHECK: vmul.i8 276 ; CHECK: vmul.f32 q8, q8, d[[DREG:[0-1]+]]
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/external/llvm/test/CodeGen/Thumb2/ |
D | cortex-fp.ll | 10 ; CORTEXM4: vmul.f32 s0, s1, s0 11 ; CORTEXA8: vmul.f32 d0, d1, d0 22 ; CORTEXA8: vmul.f64 d16, d17, d16
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/external/freetype/src/smooth/ |
D | ftsmooth.c | 115 FT_Int vmul = mode == FT_RENDER_MODE_LCD_V; in ft_smooth_render_generic() local 189 if ( vmul ) in ft_smooth_render_generic() 212 if ( vmul ) in ft_smooth_render_generic() 267 if ( vmul ) in ft_smooth_render_generic() 286 if ( vmul ) in ft_smooth_render_generic() 326 if ( vmul ) in ft_smooth_render_generic()
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/external/libvpx/vp8/decoder/arm/neon/ |
D | dequantizeb_neon.asm | 25 vmul.i16 q4, q0, q2 26 vmul.i16 q5, q1, q3
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D | idct_dequant_dc_full_2x_neon.asm | 50 vmul.i16 q2, q2, q0 51 vmul.i16 q3, q3, q1 52 vmul.i16 q4, q4, q0 53 vmul.i16 q5, q5, q1
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D | idct_dequant_full_2x_neon.asm | 46 vmul.i16 q2, q2, q0 47 vmul.i16 q3, q3, q1 48 vmul.i16 q4, q4, q0 49 vmul.i16 q5, q5, q1
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D | dequant_idct_neon.asm | 40 vmul.i16 q1, q3, q5 ;input for short_idct4x4llm_neon 41 vmul.i16 q2, q4, q6
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/external/compiler-rt/lib/arm/ |
D | mulsf3vfp.S | 23 vmul.f32 s13, s14, s15
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D | muldf3vfp.S | 23 vmul.f64 d6, d6, d7
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/external/llvm/test/MC/Disassembler/ARM/ |
D | fp-encoding.txt | 22 # CHECK: vmul.f64 d16, d17, d16 25 # CHECK: vmul.f32 s0, s1, s0
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D | neon-tests.txt | 39 # CHECK: vmul.f32 d0, d0, d6
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