| /external/webkit/Source/JavaScriptCore/dfg/ |
| D | DFGByteCodeParser.cpp | 130 getNode = addToGraph(GetLocal, OpInfo(operand)); in getVariable()
137 m_variables[operand].set = addToGraph(SetLocal, OpInfo(operand), value); in setVariable()
172 getNode = addToGraph(GetLocal, OpInfo(operand)); in getArgument()
182 m_arguments[argument].set = addToGraph(SetLocal, OpInfo(operand), value); in setArgument()
286 NodeIndex resultIndex = addToGraph(Int32Constant, OpInfo(constant)); in getInt32Constant()
296 NodeIndex resultIndex = addToGraph(DoubleConstant, OpInfo(constant)); in getDoubleConstant()
307 NodeIndex resultIndex = addToGraph(JSConstant, OpInfo(constant)); in getJSConstant()
441 …NodeIndex addToGraph(NodeType op, OpInfo info, NodeIndex child1 = NoNode, NodeIndex child2 = NoNod… in addToGraph()
450 …NodeIndex addToGraph(NodeType op, OpInfo info1, OpInfo info2, NodeIndex child1 = NoNode, NodeIndex… in addToGraph()
550 addToGraph(Jump, OpInfo(m_currentIndex)); in parseBlock()
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| D | DFGNode.h | 164 struct OpInfo { struct
165 explicit OpInfo(unsigned value) : m_value(value) {} in OpInfo() function
186 …Node(NodeType op, ExceptionInfo exceptionInfo, OpInfo imm, NodeIndex child1 = NoNode, NodeIndex ch… argument
199 …Node(NodeType op, ExceptionInfo exceptionInfo, OpInfo imm1, OpInfo imm2, NodeIndex child1 = NoNode…
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| /external/llvm/include/llvm/MC/ |
| D | MCInstrDesc.h | 145 const MCOperandInfo *OpInfo; // 'NumOperands' entries about operands variable
152 (OpInfo[OpNum].Constraints & (1 << Constraint))) { in getOperandConstraint()
154 return (int)(OpInfo[OpNum].Constraints >> Pos) & 0xf; in getOperandConstraint()
533 if (OpInfo[i].isPredicate()) in findFirstPredOperandIdx()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 2889 AsmOperandInfo &OpInfo = ConstraintOperands.back(); in ParseConstraints() local
2892 if (OpInfo.multipleAlternatives.size() > maCount) in ParseConstraints()
2893 maCount = OpInfo.multipleAlternatives.size(); in ParseConstraints()
2895 OpInfo.ConstraintVT = MVT::Other; in ParseConstraints()
2898 switch (OpInfo.Type) { in ParseConstraints()
2901 if (OpInfo.isIndirect) { in ParseConstraints()
2902 OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++)); in ParseConstraints()
2911 OpInfo.ConstraintVT = getValueType(STy->getElementType(ResNo)); in ParseConstraints()
2914 OpInfo.ConstraintVT = getValueType(CS.getType()); in ParseConstraints()
2919 OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++)); in ParseConstraints()
[all …]
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| D | SelectionDAGBuilder.cpp | 5814 SDISelAsmOperandInfo &OpInfo) { in GetRegistersForValue() argument
5823 TLI.getRegForInlineAsmConstraint(OpInfo.ConstraintCode, in GetRegistersForValue()
5824 OpInfo.ConstraintVT); in GetRegistersForValue()
5827 if (OpInfo.ConstraintVT != MVT::Other) { in GetRegistersForValue()
5831 if (OpInfo.Type == InlineAsm::isInput && in GetRegistersForValue()
5832 PhysReg.second && !PhysReg.second->hasType(OpInfo.ConstraintVT)) { in GetRegistersForValue()
5837 if (RegVT.getSizeInBits() == OpInfo.ConstraintVT.getSizeInBits()) { in GetRegistersForValue()
5838 OpInfo.CallOperand = DAG.getNode(ISD::BITCAST, DL, in GetRegistersForValue()
5839 RegVT, OpInfo.CallOperand); in GetRegistersForValue()
5840 OpInfo.ConstraintVT = RegVT; in GetRegistersForValue()
[all …]
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| D | InstrEmitter.cpp | 220 if (II.OpInfo[i].isOptionalDef()) { in CreateVirtualRegisters()
307 MCID.OpInfo[IIOpNum].isOptionalDef(); in AddRegisterOperand()
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| /external/llvm/lib/Target/ |
| D | TargetInstrInfo.cpp | 40 short RegClass = MCID.OpInfo[OpNum].RegClass; in getRegClass()
41 if (MCID.OpInfo[OpNum].isLookupPtrRegClass()) in getRegClass()
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| /external/llvm/utils/TableGen/ |
| D | AsmWriterInst.cpp | 202 CGIOperandList::OperandInfo OpInfo = CGI.Operands[OpNo]; in AsmWriterInst() local
204 unsigned MIOp = OpInfo.MIOperandNo; in AsmWriterInst()
205 Operands.push_back(AsmWriterOperand(OpInfo.PrinterMethodName, in AsmWriterInst()
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| D | AsmMatcherEmitter.cpp | 1563 const CGIOperandList::OperandInfo &OpInfo = ResultInst->Operands[i]; in buildInstructionResultOperands() local
1566 int TiedOp = OpInfo.getTiedRegister(); in buildInstructionResultOperands()
1573 int SrcOperand = findAsmOperandNamed(OpInfo.Name); in buildInstructionResultOperands()
1574 if (OpInfo.Name.empty() || SrcOperand == -1) in buildInstructionResultOperands()
1576 TheDef->getName() + "' has operand '" + OpInfo.Name + in buildInstructionResultOperands()
1580 unsigned NumOperands = OpInfo.MINumOperands; in buildInstructionResultOperands()
1589 AsmOperands[SrcOperand+AI].SrcOpName == OpInfo.Name && in buildInstructionResultOperands()
1605 const CGIOperandList::OperandInfo *OpInfo = &ResultInst->Operands[i]; in buildAliasResultOperands() local
1608 int TiedOp = OpInfo->getTiedRegister(); in buildAliasResultOperands()
1615 const std::string &OpName = OpInfo->Name; in buildAliasResultOperands()
[all …]
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| D | FixedLenDecoderEmitter.cpp | 458 const OperandInfo &OpInfo) const;
1062 const OperandInfo &OpInfo) const { in emitBinaryParser()
1063 const std::string &Decoder = OpInfo.Decoder; in emitBinaryParser()
1065 if (OpInfo.numFields() == 1) { in emitBinaryParser()
1066 OperandInfo::const_iterator OI = OpInfo.begin(); in emitBinaryParser()
1072 for (OperandInfo::const_iterator OI = OpInfo.begin(), OE = OpInfo.end(); in emitBinaryParser()
1777 OperandInfo OpInfo(Decoder); in populateInstruction() local
1792 OpInfo.addField(Base, Width, Offset); in populateInstruction()
1803 OpInfo.addField(Base, Width, Offset); in populateInstruction()
1816 OpInfo.addField(Base, Width, Offset); in populateInstruction()
[all …]
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| D | InstrInfoEmitter.cpp | 49 const OperandInfoMapTy &OpInfo,
299 const OperandInfoMapTy &OpInfo, in emitRecord() argument
376 OS << "OperandInfo" << OpInfo.find(OperandInfo)->second; in emitRecord()
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| D | CodeGenDAGPatterns.cpp | 2397 const SDNodeInfo &OpInfo = CDP.getSDNodeInfo(N1->getOperator()); in IsNodeBitcast() local
2398 if (OpInfo.getNumResults() != 1 || OpInfo.getNumOperands() != 1) in IsNodeBitcast()
2400 return OpInfo.getEnumName() == "ISD::BITCAST"; in IsNodeBitcast()
2430 const SDNodeInfo &OpInfo = CDP.getSDNodeInfo(N->getOperator()); in AnalyzeNode() local
2433 if (OpInfo.hasProperty(SDNPMayStore)) mayStore = true; in AnalyzeNode()
2434 if (OpInfo.hasProperty(SDNPMayLoad)) mayLoad = true; in AnalyzeNode()
2435 if (OpInfo.hasProperty(SDNPSideEffect)) hasSideEffects = true; in AnalyzeNode()
2436 if (OpInfo.hasProperty(SDNPVariadic)) isVariadic = true; in AnalyzeNode()
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| /external/llvm/include/llvm/Bitcode/ |
| D | BitCodes.h | 180 void Add(const BitCodeAbbrevOp &OpInfo) {
181 OperandList.push_back(OpInfo);
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| /external/llvm/lib/Transforms/Utils/ |
| D | AddrModeMatcher.cpp | 387 TargetLowering::AsmOperandInfo &OpInfo = TargetConstraints[i]; in IsOperandAMemoryOperand() local
390 TLI.ComputeConstraintToUse(OpInfo, SDValue()); in IsOperandAMemoryOperand()
394 if (OpInfo.CallOperandVal == OpVal && in IsOperandAMemoryOperand()
395 (OpInfo.ConstraintType != TargetLowering::C_Memory || in IsOperandAMemoryOperand()
396 !OpInfo.isIndirect)) in IsOperandAMemoryOperand()
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| /external/clang/lib/CodeGen/ |
| D | CGExprComplex.cpp | 603 BinOpInfo OpInfo; in EmitCompoundAssignLValue() local
608 OpInfo.Ty = E->getComputationResultType(); in EmitCompoundAssignLValue()
611 assert(OpInfo.Ty->isAnyComplexType()); in EmitCompoundAssignLValue()
612 assert(CGF.getContext().hasSameUnqualifiedType(OpInfo.Ty, in EmitCompoundAssignLValue()
614 OpInfo.RHS = Visit(E->getRHS()); in EmitCompoundAssignLValue()
621 OpInfo.LHS = EmitComplexToComplexCast(LHSComplexPair, LHSTy, OpInfo.Ty); in EmitCompoundAssignLValue()
624 ComplexPairTy Result = (this->*Func)(OpInfo); in EmitCompoundAssignLValue()
627 Result = EmitComplexToComplexCast(Result, OpInfo.Ty, LHSTy); in EmitCompoundAssignLValue()
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| D | CGExprScalar.cpp | 1666 BinOpInfo OpInfo; in EmitCompoundAssignLValue() local
1680 OpInfo.RHS = Visit(E->getRHS()); in EmitCompoundAssignLValue()
1681 OpInfo.Ty = E->getComputationResultType(); in EmitCompoundAssignLValue()
1682 OpInfo.Opcode = E->getOpcode(); in EmitCompoundAssignLValue()
1683 OpInfo.E = E; in EmitCompoundAssignLValue()
1686 OpInfo.LHS = EmitLoadOfLValue(LHSLV); in EmitCompoundAssignLValue()
1696 atomicPHI = Builder.CreatePHI(OpInfo.LHS->getType(), 2); in EmitCompoundAssignLValue()
1697 atomicPHI->addIncoming(OpInfo.LHS, startBB); in EmitCompoundAssignLValue()
1698 OpInfo.LHS = atomicPHI; in EmitCompoundAssignLValue()
1701 OpInfo.LHS = EmitScalarConversion(OpInfo.LHS, LHSTy, in EmitCompoundAssignLValue()
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| /external/llvm/lib/MC/ |
| D | MCInstrAnalysis.cpp | 16 Info->get(Inst.getOpcode()).OpInfo[0].OperandType != MCOI::OPERAND_PCREL) in evaluateBranch()
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| /external/llvm/lib/Target/ARM/ |
| D | Thumb2SizeReduction.cpp | 686 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()) in ReduceTo2Addr()
688 if (SkipPred && MCID.OpInfo[i].isPredicate()) in ReduceTo2Addr()
717 if (MCID.OpInfo[i].isPredicate()) in ReduceToNarrow()
727 !MCID.OpInfo[i].isPredicate()) { in ReduceToNarrow()
777 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()) in ReduceToNarrow()
787 bool isPred = (i < NumOps && MCID.OpInfo[i].isPredicate()); in ReduceToNarrow()
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| D | ARMCodeEmitter.cpp | 1439 !MCID.OpInfo[OpIdx].isPredicate() && in emitMulFrmInstruction()
1440 !MCID.OpInfo[OpIdx].isOptionalDef()) in emitMulFrmInstruction()
1476 !MCID.OpInfo[OpIdx].isPredicate() && in emitExtendInstruction()
1477 !MCID.OpInfo[OpIdx].isOptionalDef()) in emitExtendInstruction()
1505 MCID.OpInfo[OpIdx].isPredicate() || in emitMiscArithInstruction()
1506 MCID.OpInfo[OpIdx].isOptionalDef()) { in emitMiscArithInstruction()
1726 MCID.OpInfo[OpIdx].isPredicate() || in emitVFPArithInstruction()
1727 MCID.OpInfo[OpIdx].isOptionalDef()) { in emitVFPArithInstruction()
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| /external/llvm/lib/Transforms/Scalar/ |
| D | CodeGenPrepare.cpp | 1031 TargetLowering::AsmOperandInfo &OpInfo = TargetConstraints[i]; in OptimizeInlineAsmInst() local
1034 TLI->ComputeConstraintToUse(OpInfo, SDValue()); in OptimizeInlineAsmInst()
1036 if (OpInfo.ConstraintType == TargetLowering::C_Memory && in OptimizeInlineAsmInst()
1037 OpInfo.isIndirect) { in OptimizeInlineAsmInst()
1040 } else if (OpInfo.Type == InlineAsm::isInput) in OptimizeInlineAsmInst()
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCTargetDesc.cpp | 218 if (Info->get(Inst.getOpcode()).OpInfo[0].OperandType!=MCOI::OPERAND_PCREL) in evaluateBranch()
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| /external/llvm/lib/CodeGen/ |
| D | ScheduleDAGInstrs.cpp | 269 UseMCID.OpInfo[RegUseIndex].isLookupPtrRegClass()) in addPhysRegDataDeps()
366 if (UseMCID.OpInfo[UseMOIdx].isLookupPtrRegClass()) in addPhysRegDeps()
378 UseMCID.OpInfo[UseMOIdx].isLookupPtrRegClass()) { in addPhysRegDeps()
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| D | MachineInstr.cpp | 1148 if (MCID.OpInfo[i].isPredicate()) in findFirstPredOperandIdx()
1288 if (MCID.OpInfo[i].isPredicate()) { in copyPredicates()
1626 const MCOperandInfo &MCOI = getDesc().OpInfo[i]; in print()
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| D | TargetInstrInfoImpl.cpp | 168 if (MCID.OpInfo[i].isPredicate()) { in PredicateInstruction()
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| /external/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 636 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo; in AddThumb1SBit() local
641 if (OpInfo[i].isOptionalDef() && OpInfo[i].RegClass == ARM::CCRRegClassID) { in AddThumb1SBit()
642 if (i > 0 && OpInfo[i-1].isPredicate()) continue; in AddThumb1SBit()
701 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo; in AddThumbPredicate() local
706 if (OpInfo[i].isPredicate()) { in AddThumbPredicate()
738 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo; in UpdateThumbVFPPredicate() local
742 if (OpInfo[i].isPredicate() ) { in UpdateThumbVFPPredicate()
|