| /external/llvm/lib/Target/CellSPU/ |
| D | SPUInstrBuilder.h | 36 return MIB.addImm(Offset).addFrameIndex(FI);
38 return MIB.addFrameIndex(FI).addImm(Offset);
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrBuilder.h | 36 return MIB.addImm(Offset).addFrameIndex(FI);
38 return MIB.addFrameIndex(FI).addImm(Offset);
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcInstrInfo.cpp | 122 .addFrameIndex(FrameIx).addImm(0).addImm(Offset).addMetadata(MDPtr); in emitFrameIndexDebugValue()
307 BuildMI(MBB, I, DL, get(SP::STri)).addFrameIndex(FI).addImm(0) in storeRegToStackSlot()
310 BuildMI(MBB, I, DL, get(SP::STFri)).addFrameIndex(FI).addImm(0) in storeRegToStackSlot()
313 BuildMI(MBB, I, DL, get(SP::STDFri)).addFrameIndex(FI).addImm(0) in storeRegToStackSlot()
328 BuildMI(MBB, I, DL, get(SP::LDri), DestReg).addFrameIndex(FI).addImm(0); in loadRegFromStackSlot()
330 BuildMI(MBB, I, DL, get(SP::LDFri), DestReg).addFrameIndex(FI).addImm(0); in loadRegFromStackSlot()
332 BuildMI(MBB, I, DL, get(SP::LDDFri), DestReg).addFrameIndex(FI).addImm(0); in loadRegFromStackSlot()
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| /external/llvm/lib/Target/MBlaze/ |
| D | MBlazeFrameLowering.cpp | 256 .addFrameIndex(FI).addImm(0); in interruptFrameLayout()
264 .addFrameIndex(R17FI).addImm(0); in interruptFrameLayout()
267 .addFrameIndex(R18FI).addImm(0); in interruptFrameLayout()
275 .addFrameIndex(MSRFI).addImm(0); in interruptFrameLayout()
278 .addFrameIndex(MSRFI).addImm(0); in interruptFrameLayout()
285 .addFrameIndex(R18FI).addImm(0); in interruptFrameLayout()
288 .addFrameIndex(R17FI).addImm(0); in interruptFrameLayout()
294 .addFrameIndex(VFI[--i]).addImm(0); in interruptFrameLayout()
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| D | MBlazeInstrInfo.cpp | 99 .addFrameIndex(FI).addImm(0); //.addFrameIndex(FI); in storeRegToStackSlot()
109 .addFrameIndex(FI).addImm(0); //.addFrameIndex(FI); in loadRegFromStackSlot()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430InstrInfo.cpp | 52 .addFrameIndex(FrameIdx).addImm(0) in storeRegToStackSlot()
56 .addFrameIndex(FrameIdx).addImm(0) in storeRegToStackSlot()
80 .addReg(DestReg).addFrameIndex(FrameIdx).addImm(0).addMemOperand(MMO); in loadRegFromStackSlot()
83 .addReg(DestReg).addFrameIndex(FrameIdx).addImm(0).addMemOperand(MMO); in loadRegFromStackSlot()
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| /external/llvm/lib/Target/ARM/ |
| D | Thumb1InstrInfo.cpp | 75 .addFrameIndex(FI).addImm(0).addMemOperand(MMO)); in storeRegToStackSlot()
102 .addFrameIndex(FI).addImm(0).addMemOperand(MMO)); in loadRegFromStackSlot()
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| D | ARMBaseInstrInfo.cpp | 776 .addFrameIndex(FI).addImm(0).addMemOperand(MMO)); in storeRegToStackSlot()
780 .addFrameIndex(FI).addImm(0).addMemOperand(MMO)); in storeRegToStackSlot()
788 .addFrameIndex(FI).addImm(0).addMemOperand(MMO)); in storeRegToStackSlot()
797 .addFrameIndex(FI).addImm(16) in storeRegToStackSlot()
803 .addFrameIndex(FI) in storeRegToStackSlot()
814 .addFrameIndex(FI).addImm(16) in storeRegToStackSlot()
820 .addFrameIndex(FI)) in storeRegToStackSlot()
835 .addFrameIndex(FI).addImm(16) in storeRegToStackSlot()
841 .addFrameIndex(FI)) in storeRegToStackSlot()
855 .addFrameIndex(FI)) in storeRegToStackSlot()
[all …]
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| D | Thumb2InstrInfo.cpp | 144 .addFrameIndex(FI).addImm(0).addMemOperand(MMO)); in storeRegToStackSlot()
170 .addFrameIndex(FI).addImm(0).addMemOperand(MMO)); in loadRegFromStackSlot()
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| D | Thumb1FrameLowering.cpp | 136 .addFrameIndex(FramePtrSpillFI).addImm(0) in emitPrologue()
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| D | ARMFrameLowering.cpp | 224 .addFrameIndex(FramePtrSpillFI).addImm(0) in emitPrologue()
913 .addFrameIndex(D8SpillFI).addImm(0))); in emitAlignedDPRCS2Restores()
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| D | ARMFastISel.cpp | 747 .addFrameIndex(SI->second) in TargetMaterializeAlloca()
932 .addFrameIndex(Addr.Base.FI) in ARMSimplifyAddress()
967 MIB.addFrameIndex(FI); in AddLoadStoreOperands()
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| D | ARMBaseRegisterInfo.cpp | 959 .addFrameIndex(FrameIdx).addImm(Offset)); in materializeFrameBaseRegister()
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| D | ARMISelLowering.cpp | 5838 .addFrameIndex(FI) in SetupEntryBlockForSjLj()
5869 .addFrameIndex(FI) in SetupEntryBlockForSjLj()
5892 .addFrameIndex(FI) in SetupEntryBlockForSjLj()
6001 .addFrameIndex(FI) in EmitSjLjDispatchBlock()
6053 .addFrameIndex(FI) in EmitSjLjDispatchBlock()
6126 .addFrameIndex(FI) in EmitSjLjDispatchBlock()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrBuilder.h | 130 MIB.addFrameIndex(AM.Base.FrameIndex); in addFullAddress()
162 return addOffset(MIB.addFrameIndex(FI), Offset)
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| D | X86ISelLowering.cpp | 12573 .addFrameIndex(RegSaveFrameIndex) in EmitVAStartSaveXMMRegsWithCustomInserter()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreInstrInfo.cpp | 372 .addFrameIndex(FrameIndex) in storeRegToStackSlot()
385 .addFrameIndex(FrameIndex) in loadRegFromStackSlot()
394 .addFrameIndex(FrameIx).addImm(0).addImm(Offset).addMetadata(MDPtr); in emitFrameIndexDebugValue()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 178 .addFrameIndex(FI).addImm(0).addMemOperand(MMO); in storeRegToStackSlot()
204 BuildMI(MBB, I, DL, get(Opc), DestReg).addFrameIndex(FI).addImm(0) in loadRegFromStackSlot()
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| D | MipsInstrInfo.cpp | 69 .addFrameIndex(FrameIx).addImm(0).addImm(Offset).addMetadata(MDPtr); in emitFrameIndexDebugValue()
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBuilder.h | 99 const MachineInstrBuilder &addFrameIndex(int Idx) const { in addFrameIndex() function
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfo.cpp | 371 .addFrameIndex(FI).addImm(0) in storeRegToStackSlot()
375 .addFrameIndex(FI).addImm(0) in storeRegToStackSlot()
379 .addFrameIndex(FI).addImm(0) in storeRegToStackSlot()
416 .addFrameIndex(FI).addImm(0).addMemOperand(MMO); in loadRegFromStackSlot()
419 .addFrameIndex(FI).addImm(0).addMemOperand(MMO); in loadRegFromStackSlot()
422 .addFrameIndex(FI).addImm(0).addMemOperand(MMO); in loadRegFromStackSlot()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 883 .addFrameIndex(FI->getIndex()); in EmitSpecialNode()
|