/external/llvm/lib/Target/X86/InstPrinter/ |
D | X86InstComments.cpp | 37 Src1Name = getRegName(MI->getOperand(0).getReg()); in EmitAnyX86InstComments() 38 Src2Name = getRegName(MI->getOperand(2).getReg()); in EmitAnyX86InstComments() 42 DestName = getRegName(MI->getOperand(0).getReg()); in EmitAnyX86InstComments() 43 Src1Name = getRegName(MI->getOperand(1).getReg()); in EmitAnyX86InstComments() 44 Src2Name = getRegName(MI->getOperand(2).getReg()); in EmitAnyX86InstComments() 49 Src2Name = getRegName(MI->getOperand(2).getReg()); in EmitAnyX86InstComments() 50 Src1Name = getRegName(MI->getOperand(0).getReg()); in EmitAnyX86InstComments() 54 Src2Name = getRegName(MI->getOperand(2).getReg()); in EmitAnyX86InstComments() 55 Src1Name = getRegName(MI->getOperand(1).getReg()); in EmitAnyX86InstComments() 56 DestName = getRegName(MI->getOperand(0).getReg()); in EmitAnyX86InstComments() [all …]
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D | X86ATTInstPrinter.cpp | 122 O << '%' << getRegisterName(Op.getReg()); in printOperand() 144 if (SegReg.getReg()) { in printMemReference() 151 if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg())) in printMemReference() 158 if (IndexReg.getReg() || BaseReg.getReg()) { in printMemReference() 160 if (BaseReg.getReg()) in printMemReference() 163 if (IndexReg.getReg()) { in printMemReference()
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/external/llvm/lib/Target/ARM/InstPrinter/ |
D | ARMInstPrinter.cpp | 88 O << '\t' << getRegisterName(Dst.getReg()) in printInst() 89 << ", " << getRegisterName(MO1.getReg()); in printInst() 91 O << ", " << getRegisterName(MO2.getReg()); in printInst() 107 O << '\t' << getRegisterName(Dst.getReg()) in printInst() 108 << ", " << getRegisterName(MO1.getReg()); in printInst() 123 MI->getOperand(0).getReg() == ARM::SP && in printInst() 135 if (Opcode == ARM::STR_PRE_IMM && MI->getOperand(2).getReg() == ARM::SP && in printInst() 139 O << "\t{" << getRegisterName(MI->getOperand(1).getReg()) << "}"; in printInst() 146 MI->getOperand(0).getReg() == ARM::SP && in printInst() 158 if (Opcode == ARM::LDR_POST_IMM && MI->getOperand(2).getReg() == ARM::SP && in printInst() [all …]
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonSplitTFRCondSets.cpp | 89 int DestReg = MI->getOperand(0).getReg(); in runOnMachineFunction() 90 int SrcReg1 = MI->getOperand(2).getReg(); in runOnMachineFunction() 91 int SrcReg2 = MI->getOperand(3).getReg(); in runOnMachineFunction() 107 DestReg).addReg(MI->getOperand(1).getReg()).addReg(SrcReg1); in runOnMachineFunction() 111 DestReg).addReg(MI->getOperand(1).getReg()).addReg(SrcReg2); in runOnMachineFunction() 119 int DestReg = MI->getOperand(0).getReg(); in runOnMachineFunction() 120 int SrcReg1 = MI->getOperand(2).getReg(); in runOnMachineFunction() 127 addReg(MI->getOperand(1).getReg()).addReg(SrcReg1); in runOnMachineFunction() 132 addReg(MI->getOperand(1).getReg()). in runOnMachineFunction() 137 addReg(MI->getOperand(1).getReg()). in runOnMachineFunction() [all …]
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D | HexagonPeephole.cpp | 133 unsigned DstReg = Dst.getReg(); in runOnMachineFunction() 134 unsigned SrcReg = Src.getReg(); in runOnMachineFunction() 157 unsigned DstReg = Dst.getReg(); in runOnMachineFunction() 158 unsigned SrcReg = Src1.getReg(); in runOnMachineFunction() 169 unsigned DstReg = Dst.getReg(); in runOnMachineFunction() 170 unsigned SrcReg = Src.getReg(); in runOnMachineFunction() 192 unsigned DstReg = Dst.getReg(); in runOnMachineFunction() 193 unsigned SrcReg = Src.getReg(); in runOnMachineFunction() 225 unsigned Reg0 = Op0.getReg(); in runOnMachineFunction() 270 unsigned PSrc = MI->getOperand(PR).getReg(); in runOnMachineFunction() [all …]
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/external/dexmaker/src/dx/java/com/android/dx/dex/code/form/ |
D | Form23x.java | 71 unsignedFitsInByte(regs.get(0).getReg()) && in isCompatible() 72 unsignedFitsInByte(regs.get(1).getReg()) && in isCompatible() 73 unsignedFitsInByte(regs.get(2).getReg()); in isCompatible() 82 bits.set(0, unsignedFitsInByte(regs.get(0).getReg())); in compatibleRegs() 83 bits.set(1, unsignedFitsInByte(regs.get(1).getReg())); in compatibleRegs() 84 bits.set(2, unsignedFitsInByte(regs.get(2).getReg())); in compatibleRegs() 93 opcodeUnit(insn, regs.get(0).getReg()), in writeTo() 94 codeUnit(regs.get(1).getReg(), regs.get(2).getReg())); in writeTo()
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D | Form33x.java | 75 unsignedFitsInByte(regs.get(0).getReg()) && in isCompatible() 76 unsignedFitsInByte(regs.get(1).getReg()) && in isCompatible() 77 unsignedFitsInShort(regs.get(2).getReg()); in isCompatible() 86 bits.set(0, unsignedFitsInByte(regs.get(0).getReg())); in compatibleRegs() 87 bits.set(1, unsignedFitsInByte(regs.get(1).getReg())); in compatibleRegs() 88 bits.set(2, unsignedFitsInShort(regs.get(2).getReg())); in compatibleRegs() 98 codeUnit(regs.get(0).getReg(), regs.get(1).getReg()), in writeTo() 99 (short) regs.get(2).getReg()); in writeTo()
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D | Form12x.java | 97 if (rs1.getReg() != regs.get(0).getReg()) { in isCompatible() 107 return unsignedFitsInNibble(rs1.getReg()) && in isCompatible() 108 unsignedFitsInNibble(rs2.getReg()); in isCompatible() 117 bits.set(0, unsignedFitsInNibble(regs.get(0).getReg())); in compatibleRegs() 118 bits.set(1, unsignedFitsInNibble(regs.get(1).getReg())); in compatibleRegs() 135 makeByte(regs.get(sz - 2).getReg(), in writeTo() 136 regs.get(sz - 1).getReg()))); in writeTo()
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D | Form41c.java | 95 if (reg.getReg() != regs.get(1).getReg()) { in isCompatible() 105 if (!unsignedFitsInShort(reg.getReg())) { in isCompatible() 122 boolean compat = unsignedFitsInByte(regs.get(0).getReg()); in compatibleRegs() 127 if (regs.get(0).getReg() == regs.get(1).getReg()) { in compatibleRegs() 142 write(out, opcodeUnit(insn), cpi, (short) regs.get(0).getReg()); in writeTo()
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D | Form22x.java | 70 unsignedFitsInByte(regs.get(0).getReg()) && in isCompatible() 71 unsignedFitsInShort(regs.get(1).getReg()); in isCompatible() 80 bits.set(0, unsignedFitsInByte(regs.get(0).getReg())); in compatibleRegs() 81 bits.set(1, unsignedFitsInShort(regs.get(1).getReg())); in compatibleRegs() 90 opcodeUnit(insn, regs.get(0).getReg()), in writeTo() 91 (short) regs.get(1).getReg()); in writeTo()
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D | Form32x.java | 69 unsignedFitsInShort(regs.get(0).getReg()) && in isCompatible() 70 unsignedFitsInShort(regs.get(1).getReg()); in isCompatible() 79 bits.set(0, unsignedFitsInShort(regs.get(0).getReg())); in compatibleRegs() 80 bits.set(1, unsignedFitsInShort(regs.get(1).getReg())); in compatibleRegs() 91 (short) regs.get(0).getReg(), in writeTo() 92 (short) regs.get(1).getReg()); in writeTo()
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D | Form31c.java | 92 if (reg.getReg() != regs.get(1).getReg()) { in isCompatible() 102 if (!unsignedFitsInByte(reg.getReg())) { in isCompatible() 120 boolean compat = unsignedFitsInByte(regs.get(0).getReg()); in compatibleRegs() 125 if (regs.get(0).getReg() == regs.get(1).getReg()) { in compatibleRegs() 140 write(out, opcodeUnit(insn, regs.get(0).getReg()), cpi); in writeTo()
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D | Form21c.java | 92 if (reg.getReg() != regs.get(1).getReg()) { in isCompatible() 102 if (!unsignedFitsInByte(reg.getReg())) { in isCompatible() 125 boolean compat = unsignedFitsInByte(regs.get(0).getReg()); in compatibleRegs() 130 if (regs.get(0).getReg() == regs.get(1).getReg()) { in compatibleRegs() 146 opcodeUnit(insn, regs.get(0).getReg()), in writeTo()
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D | Form22t.java | 70 unsignedFitsInNibble(regs.get(0).getReg()) && in isCompatible() 71 unsignedFitsInNibble(regs.get(1).getReg()))) { in isCompatible() 85 bits.set(0, unsignedFitsInNibble(regs.get(0).getReg())); in compatibleRegs() 86 bits.set(1, unsignedFitsInNibble(regs.get(1).getReg())); in compatibleRegs() 107 makeByte(regs.get(0).getReg(), regs.get(1).getReg())), in writeTo()
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D | Form35c.java | 113 bits.set(i, unsignedFitsInNibble(reg.getReg() + in compatibleRegs() 126 int r0 = (sz > 0) ? regs.get(0).getReg() : 0; in writeTo() 127 int r1 = (sz > 1) ? regs.get(1).getReg() : 0; in writeTo() 128 int r2 = (sz > 2) ? regs.get(2).getReg() : 0; in writeTo() 129 int r3 = (sz > 3) ? regs.get(3).getReg() : 0; in writeTo() 130 int r4 = (sz > 4) ? regs.get(4).getReg() : 0; in writeTo() 168 if (!unsignedFitsInNibble(one.getReg() + one.getCategory() - 1)) { in wordCount() 201 RegisterSpec.make(one.getReg() + 1, Type.VOID)); in explicitize()
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D | Form22c.java | 76 unsignedFitsInNibble(regs.get(0).getReg()) && in isCompatible() 77 unsignedFitsInNibble(regs.get(1).getReg()))) { in isCompatible() 99 bits.set(0, unsignedFitsInNibble(regs.get(0).getReg())); in compatibleRegs() 100 bits.set(1, unsignedFitsInNibble(regs.get(1).getReg())); in compatibleRegs() 112 makeByte(regs.get(0).getReg(), regs.get(1).getReg())), in writeTo()
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D | Form52c.java | 80 unsignedFitsInShort(regs.get(0).getReg()) && in isCompatible() 81 unsignedFitsInShort(regs.get(1).getReg()))) { in isCompatible() 98 bits.set(0, unsignedFitsInShort(regs.get(0).getReg())); in compatibleRegs() 99 bits.set(1, unsignedFitsInShort(regs.get(1).getReg())); in compatibleRegs() 112 (short) regs.get(0).getReg(), in writeTo() 113 (short) regs.get(1).getReg()); in writeTo()
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D | Form22b.java | 74 unsignedFitsInByte(regs.get(0).getReg()) && in isCompatible() 75 unsignedFitsInByte(regs.get(1).getReg()))) { in isCompatible() 97 bits.set(0, unsignedFitsInByte(regs.get(0).getReg())); in compatibleRegs() 98 bits.set(1, unsignedFitsInByte(regs.get(1).getReg())); in compatibleRegs() 110 opcodeUnit(insn, regs.get(0).getReg()), in writeTo() 111 codeUnit(regs.get(1).getReg(), value & 0xff)); in writeTo()
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D | Form22s.java | 74 unsignedFitsInNibble(regs.get(0).getReg()) && in isCompatible() 75 unsignedFitsInNibble(regs.get(1).getReg()))) { in isCompatible() 97 bits.set(0, unsignedFitsInNibble(regs.get(0).getReg())); in compatibleRegs() 98 bits.set(1, unsignedFitsInNibble(regs.get(1).getReg())); in compatibleRegs() 111 makeByte(regs.get(0).getReg(), regs.get(1).getReg())), in writeTo()
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D | Form32s.java | 78 unsignedFitsInByte(regs.get(0).getReg()) && in isCompatible() 79 unsignedFitsInByte(regs.get(1).getReg()))) { in isCompatible() 101 bits.set(0, unsignedFitsInByte(regs.get(0).getReg())); in compatibleRegs() 102 bits.set(1, unsignedFitsInByte(regs.get(1).getReg())); in compatibleRegs() 115 codeUnit(regs.get(0).getReg(), regs.get(1).getReg()), in writeTo()
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/external/llvm/lib/Target/X86/MCTargetDesc/ |
D | X86MCCodeEmitter.cpp | 55 return X86_MC::getX86RegNum(MO.getReg()); in GetX86RegNum() 69 unsigned SrcReg = MI.getOperand(OpNum).getReg(); in getVEXRegisterEncoding() 169 if ((BaseReg.getReg() != 0 && in Is32BitMemOperand() 170 X86MCRegisterClasses[X86::GR32RegClassID].contains(BaseReg.getReg())) || in Is32BitMemOperand() 171 (IndexReg.getReg() != 0 && in Is32BitMemOperand() 172 X86MCRegisterClasses[X86::GR32RegClassID].contains(IndexReg.getReg()))) in Is32BitMemOperand() 184 if ((BaseReg.getReg() != 0 && in Is64BitMemOperand() 185 X86MCRegisterClasses[X86::GR64RegClassID].contains(BaseReg.getReg())) || in Is64BitMemOperand() 186 (IndexReg.getReg() != 0 && in Is64BitMemOperand() 187 X86MCRegisterClasses[X86::GR64RegClassID].contains(IndexReg.getReg()))) in Is64BitMemOperand() [all …]
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/external/llvm/lib/Target/X86/ |
D | X86CodeEmitter.cpp | 179 unsigned Reg = MO.getReg(); in determineREX() 481 unsigned BaseReg = Base.getReg(); in emitMemModRMByte() 486 assert(IndexReg.getReg() == 0 && Is64BitMode && in emitMemModRMByte() 507 IndexReg.getReg() == 0 && in emitMemModRMByte() 545 assert(IndexReg.getReg() != X86::ESP && in emitMemModRMByte() 546 IndexReg.getReg() != X86::RSP && "Cannot use ESP as index reg!"); in emitMemModRMByte() 579 if (IndexReg.getReg()) in emitMemModRMByte() 580 IndexRegNo = X86_MC::getX86RegNum(IndexReg.getReg()); in emitMemModRMByte() 587 if (IndexReg.getReg()) in emitMemModRMByte() 588 IndexRegNo = X86_MC::getX86RegNum(IndexReg.getReg()); in emitMemModRMByte() [all …]
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/external/dexmaker/src/dx/java/com/android/dx/ssa/ |
D | DeadCodeRemover.java | 108 useList[source.getReg()].remove(insnS); in run() 112 source.getReg()))) { in run() 117 worklist.set(source.getReg()); in run() 154 useList[source.getReg()].remove(insn); in pruneDeadInstructions() 160 for (SsaInsn use : useList[result.getReg()]) { in pruneDeadInstructions() 204 || !isCircularNoSideEffect(result.getReg(), set)) { in isCircularNoSideEffect() 252 noSideEffectRegs.set(insn.getResult().getReg()); in visitMoveInsn() 260 noSideEffectRegs.set(phi.getResult().getReg()); in visitPhiInsn() 268 noSideEffectRegs.set(result.getReg()); in visitNonMoveInsn()
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D | PhiInsn.java | 57 ropResultReg = resultReg.getReg(); in PhiInsn() 94 o.regSpec.getReg()).getResult(); in updateSourcesToDefinitions() 110 getResult().getReg(), type, local)); in changeResultType() 145 if (o.regSpec.getReg() == registerSpec.getReg()) { in removePhiRegister() 236 if (o.regSpec.getReg() == reg) { in isRegASource() 253 int firstReg = operands.get(0).regSpec.getReg(); in areAllOperandsEqual() 255 if (firstReg != o.regSpec.getReg()) { in areAllOperandsEqual() 300 if (o.regSpec.getReg() == reg) { in predBlocksForReg()
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/external/llvm/lib/CodeGen/ |
D | TwoAddressInstructionPass.cpp | 206 unsigned MOReg = MO.getReg(); in Sink3AddrInstruction() 210 UseRegs.insert(MO.getReg()); in Sink3AddrInstruction() 219 DefReg = MO.getReg(); in Sink3AddrInstruction() 264 unsigned MOReg = MO.getReg(); in Sink3AddrInstruction() 338 DstReg = MI.getOperand(0).getReg(); in isCopyToReg() 339 SrcReg = MI.getOperand(1).getReg(); in isCopyToReg() 341 DstReg = MI.getOperand(0).getReg(); in isCopyToReg() 342 SrcReg = MI.getOperand(2).getReg(); in isCopyToReg() 399 if (!MO.isReg() || !MO.isUse() || MO.getReg() != Reg) in isTwoAddrUse() 403 DstReg = MI.getOperand(ti).getReg(); in isTwoAddrUse() [all …]
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