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Searched refs:is64BitVector (Results 1 – 3 of 3) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DValueTypes.h179 bool is64BitVector() const { in is64BitVector() function
533 bool is64BitVector() const { in is64BitVector() function
534 return isSimple() ? V.is64BitVector() : isExtended64BitVector(); in is64BitVector()
/external/llvm/lib/Target/ARM/
DARMISelDAGToDAG.cpp279 SDValue GetVLDSTAlign(SDValue Align, unsigned NumVecs, bool is64BitVector);
1527 bool is64BitVector) { in GetVLDSTAlign() argument
1529 if (!is64BitVector && NumVecs < 3) in GetVLDSTAlign()
1605 bool is64BitVector = VT.is64BitVector(); in SelectVLD() local
1606 Align = GetVLDSTAlign(Align, NumVecs, is64BitVector); in SelectVLD()
1632 if (!is64BitVector) in SelectVLD()
1648 if (is64BitVector || NumVecs <= 2) { in SelectVLD()
1649 unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] : in SelectVLD()
1714 unsigned Sub0 = (is64BitVector ? ARM::dsub_0 : ARM::qsub_0); in SelectVLD()
1742 bool is64BitVector = VT.is64BitVector(); in SelectVST() local
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DARMISelLowering.cpp4015 if (VT.is64BitVector() && EltSz == 32) in isVUZPMask()
4042 if (VT.is64BitVector() && EltSz == 32) in isVUZP_v_undef_Mask()
4064 if (VT.is64BitVector() && EltSz == 32) in isVZIPMask()
4089 if (VT.is64BitVector() && EltSz == 32) in isVZIP_v_undef_Mask()
4438 (VT.is128BitVector() || VT.is64BitVector())) { in isShuffleMaskLegal()
4946 assert(Op0.getValueType().is64BitVector() && in LowerMUL()
4947 Op1.getValueType().is64BitVector() && in LowerMUL()
7497 if (VT.is64BitVector() || VT.is128BitVector()) in PerformMULCombine()
8311 if (!VT.is64BitVector()) in CombineVLDDUP()