| /external/llvm/lib/CodeGen/ |
| D | BasicTargetTransformInfo.cpp | 71 virtual bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
129 bool BasicTTI::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, in isLegalAddressingMode() argument
133 AM.BaseGV = BaseGV; in isLegalAddressingMode()
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| D | TargetLoweringBase.cpp | 1286 if (AM.BaseGV) in isLegalAddressingMode()
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| /external/llvm/lib/Analysis/ |
| D | TargetTransformInfo.cpp | 103 bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, in isLegalAddressingMode() argument
107 return PrevTTI->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, in isLegalAddressingMode()
451 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, in isLegalAddressingMode()
455 return !BaseGV && BaseOffset == 0 && Scale <= 1; in isLegalAddressingMode()
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| /external/llvm/lib/Transforms/Scalar/ |
| D | LoopStrengthReduce.cpp | 228 GlobalValue *BaseGV; member
253 : BaseGV(0), BaseOffset(0), HasBaseReg(false), Scale(0), ScaledReg(0), in Formula()
362 BaseGV ? BaseGV->getType() : in getType()
395 if (BaseGV) { in print()
397 WriteAsOperand(OS, BaseGV, /*PrintType=*/false); in print()
941 if (F.BaseGV) in RateFormula()
1284 Type *AccessTy, GlobalValue *BaseGV, int64_t BaseOffset, in isLegalUse() argument
1288 return TTI.isLegalAddressingMode(AccessTy, BaseGV, BaseOffset, HasBaseReg, Scale); in isLegalUse()
1296 if (BaseGV) in isLegalUse()
1326 return !BaseGV && Scale == 0 && BaseOffset == 0; in isLegalUse()
[all …]
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| D | CodeGenPrepare.cpp | 835 (BaseGV == O.BaseGV) && (BaseOffs == O.BaseOffs) && in operator ==()
848 if (BaseGV) { in print()
851 WriteAsOperand(OS, BaseGV, /*PrintType=*/false); in print()
1190 if (AddrMode.BaseGV == 0) { in MatchAddr()
1191 AddrMode.BaseGV = GV; in MatchAddr()
1194 AddrMode.BaseGV = 0; in MatchAddr()
1616 if (AddrMode.BaseGV) { in OptimizeMemoryInst()
1617 Value *V = Builder.CreatePtrToInt(AddrMode.BaseGV, IntPtrTy, "sunkaddr"); in OptimizeMemoryInst()
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| /external/llvm/include/llvm/Analysis/ |
| D | TargetTransformInfo.h | 224 virtual bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
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| /external/llvm/include/llvm/Target/ |
| D | TargetLowering.h | 1137 GlobalValue *BaseGV; member
1141 AddrMode() : BaseGV(0), BaseOffs(0), HasBaseReg(false), Scale(0) {} in AddrMode()
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 1341 if (AM.BaseGV) { in isLegalAddressingMode()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1616 if (AM.BaseGV) { in isLegalAddressingMode()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 1595 if (AM.BaseGV) { in isLegalAddressingMode()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 3285 if (AM.BaseGV) in isLegalAddressingMode()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 12570 if (!X86::isOffsetSuitableForCodeModel(AM.BaseOffs, M, AM.BaseGV != NULL)) in isLegalAddressingMode()
12573 if (AM.BaseGV) { in isLegalAddressingMode()
12575 Subtarget->ClassifyGlobalReference(AM.BaseGV, getTargetMachine()); in isLegalAddressingMode()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 6736 if (AM.BaseGV) in isLegalAddressingMode()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 9693 if (AM.BaseGV) in isLegalAddressingMode()
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