Searched refs:PRE_INC (Results 1 – 9 of 9) sorted by relevance
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 690 PRE_INC, enumerator
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 814 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetReg()
850 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImmPre()
870 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImm()
943 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode3Offset()
1347 OffImm = ((AM == ISD::PRE_INC) || (AM == ISD::POST_INC)) in SelectT2AddrModeImm8Offset()
1421 bool isPre = (AM == ISD::PRE_INC) || (AM == ISD::PRE_DEC); in SelectARMIndexedLoad()
1495 bool isPre = (AM == ISD::PRE_INC) || (AM == ISD::PRE_DEC); in SelectT2IndexedLoad()
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| D | ARMISelLowering.cpp | 625 for (unsigned im = (unsigned)ISD::PRE_INC; in ARMTargetLowering()
9893 AM = isInc ? ISD::PRE_INC : ISD::PRE_DEC; in getPreIndexedAddressParts()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 97 setIndexedLoadAction(ISD::PRE_INC, MVT::i1, Legal); in PPCTargetLowering()
98 setIndexedLoadAction(ISD::PRE_INC, MVT::i8, Legal); in PPCTargetLowering()
99 setIndexedLoadAction(ISD::PRE_INC, MVT::i16, Legal); in PPCTargetLowering()
100 setIndexedLoadAction(ISD::PRE_INC, MVT::i32, Legal); in PPCTargetLowering()
101 setIndexedLoadAction(ISD::PRE_INC, MVT::i64, Legal); in PPCTargetLowering()
102 setIndexedStoreAction(ISD::PRE_INC, MVT::i1, Legal); in PPCTargetLowering()
103 setIndexedStoreAction(ISD::PRE_INC, MVT::i8, Legal); in PPCTargetLowering()
104 setIndexedStoreAction(ISD::PRE_INC, MVT::i16, Legal); in PPCTargetLowering()
105 setIndexedStoreAction(ISD::PRE_INC, MVT::i32, Legal); in PPCTargetLowering()
106 setIndexedStoreAction(ISD::PRE_INC, MVT::i64, Legal); in PPCTargetLowering()
[all …]
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| D | PPCISelDAGToDAG.cpp | 1049 if (LD->getAddressingMode() != ISD::PRE_INC) in Select()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 323 case ISD::PRE_INC: return "<pre-inc>"; in getIndexedModeName()
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| D | DAGCombiner.cpp | 6935 if (!TLI.isIndexedLoadLegal(ISD::PRE_INC, VT) && in CombineToPreIndexedLoadStore()
6943 if (!TLI.isIndexedStoreLegal(ISD::PRE_INC, VT) && in CombineToPreIndexedLoadStore()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 762 return AM == ISD::PRE_INC || AM == ISD::PRE_DEC;
772 return AM == ISD::PRE_INC || AM == ISD::PRE_DEC;
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 633 for (unsigned IM = (unsigned)ISD::PRE_INC; in TargetLoweringBase()
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