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Searched refs:b11 (Results 1 – 24 of 24) sorted by relevance

/external/llvm/lib/Target/ARM/
DARMInstrVFP.td234 def VADDD : ADbI<0b11100, 0b11, 0, 0,
240 def VADDS : ASbIn<0b11100, 0b11, 0, 0,
250 def VSUBD : ADbI<0b11100, 0b11, 1, 0,
256 def VSUBS : ASbIn<0b11100, 0b11, 1, 0,
315 def VCMPED : ADuI<0b11101, 0b11, 0b0100, 0b11, 0,
320 def VCMPES : ASuI<0b11101, 0b11, 0b0100, 0b11, 0,
330 def VCMPD : ADuI<0b11101, 0b11, 0b0100, 0b01, 0,
335 def VCMPS : ASuI<0b11101, 0b11, 0b0100, 0b01, 0,
349 def VABSD : ADuI<0b11101, 0b11, 0b0000, 0b11, 0,
354 def VABSS : ASuIn<0b11101, 0b11, 0b0000, 0b11, 0,
[all …]
DARMInstrNEON.td2420 : N2V<0b11, 0b11, op19_18, 0b10, op11_7, 0, 0, (outs DPR:$Vd, DPR:$Vm),
2426 : N2V<0b11, 0b11, op19_18, 0b10, op11_7, 1, 0, (outs QPR:$Vd, QPR:$Vm),
3236 def v1i64 : N3VD<op24, op23, 0b11, op11_8, op4, itinD,
3239 def v2i64 : N3VQ<op24, op23, 0b11, op11_8, op4, itinQ,
3344 def v1i64 : N3VDInt<op24, op23, 0b11, op11_8, op4, f, itinD32,
3347 def v2i64 : N3VQInt<op24, op23, 0b11, op11_8, op4, f, itinQ32,
3358 def v1i64 : N3VDIntSh<op24, op23, 0b11, op11_8, op4, f, itinD32,
3361 def v2i64 : N3VQIntSh<op24, op23, 0b11, op11_8, op4, f, itinQ32,
4268 defm VCEQz : N2V_QHS_cmp<0b11, 0b11, 0b01, 0b00010, 0, "vceq", "i",
4282 defm VCGEz : N2V_QHS_cmp<0b11, 0b11, 0b01, 0b00001, 0, "vcge", "s",
[all …]
DARMInstrThumb2.td2164 defm t2ROR : T2I_sh_ir<0b11, "ror", imm0_31,
2571 let Inst{5-4} = 0b11;
2653 let Inst{5-4} = 0b11;
2806 def t2CLZ : T2I_misc<0b11, 0b00, (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iUNAr,
2820 def t2REVSH : T2I_misc<0b01, 0b11, (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iUNAr,
3044 def t2MOVCCror : T2I_movcc_sh<0b11, (outs rGPR:$Rd),
3137 def t2LDREXD : T2I_ldrex<0b11, (outs rGPR:$Rt, rGPR:$Rt2),
3172 def t2STREXD : T2I_strex<0b11, (outs rGPR:$Rd),
3479 def t2SRSIA_UPD : T2SRS<0b11, 1, (outs), (ins imm0_31:$mode), NoItinerary,
3481 def t2SRSIA : T2SRS<0b11, 0, (outs), (ins imm0_31:$mode), NoItinerary,
DARMInstrInfo.td2100 let Inst{24-23} = 0b11;
2103 let Inst{24-23} = 0b11;
2151 let Inst{24-23} = 0b11;
2154 let Inst{24-23} = 0b11;
2835 let Inst{24-23} = 0b11; // Increment Before
2844 let Inst{24-23} = 0b11; // Increment Before
3680 def TT : AMulxyI<0b0001011, 0b11, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
3692 def WT : AMulxyI<0b0001001, 0b11, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
3726 def TT : AMulxyIa<0b0001000, 0b11, (outs GPRnopc:$Rd),
3771 def SMLALTT : AMulxyI64<0b0001010, 0b11, (outs GPRnopc:$RdLo, GPRnopc:$RdHi),
[all …]
DARMInstrThumb.td250 let Inst{9-8} = 0b11;
423 def tBL : TIx2<0b11110, 0b11, 1,
437 def tBLXi : TIx2<0b11110, 0b11, 0,
DARMInstrFormats.td831 let Unpredictable{9-8} = 0b11;
2023 let Inst{24-23} = 0b11;
2024 let Inst{21-20} = 0b11;
/external/skia/src/utils/
DSkMatrix44.cpp447 double b11 = a22 * a33 - a23 * a32; in determinant() local
450 return b00 * b11 - b01 * b10 + b02 * b09 + b03 * b08 - b04 * b07 + b05 * b06; in determinant()
527 double b11 = a22 * a33 - a23 * a32; in invert() local
530 double det = b00 * b11 - b01 * b10 + b02 * b09 + b03 * b08 - b04 * b07 + b05 * b06; in invert()
551 b11 *= invdet; in invert()
553 inverse->fMat[0][0] = SkDoubleToMScalar(a11 * b11 - a12 * b10 + a13 * b09); in invert()
554 inverse->fMat[0][1] = SkDoubleToMScalar(a02 * b10 - a01 * b11 - a03 * b09); in invert()
557 inverse->fMat[1][0] = SkDoubleToMScalar(a12 * b08 - a10 * b11 - a13 * b07); in invert()
558 inverse->fMat[1][1] = SkDoubleToMScalar(a00 * b11 - a02 * b08 + a03 * b07); in invert()
/external/libvpx/libvpx/vp8/encoder/x86/
Dfwalsh_sse2.asm79 pmaddwd xmm2, [GLOBAL(cn1)] ; c11 b11 c10 b10
85 pshufd xmm5, xmm2, 0xd8 ; c11 c10 b11 b10
90 punpcklqdq xmm0, xmm5 ; b11 b10 a11 a10
/external/llvm/test/MC/Disassembler/AArch64/
Dbasic-a64-undefined.txt17 # Only unallocated (int-register) variants are: opc=0b11, size=0b10, 0b11
/external/clang/test/SemaCXX/
Duninitialized.cpp199 B* b11 = 0; in setupB() local
200 B* b12(b11); in setupB()
226 B* b11 = 0; variable
227 B* b12(b11);
Dconstant-expression.cpp45 b11 : true? 1 + cval * Struct::sval ^ itval / (int)1.5 - sizeof(Struct) : 0
/external/clang/test/CodeGenCXX/
Dmangle-ms-return-qualifiers.cpp51 const char** b11() { return 0; } in b11() function
/external/jmonkeyengine/engine/src/blender/com/jme3/scene/plugins/blender/textures/
DNoiseGenerator.java690 int b11 = p[j + by1]; in noise3Perlin() local
704 q = g[b11 + bz0]; in noise3Perlin()
718 q = g[b11 + bz1]; in noise3Perlin()
760 int b11 = hash[hash[ix + 1 & 0xFF] + (iy + 1 & 0xFF)]; in originalBlenderNoise() local
761 int[] b1 = new int[] {b00, b00, b01, b01, b10, b10, b11, b11}; in originalBlenderNoise()
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td1890 def SMCi : A64I_exceptImpl<0b000, 0b11, "smc">;
1896 def DCPS3i : A64I_exceptImpl<0b101, 0b11, "dcps3">;
2074 def FCVT16 : FCVTRegType<FPR16, 0b11, f16>;
2213 : A64I_fpfixed<sf, 0b0, type, 0b11, opcode,
2297 defm FCVTZ : A64I_fptointRM<0b11, 0b0, "fcvtz">;
2470 def PRFM_lit : A64I_LDRlit<0b11, 0b0,
2537 def _dword: A64I_SRexs_impl<0b11, opcode, asmstr,
2574 def _dword: A64I_LRexs_impl<0b11, opcode, asmstr,
2640 def _dword: A64I_SLexs_impl<0b11, opcode, asmstr,
2670 def _dword: A64I_SPexs_impl<0b11, opcode, asmstr, (outs),
[all …]
DAArch64InstrFormats.td446 let Inst{11-10} = 0b11;
651 let Inst{11-10} = 0b11;
/external/libvorbis/doc/
D02-bitpacking.tex191 'b00' and 'b11'. Two things are worth noting here:
200 two-bit-wide integer 'b11'. This value may be interpreted either as
/external/llvm/test/CodeGen/Mips/
Dra-allocatable.ll26 @b11 = external global i32*
135 %23 = load i32** @b11, align 4, !tbaa !3
/external/clang/lib/Headers/
Demmintrin.h1103 _mm_set_epi8(char b15, char b14, char b13, char b12, char b11, char b10, char b9, char b8, char b7,… in _mm_set_epi8() argument
1105 return (__m128i)(__v16qi){ b0, b1, b2, b3, b4, b5, b6, b7, b8, b9, b10, b11, b12, b13, b14, b15 }; in _mm_set_epi8()
1157 …r b3, char b4, char b5, char b6, char b7, char b8, char b9, char b10, char b11, char b12, char b13… in _mm_setr_epi8() argument
1159 return (__m128i)(__v16qi){ b0, b1, b2, b3, b4, b5, b6, b7, b8, b9, b10, b11, b12, b13, b14, b15 }; in _mm_setr_epi8()
/external/llvm/lib/Target/Mips/
DMips16InstrInfo.td1158 def SraX16: FEXT_SHIFT16_ins<0b11, "sra", IIAlu>;
1183 def SubuRxRyRz16: FRRR16_ins<0b11, "subu", IIAlu>, ArithLogic16Defs<0>;
/external/llvm/test/MC/AArch64/
Dbasic-a64-diagnostics.s1537 fcsel b9, b10, b11, mi
/external/valgrind/main/VEX/priv/
Dguest_ppc_toIR.c6397 UChar b11 = toUChar( IFIELD( theInstr, 11, 1 ) ); in dis_proc_ctl() local
6447 if (b20 == 1 && b11 == 0) { in dis_proc_ctl()
6569 if (b11 != 0) in dis_proc_ctl()
8543 UChar b11 = toUChar( IFIELD( theInstr, 11, 1 ) ); in dis_fp_scr() local
8546 if (b16to22 != 0 || b11 != 0) { in dis_fp_scr()
/external/elfutils/tests/
Dtestfile44.expect.bz21testfile44.o: elf32-elf_i386 2 3Disassembly of section .text: 4 5 0 ...
Dtestfile45.expect.bz21testfile45.o: elf64-elf_x86_64 2 3Disassembly of section .text: 4 5 0 ...
/external/webkit/PerformanceTests/Parser/resources/
Dfinal-url-en48972 http://www.imakenews.com/psaanews/index000050690.cfm?x=b11,0,w