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Searched refs:getReg (Results 1 – 25 of 281) sorted by relevance

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/external/llvm/lib/Target/X86/InstPrinter/
DX86InstComments.cpp38 DestName = getRegName(MI->getOperand(0).getReg()); in EmitAnyX86InstComments()
39 Src1Name = getRegName(MI->getOperand(1).getReg()); in EmitAnyX86InstComments()
40 Src2Name = getRegName(MI->getOperand(2).getReg()); in EmitAnyX86InstComments()
46 Src2Name = getRegName(MI->getOperand(2).getReg()); in EmitAnyX86InstComments()
47 Src1Name = getRegName(MI->getOperand(1).getReg()); in EmitAnyX86InstComments()
48 DestName = getRegName(MI->getOperand(0).getReg()); in EmitAnyX86InstComments()
54 Src2Name = getRegName(MI->getOperand(2).getReg()); in EmitAnyX86InstComments()
55 Src1Name = getRegName(MI->getOperand(1).getReg()); in EmitAnyX86InstComments()
56 DestName = getRegName(MI->getOperand(0).getReg()); in EmitAnyX86InstComments()
62 Src1Name = getRegName(MI->getOperand(2).getReg()); in EmitAnyX86InstComments()
[all …]
DX86ATTInstPrinter.cpp156 printRegName(O, Op.getReg()); in printOperand()
184 if (SegReg.getReg()) { in printMemReference()
191 if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg())) in printMemReference()
198 if (IndexReg.getReg() || BaseReg.getReg()) { in printMemReference()
200 if (BaseReg.getReg()) in printMemReference()
203 if (IndexReg.getReg()) { in printMemReference()
/external/llvm/lib/Target/ARM/InstPrinter/
DARMInstPrinter.cpp113 printRegName(O, Dst.getReg()); in printInst()
115 printRegName(O, MO1.getReg()); in printInst()
118 printRegName(O, MO2.getReg()); in printInst()
135 printRegName(O, Dst.getReg()); in printInst()
137 printRegName(O, MO1.getReg()); in printInst()
155 MI->getOperand(0).getReg() == ARM::SP && in printInst()
167 if (Opcode == ARM::STR_PRE_IMM && MI->getOperand(2).getReg() == ARM::SP && in printInst()
172 printRegName(O, MI->getOperand(1).getReg()); in printInst()
180 MI->getOperand(0).getReg() == ARM::SP && in printInst()
192 if (Opcode == ARM::LDR_POST_IMM && MI->getOperand(2).getReg() == ARM::SP && in printInst()
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/external/llvm/lib/Target/Hexagon/
DHexagonSplitTFRCondSets.cpp90 int DestReg = MI->getOperand(0).getReg(); in runOnMachineFunction()
91 int SrcReg1 = MI->getOperand(2).getReg(); in runOnMachineFunction()
92 int SrcReg2 = MI->getOperand(3).getReg(); in runOnMachineFunction()
108 DestReg).addReg(MI->getOperand(1).getReg()).addReg(SrcReg1); in runOnMachineFunction()
112 DestReg).addReg(MI->getOperand(1).getReg()).addReg(SrcReg2); in runOnMachineFunction()
120 int DestReg = MI->getOperand(0).getReg(); in runOnMachineFunction()
121 int SrcReg1 = MI->getOperand(2).getReg(); in runOnMachineFunction()
128 addReg(MI->getOperand(1).getReg()).addReg(SrcReg1); in runOnMachineFunction()
133 addReg(MI->getOperand(1).getReg()). in runOnMachineFunction()
138 addReg(MI->getOperand(1).getReg()). in runOnMachineFunction()
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DHexagonPeephole.cpp133 unsigned DstReg = Dst.getReg(); in runOnMachineFunction()
134 unsigned SrcReg = Src.getReg(); in runOnMachineFunction()
157 unsigned DstReg = Dst.getReg(); in runOnMachineFunction()
158 unsigned SrcReg = Src1.getReg(); in runOnMachineFunction()
169 unsigned DstReg = Dst.getReg(); in runOnMachineFunction()
170 unsigned SrcReg = Src.getReg(); in runOnMachineFunction()
192 unsigned DstReg = Dst.getReg(); in runOnMachineFunction()
193 unsigned SrcReg = Src.getReg(); in runOnMachineFunction()
225 unsigned Reg0 = Op0.getReg(); in runOnMachineFunction()
270 unsigned PSrc = MI->getOperand(PR).getReg(); in runOnMachineFunction()
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/external/dexmaker/src/dx/java/com/android/dx/dex/code/form/
DForm33x.java75 unsignedFitsInByte(regs.get(0).getReg()) && in isCompatible()
76 unsignedFitsInByte(regs.get(1).getReg()) && in isCompatible()
77 unsignedFitsInShort(regs.get(2).getReg()); in isCompatible()
86 bits.set(0, unsignedFitsInByte(regs.get(0).getReg())); in compatibleRegs()
87 bits.set(1, unsignedFitsInByte(regs.get(1).getReg())); in compatibleRegs()
88 bits.set(2, unsignedFitsInShort(regs.get(2).getReg())); in compatibleRegs()
98 codeUnit(regs.get(0).getReg(), regs.get(1).getReg()), in writeTo()
99 (short) regs.get(2).getReg()); in writeTo()
DForm23x.java71 unsignedFitsInByte(regs.get(0).getReg()) && in isCompatible()
72 unsignedFitsInByte(regs.get(1).getReg()) && in isCompatible()
73 unsignedFitsInByte(regs.get(2).getReg()); in isCompatible()
82 bits.set(0, unsignedFitsInByte(regs.get(0).getReg())); in compatibleRegs()
83 bits.set(1, unsignedFitsInByte(regs.get(1).getReg())); in compatibleRegs()
84 bits.set(2, unsignedFitsInByte(regs.get(2).getReg())); in compatibleRegs()
93 opcodeUnit(insn, regs.get(0).getReg()), in writeTo()
94 codeUnit(regs.get(1).getReg(), regs.get(2).getReg())); in writeTo()
DForm12x.java97 if (rs1.getReg() != regs.get(0).getReg()) { in isCompatible()
107 return unsignedFitsInNibble(rs1.getReg()) && in isCompatible()
108 unsignedFitsInNibble(rs2.getReg()); in isCompatible()
117 bits.set(0, unsignedFitsInNibble(regs.get(0).getReg())); in compatibleRegs()
118 bits.set(1, unsignedFitsInNibble(regs.get(1).getReg())); in compatibleRegs()
135 makeByte(regs.get(sz - 2).getReg(), in writeTo()
136 regs.get(sz - 1).getReg()))); in writeTo()
DForm41c.java95 if (reg.getReg() != regs.get(1).getReg()) { in isCompatible()
105 if (!unsignedFitsInShort(reg.getReg())) { in isCompatible()
122 boolean compat = unsignedFitsInByte(regs.get(0).getReg()); in compatibleRegs()
127 if (regs.get(0).getReg() == regs.get(1).getReg()) { in compatibleRegs()
142 write(out, opcodeUnit(insn), cpi, (short) regs.get(0).getReg()); in writeTo()
DForm22x.java70 unsignedFitsInByte(regs.get(0).getReg()) && in isCompatible()
71 unsignedFitsInShort(regs.get(1).getReg()); in isCompatible()
80 bits.set(0, unsignedFitsInByte(regs.get(0).getReg())); in compatibleRegs()
81 bits.set(1, unsignedFitsInShort(regs.get(1).getReg())); in compatibleRegs()
90 opcodeUnit(insn, regs.get(0).getReg()), in writeTo()
91 (short) regs.get(1).getReg()); in writeTo()
DForm32x.java69 unsignedFitsInShort(regs.get(0).getReg()) && in isCompatible()
70 unsignedFitsInShort(regs.get(1).getReg()); in isCompatible()
79 bits.set(0, unsignedFitsInShort(regs.get(0).getReg())); in compatibleRegs()
80 bits.set(1, unsignedFitsInShort(regs.get(1).getReg())); in compatibleRegs()
91 (short) regs.get(0).getReg(), in writeTo()
92 (short) regs.get(1).getReg()); in writeTo()
DForm31c.java92 if (reg.getReg() != regs.get(1).getReg()) { in isCompatible()
102 if (!unsignedFitsInByte(reg.getReg())) { in isCompatible()
120 boolean compat = unsignedFitsInByte(regs.get(0).getReg()); in compatibleRegs()
125 if (regs.get(0).getReg() == regs.get(1).getReg()) { in compatibleRegs()
140 write(out, opcodeUnit(insn, regs.get(0).getReg()), cpi); in writeTo()
DForm21c.java92 if (reg.getReg() != regs.get(1).getReg()) { in isCompatible()
102 if (!unsignedFitsInByte(reg.getReg())) { in isCompatible()
125 boolean compat = unsignedFitsInByte(regs.get(0).getReg()); in compatibleRegs()
130 if (regs.get(0).getReg() == regs.get(1).getReg()) { in compatibleRegs()
146 opcodeUnit(insn, regs.get(0).getReg()), in writeTo()
DForm22t.java70 unsignedFitsInNibble(regs.get(0).getReg()) && in isCompatible()
71 unsignedFitsInNibble(regs.get(1).getReg()))) { in isCompatible()
85 bits.set(0, unsignedFitsInNibble(regs.get(0).getReg())); in compatibleRegs()
86 bits.set(1, unsignedFitsInNibble(regs.get(1).getReg())); in compatibleRegs()
107 makeByte(regs.get(0).getReg(), regs.get(1).getReg())), in writeTo()
DForm35c.java113 bits.set(i, unsignedFitsInNibble(reg.getReg() + in compatibleRegs()
126 int r0 = (sz > 0) ? regs.get(0).getReg() : 0; in writeTo()
127 int r1 = (sz > 1) ? regs.get(1).getReg() : 0; in writeTo()
128 int r2 = (sz > 2) ? regs.get(2).getReg() : 0; in writeTo()
129 int r3 = (sz > 3) ? regs.get(3).getReg() : 0; in writeTo()
130 int r4 = (sz > 4) ? regs.get(4).getReg() : 0; in writeTo()
168 if (!unsignedFitsInNibble(one.getReg() + one.getCategory() - 1)) { in wordCount()
201 RegisterSpec.make(one.getReg() + 1, Type.VOID)); in explicitize()
DForm52c.java80 unsignedFitsInShort(regs.get(0).getReg()) && in isCompatible()
81 unsignedFitsInShort(regs.get(1).getReg()))) { in isCompatible()
98 bits.set(0, unsignedFitsInShort(regs.get(0).getReg())); in compatibleRegs()
99 bits.set(1, unsignedFitsInShort(regs.get(1).getReg())); in compatibleRegs()
112 (short) regs.get(0).getReg(), in writeTo()
113 (short) regs.get(1).getReg()); in writeTo()
DForm22c.java76 unsignedFitsInNibble(regs.get(0).getReg()) && in isCompatible()
77 unsignedFitsInNibble(regs.get(1).getReg()))) { in isCompatible()
99 bits.set(0, unsignedFitsInNibble(regs.get(0).getReg())); in compatibleRegs()
100 bits.set(1, unsignedFitsInNibble(regs.get(1).getReg())); in compatibleRegs()
112 makeByte(regs.get(0).getReg(), regs.get(1).getReg())), in writeTo()
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86MCCodeEmitter.cpp56 return Ctx.getRegisterInfo().getEncodingValue(MO.getReg()) & 0x7; in GetX86RegNum()
70 unsigned SrcReg = MI.getOperand(OpNum).getReg(); in getVEXRegisterEncoding()
170 if ((BaseReg.getReg() != 0 && in Is32BitMemOperand()
171 X86MCRegisterClasses[X86::GR32RegClassID].contains(BaseReg.getReg())) || in Is32BitMemOperand()
172 (IndexReg.getReg() != 0 && in Is32BitMemOperand()
173 X86MCRegisterClasses[X86::GR32RegClassID].contains(IndexReg.getReg()))) in Is32BitMemOperand()
185 if ((BaseReg.getReg() != 0 && in Is64BitMemOperand()
186 X86MCRegisterClasses[X86::GR64RegClassID].contains(BaseReg.getReg())) || in Is64BitMemOperand()
187 (IndexReg.getReg() != 0 && in Is64BitMemOperand()
188 X86MCRegisterClasses[X86::GR64RegClassID].contains(IndexReg.getReg()))) in Is64BitMemOperand()
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/external/llvm/lib/Target/X86/
DX86CodeEmitter.cpp187 unsigned Reg = MO.getReg(); in determineREX()
489 unsigned BaseReg = Base.getReg(); in emitMemModRMByte()
494 assert(IndexReg.getReg() == 0 && Is64BitMode && in emitMemModRMByte()
515 IndexReg.getReg() == 0 && in emitMemModRMByte()
553 assert(IndexReg.getReg() != X86::ESP && in emitMemModRMByte()
554 IndexReg.getReg() != X86::RSP && "Cannot use ESP as index reg!"); in emitMemModRMByte()
587 if (IndexReg.getReg()) in emitMemModRMByte()
588 IndexRegNo = getX86RegNum(IndexReg.getReg()); in emitMemModRMByte()
595 if (IndexReg.getReg()) in emitMemModRMByte()
596 IndexRegNo = getX86RegNum(IndexReg.getReg()); in emitMemModRMByte()
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/external/llvm/lib/Target/R600/
DSILowerControlFlow.cpp179 unsigned Reg = MI.getOperand(0).getReg(); in If()
180 unsigned Vcc = MI.getOperand(1).getReg(); in If()
197 unsigned Dst = MI.getOperand(0).getReg(); in Else()
198 unsigned Src = MI.getOperand(1).getReg(); in Else()
216 unsigned Dst = MI.getOperand(0).getReg(); in Break()
217 unsigned Src = MI.getOperand(1).getReg(); in Break()
230 unsigned Dst = MI.getOperand(0).getReg(); in IfBreak()
231 unsigned Vcc = MI.getOperand(1).getReg(); in IfBreak()
232 unsigned Src = MI.getOperand(2).getReg(); in IfBreak()
245 unsigned Dst = MI.getOperand(0).getReg(); in ElseBreak()
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DAMDGPUIndirectAddressing.cpp100 TII->getIndirectAddrStoreRegClass(MI.getOperand(0).getReg()); in runOnMachineFunction()
102 if (MI.getOperand(1).getReg() == AMDGPU::INDIRECT_BASE_ADDR) { in runOnMachineFunction()
114 MI.getOperand(0).getReg(), // Value in runOnMachineFunction()
116 MI.getOperand(1).getReg()); // Offset in runOnMachineFunction()
222 RegisterAddressMap.find(MO.getReg()) != RegisterAddressMap.end()) { in runOnMachineFunction()
223 unsigned Reg = MO.getReg(); in runOnMachineFunction()
250 if (MI.getOperand(1).getReg() == AMDGPU::INDIRECT_BASE_ADDR) { in runOnMachineFunction()
262 MI.getOperand(0).getReg()) in runOnMachineFunction()
269 MI.getOperand(0).getReg()) in runOnMachineFunction()
302 MI.getOperand(0).getReg(), // Value in runOnMachineFunction()
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/external/dexmaker/src/dx/java/com/android/dx/ssa/
DDeadCodeRemover.java108 useList[source.getReg()].remove(insnS); in run()
112 source.getReg()))) { in run()
117 worklist.set(source.getReg()); in run()
154 useList[source.getReg()].remove(insn); in pruneDeadInstructions()
160 for (SsaInsn use : useList[result.getReg()]) { in pruneDeadInstructions()
204 || !isCircularNoSideEffect(result.getReg(), set)) { in isCircularNoSideEffect()
252 noSideEffectRegs.set(insn.getResult().getReg()); in visitMoveInsn()
260 noSideEffectRegs.set(phi.getResult().getReg()); in visitPhiInsn()
268 noSideEffectRegs.set(result.getReg()); in visitNonMoveInsn()
/external/llvm/lib/Target/ARM/
DA15SDOptimizer.cpp143 unsigned Reg = MO.getReg(); in usesRegClass()
173 SReg = MI->getOperand(1).getReg(); in getPrefSPRLane()
202 unsigned Reg = MO.getReg(); in eraseInstrWithNoUses()
225 unsigned DefReg = MODef.getReg(); in eraseInstrWithNoUses()
255 return optimizeAllLanesPattern(MI, MI->getOperand(1).getReg()); in optimizeSDPattern()
259 unsigned DPRReg = MI->getOperand(1).getReg(); in optimizeSDPattern()
260 unsigned SPRReg = MI->getOperand(2).getReg(); in optimizeSDPattern()
263 MachineInstr *DPRMI = MRI->getVRegDef(MI->getOperand(1).getReg()); in optimizeSDPattern()
264 MachineInstr *SPRMI = MRI->getVRegDef(MI->getOperand(2).getReg()); in optimizeSDPattern()
281 unsigned FullReg = SPRMI->getOperand(1).getReg(); in optimizeSDPattern()
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DMLxExpansionPass.cpp89 unsigned Reg = MI->getOperand(1).getReg(); in getAccDefMI()
99 Reg = DefMI->getOperand(1).getReg(); in getAccDefMI()
105 Reg = DefMI->getOperand(2).getReg(); in getAccDefMI()
117 unsigned Reg = MI->getOperand(0).getReg(); in getDefReg()
128 Reg = UseMI->getOperand(0).getReg(); in getDefReg()
143 unsigned Reg = MI->getOperand(1).getReg(); in hasLoopHazard()
157 unsigned SrcReg = DefMI->getOperand(i).getReg(); in hasLoopHazard()
165 Reg = DefMI->getOperand(1).getReg(); in hasLoopHazard()
171 Reg = DefMI->getOperand(2).getReg(); in hasLoopHazard()
274 unsigned DstReg = MI->getOperand(0).getReg(); in ExpandFPMLxInstruction()
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/external/llvm/lib/CodeGen/
DTwoAddressInstructionPass.cpp190 unsigned MOReg = MO.getReg(); in sink3AddrInstruction()
194 UseRegs.insert(MO.getReg()); in sink3AddrInstruction()
203 DefReg = MO.getReg(); in sink3AddrInstruction()
263 unsigned MOReg = MO.getReg(); in sink3AddrInstruction()
338 DstReg = MI.getOperand(0).getReg(); in isCopyToReg()
339 SrcReg = MI.getOperand(1).getReg(); in isCopyToReg()
341 DstReg = MI.getOperand(0).getReg(); in isCopyToReg()
342 SrcReg = MI.getOperand(2).getReg(); in isCopyToReg()
434 if (!MO.isReg() || !MO.isUse() || MO.getReg() != Reg) in isTwoAddrUse()
438 DstReg = MI.getOperand(ti).getReg(); in isTwoAddrUse()
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