| /external/llvm/lib/Target/X86/ |
| D | X86InstrSSE.td | 244 def : Pat<(f32 (vector_extract (v4f32 VR128:$src), (iPTR 0))),
246 def : Pat<(f64 (vector_extract (v2f64 VR128:$src), (iPTR 0))),
251 def : Pat<(v4i32 (extract_subvector (v8i32 VR256:$src), (iPTR 0))),
253 def : Pat<(v4f32 (extract_subvector (v8f32 VR256:$src), (iPTR 0))),
256 def : Pat<(v2i64 (extract_subvector (v4i64 VR256:$src), (iPTR 0))),
258 def : Pat<(v2f64 (extract_subvector (v4f64 VR256:$src), (iPTR 0))),
261 def : Pat<(v8i16 (extract_subvector (v16i16 VR256:$src), (iPTR 0))),
263 def : Pat<(v16i8 (extract_subvector (v32i8 VR256:$src), (iPTR 0))),
269 def : Pat<(insert_subvector undef, (v2i64 VR128:$src), (iPTR 0)),
271 def : Pat<(insert_subvector undef, (v2f64 VR128:$src), (iPTR 0)),
[all …]
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| D | X86InstrMMX.td | 255 (iPTR 0))))))],
534 (iPTR imm:$src2)))],
542 GR32:$src2, (iPTR imm:$src3)))],
551 (iPTR imm:$src3)))],
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| D | X86InstrInfo.td | 82 def SDT_X86Call : SDTypeProfile<0, -1, [SDTCisVT<0, iPTR>]>;
85 SDTCisVT<1, iPTR>,
86 SDTCisVT<2, iPTR>]>;
106 def SDT_X86SEG_ALLOCA : SDTypeProfile<1, 1, [SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>;
321 class X86MemOperand<string printMethod> : Operand<iPTR> {
541 def addr : ComplexPattern<iPTR, 5, "SelectAddr", [], [SDNPWantParent]>;
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| D | README.txt | 1368 (iPTR 0))))),
1371 (iPTR 0))))),
1374 (iPTR 0))))),
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| /external/llvm/utils/TableGen/ |
| D | DAGISelMatcher.cpp | 352 if (T1 == MVT::iPTR) in TypesAreContradictory()
355 if (T2 == MVT::iPTR) in TypesAreContradictory()
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| D | CodeGenTarget.cpp | 45 case MVT::iPTR: return "TLI.getPointerTy()"; in getName()
109 case MVT::iPTR: return "MVT::iPTR"; in getEnumName()
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| D | CodeGenDAGPatterns.cpp | 53 assert((VT < MVT::LAST_VALUETYPE || VT == MVT::iPTR || in TypeSet()
169 case MVT::iPTR: in MergeInTypeInfo()
191 if ((InVT.TypeVec[0] == MVT::iPTR || InVT.TypeVec[0] == MVT::iPTRAny) && in MergeInTypeInfo()
197 if ((InVT.TypeVec[0] == MVT::iPTR || InVT.TypeVec[0] == MVT::iPTRAny) && in MergeInTypeInfo()
886 return NodeToApply->UpdateNodeType(ResNo, MVT::iPTR, TP); in ApplyTypeConstraint()
977 return UpdateNodeType(ResNo, MVT::iPTR, TP); in UpdateNodeTypeFromInst()
1062 return MVT::iPTR; in getKnownType()
1379 return EEVT::TypeSet(MVT::iPTR, TP); in getImplicitType()
1486 if (VT == MVT::iPTR || VT == MVT::iPTRAny) in ApplyTypeConstraints()
1572 MadeChange |= getChild(0)->UpdateNodeType(0, MVT::iPTR, TP); in ApplyTypeConstraints()
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| D | CodeGenDAGPatterns.h | 69 assert(T < MVT::LAST_VALUETYPE || T == MVT::iPTR || T == MVT::iPTRAny); in isConcrete()
79 return getConcrete() == MVT::iPTR || getConcrete() == MVT::iPTRAny; in isDynamicallyResolved()
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| D | DAGISelMatcherOpt.cpp | 426 CTM->getType() == MVT::iPTR || in FactorNodes()
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| D | IntrinsicEmitter.cpp | 315 case MVT::iPTR: { in EncodeFixedType()
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| /external/llvm/include/llvm/CodeGen/ |
| D | ValueTypes.h | 153 iPTR = 255 enumerator
346 case iPTR: in getSizeInBits()
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| D | ValueTypes.td | 95 def iPTR : ValueType<0 , 255>;
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.td | 360 def calltarget : Operand<iPTR> {
363 def aaddr : Operand<iPTR> {
379 def memri : Operand<iPTR> {
384 def memrr : Operand<iPTR> {
388 def memrix : Operand<iPTR> { // memri where the imm is shifted 2 bits.
402 def iaddr : ComplexPattern<iPTR, 2, "SelectAddrImm", [], []>;
403 def xaddr : ComplexPattern<iPTR, 2, "SelectAddrIdx", [], []>;
404 def xoaddr : ComplexPattern<iPTR, 2, "SelectAddrIdxOnly",[], []>;
405 def ixaddr : ComplexPattern<iPTR, 2, "SelectAddrImmShift", [], []>; // "std"
408 def iaddroff : ComplexPattern<iPTR, 1, "SelectAddrImmOffs", [], []>;
[all …]
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| D | PPCInstr64Bit.td | 32 def tocentry : Operand<iPTR> {
35 def memrs : Operand<iPTR> { // memri where the immediate is a symbolLo64
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| /external/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.td | 19 def SDT_MipsJmpLink : SDTypeProfile<0, 1, [SDTCisVT<0, iPTR>]>;
229 def calltarget : Operand<iPTR> {
345 ComplexPattern<iPTR, 2, "selectIntAddr", [frameindex]>;
348 ComplexPattern<iPTR, 2, "selectAddrRegImm", [frameindex]>;
351 ComplexPattern<iPTR, 2, "selectAddrDefault", [frameindex]>;
1075 def : MipsPat<(MipsTailCall (iPTR tglobaladdr:$dst)),
1077 def : MipsPat<(MipsTailCall (iPTR texternalsym:$dst)),
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| D | Mips16InstrInfo.td | 18 ComplexPattern<iPTR, 3, "selectAddr16", [frameindex], [SDNPWantParent]>;
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGISel.cpp | 2051 return VT == MVT::iPTR && N.getValueType() == TLI.getPointerTy(); in CheckType()
2079 return VT == MVT::iPTR && cast<VTSDNode>(N)->getVT() == TLI.getPointerTy(); in CheckValueType()
2503 if (CaseVT == MVT::iPTR) in SelectCodeCommon()
2726 if (VT == MVT::iPTR) VT = TLI.getPointerTy().SimpleTy; in SelectCodeCommon()
2911 NodeToMatch->getValueType(i) == MVT::iPTR || in SelectCodeCommon()
2912 Res.getValueType() == MVT::iPTR || in SelectCodeCommon()
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| D | SelectionDAG.cpp | 867 Type *Ty = VT == MVT::iPTR ? in getEVTAlignment()
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| /external/llvm/lib/IR/ |
| D | ValueTypes.cpp | 253 case Type::PointerTyID: return MVT(MVT::iPTR); in getVT()
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| /external/llvm/lib/Target/R600/ |
| D | R600Instructions.td | 57 def MEMxi : Operand<iPTR> {
62 def MEMrr : Operand<iPTR> {
94 def FRAMEri : Operand<iPTR> {
103 def ADDRIndirect : ComplexPattern<iPTR, 2, "SelectADDRIndirect", [], []>;
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| /external/llvm/include/llvm/IR/ |
| D | Intrinsics.td | 69 : LLVMType<iPTR>{
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430InstrInfo.td | 25 def SDT_MSP430Call : SDTypeProfile<0, -1, [SDTCisVT<0, iPTR>]>;
98 def addr : ComplexPattern<iPTR, 2, "SelectAddr", [], []>;
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXIntrinsics.td | 1528 // contradiction between iPTRAny and iPTR for the def.
1613 // contradiction between iPTRAny and iPTR for the addr defs, so the move_sym
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| D | NVPTXInstrInfo.td | 1230 def imem : Operand<iPTR> {
|