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Searched refs:isTypeLegal (Results 1 – 25 of 28) sorted by relevance

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/external/llvm/lib/CodeGen/
DTargetLoweringBase.cpp761 assert(isTypeLegal(VT)); in canOpTrap()
795 while (NumElts > 1 && !TLI->isTypeLegal(MVT::getVectorVT(EltTy, NumElts))) { in getVectorTypeBreakdownMVT()
803 if (!TLI->isTypeLegal(NewVT)) in getVectorTypeBreakdownMVT()
828 if (isTypeLegal(*I)) in isLegalRC()
898 if (isTypeLegal(IVT)) { in computeRegisterProperties()
908 if (!isTypeLegal(MVT::ppcf128)) { in computeRegisterProperties()
917 if (!isTypeLegal(MVT::f128)) { in computeRegisterProperties()
926 if (!isTypeLegal(MVT::f64)) { in computeRegisterProperties()
935 if (!isTypeLegal(MVT::f32)) { in computeRegisterProperties()
936 if (isTypeLegal(MVT::f64)) { in computeRegisterProperties()
[all …]
DBasicTargetTransformInfo.cpp75 virtual bool isTypeLegal(Type *Ty) const;
144 bool BasicTTI::isTypeLegal(Type *Ty) const { in isTypeLegal() function in BasicTTI
146 return TLI->isTypeLegal(T); in isTypeLegal()
DAnalysis.cpp232 TLI.isTypeLegal(EVT::getEVT(Op->getType())) && in getNoopInput()
233 TLI.isTypeLegal(EVT::getEVT(I->getType()))) in getNoopInput()
/external/llvm/lib/CodeGen/SelectionDAG/
DResourcePriorityQueue.cpp98 if (TLI->isTypeLegal(VT) in numberRCValPredInSU()
136 if (TLI->isTypeLegal(VT) in numberRCValSuccInSU()
336 if (TLI->isTypeLegal(VT) in rawRegPressureDelta()
348 if (TLI->isTypeLegal(VT) && TLI->getRegClassFor(VT) in rawRegPressureDelta()
490 if (TLI->isTypeLegal(VT)) { in scheduledNode()
501 if (TLI->isTypeLegal(VT)) { in scheduledNode()
DFastISel.cpp153 if (!TLI.isTypeLegal(VT)) { in getRegForValue()
371 if (!TLI.isTypeLegal(VT)) { in SelectBinaryOp()
732 if (!TLI.isTypeLegal(DstVT)) in SelectCast()
736 if (!TLI.isTypeLegal(SrcVT)) in SelectCast()
771 !TLI.isTypeLegal(SrcEVT) || !TLI.isTypeLegal(DstEVT)) in SelectBitCast()
902 if (!TLI.isTypeLegal(IntVT)) in SelectFNeg()
938 if (!TLI.isTypeLegal(VT) && VT != MVT::i1) in SelectExtractValue()
1476 if (VT == MVT::Other || !TLI.isTypeLegal(VT)) { in HandlePHINodesInSuccessorBlocks()
DLegalizeTypesGeneric.cpp102 while (!isTypeLegal(NVT)) { in ExpandRes_BITCAST()
112 if (isTypeLegal(NVT)) { in ExpandRes_BITCAST()
325 if (isTypeLegal(NVT)) { in ExpandOp_BITCAST()
458 assert(isTypeLegal(Ptr.getValueType()) && "Pointers must be legal!"); in ExpandOp_NormalStore()
DLegalizeTypes.cpp129 } else if (isTypeLegal(Res.getValueType()) || IgnoreNodeResults(I)) { in PerformExpensiveChecks()
409 if (!isTypeLegal(I->getValueType(i))) { in run()
417 !isTypeLegal(I->getOperand(i).getValueType())) { in run()
DLegalizeDAG.cpp314 if (TLI.isTypeLegal(intVT)) { in ExpandUnalignedStore()
434 if (TLI.isTypeLegal(intVT) && TLI.isTypeLegal(LoadedVT)) { in ExpandUnalignedLoad()
657 TLI.isTypeLegal(MVT::i32)) { in OptimizeFloatStore()
667 if (TLI.isTypeLegal(MVT::i64)) { in OptimizeFloatStore()
674 if (TLI.isTypeLegal(MVT::i32) && !ST->isVolatile()) { in OptimizeFloatStore()
848 assert(TLI.isTypeLegal(StVT) && in LegalizeStoreOps()
1076 if (!TLI.isLoadExtLegal(ISD::EXTLOAD, SrcVT) && TLI.isTypeLegal(SrcVT)) { in LegalizeLoadOps()
1506 if (TLI.isTypeLegal(IVT)) { in ExpandFCOPYSIGN()
2222 if (Op0.getValueType() == MVT::i32 && TLI.isTypeLegal(MVT::f64)) { in ExpandLegalINT_TO_FP()
3016 if (!TLI.isTypeLegal(EltVT)) { in ExpandNode()
[all …]
DLegalizeVectorTypes.cpp1471 while (!TLI.isTypeLegal(VT) && NumElts != 1) { in WidenVecRes_Binary()
1515 } while (!TLI.isTypeLegal(VT) && NumElts != 1); in WidenVecRes_Binary()
1552 } while (!TLI.isTypeLegal(NextVT)); in WidenVecRes_Binary()
1625 if (TLI.isTypeLegal(InWidenVT)) { in WidenVecRes_Convert()
1784 if (TLI.isTypeLegal(NewInVT)) { in WidenVecRes_BITCAST()
1924 if (TLI.isTypeLegal(InWidenVT)) { in WidenVecRes_CONVERT_RNDSAT()
2251 if (TLI.isTypeLegal(NewVT)) { in WidenVecOp_BITCAST()
2375 if (TLI.isTypeLegal(MemVT) && (WidenWidth % MemVTWidth) == 0 && in FindMemType()
2390 if (TLI.isTypeLegal(MemVT) && WidenEltVT == MemVT.getVectorElementType() && in FindMemType()
DDAGCombiner.cpp334 bool isTypeLegal(const EVT &VT) { in isTypeLegal() function in __anon502a5e580111::DAGCombiner
336 return TLI.isTypeLegal(VT); in isTypeLegal()
2335 TLI.isTypeLegal(Op0VT))) && in SimplifyBinOpWithSameOpcodeHands()
3223 if (!TLI.isTypeLegal(VT)) return 0; in MatchRotate()
5350 if (isa<ConstantSDNode>(EltNo) && isTypeLegal(NVT)) { in visitTRUNCATE()
5610 if (isTypeLegal(IntXVT)) { in visitBITCAST()
6521 if (N0CFP && isTypeLegal(EVT)) { in visitFP_ROUND_INREG()
7487 if (!DC->isTypeLegal(VT)) in ShrinkLoadReplaceStoreWithStore()
7904 if (TLI.isTypeLegal(StoreTy)) in MergeConsecutiveStores()
7909 if (TLI.isTypeLegal(Ty)) in MergeConsecutiveStores()
[all …]
DTargetLowering.cpp1314 isTypeLegal(VT) && VT.bitsLE(N0.getValueType())) { in SimplifySetCC()
1469 (isTypeLegal(VT) && VT.bitsLE(N0.getValueType()))) && in SimplifySetCC()
2476 if (!isTypeLegal(VT)) in BuildSDIV()
2536 if (!isTypeLegal(VT)) in BuildUDIV()
DInstrEmitter.cpp105 if (TLI->isTypeLegal(VT)) in EmitCopyFromReg()
DLegalizeTypes.h72 bool isTypeLegal(EVT VT) const { in isTypeLegal() function
DSelectionDAGBuilder.cpp302 TLI.isTypeLegal(ValueVT)) in getCopyFromPartsVector()
350 assert(TLI.isTypeLegal(PartVT) && "Copying to an illegal type!"); in getCopyToParts()
629 if (!TLI.isTypeLegal(RegisterVT)) in areValueTypesLegal()
1754 if (!TLI.isTypeLegal(VT)) in visitBitTestHeader()
5484 if (!TLI.isTypeLegal(LoadVT) ||!TLI.allowsUnalignedMemoryAccesses(LoadVT)) in visitMemCmpCall()
DLegalizeIntegerTypes.cpp517 if (!TLI.isTypeLegal(SVT)) in PromoteIntRes_SETCC()
2095 if ((Action == TargetLowering::Legal && TLI.isTypeLegal(NVT)) || in ExpandIntRes_Shift()
/external/llvm/lib/Target/X86/
DX86FastISel.cpp142 bool isTypeLegal(Type *Ty, MVT &VT, bool AllowI1 = false);
152 bool X86FastISel::isTypeLegal(Type *Ty, MVT &VT, bool AllowI1) { in isTypeLegal() function in X86FastISel
172 return (AllowI1 && VT == MVT::i1) || TLI.isTypeLegal(VT); in isTypeLegal()
700 if (!isTypeLegal(I->getOperand(0)->getType(), VT, /*AllowI1=*/true)) in X86SelectStore()
845 if (!isTypeLegal(I->getType(), VT, /*AllowI1=*/true)) in X86SelectLoad()
934 if (!isTypeLegal(I->getOperand(0)->getType(), VT)) in X86SelectCmp()
1014 if (!TLI.isTypeLegal(DstVT)) in X86SelectZExt()
1122 isTypeLegal(TI->getOperand(0)->getType(), SourceVT)) { in X86SelectBranch()
1211 if (!isTypeLegal(I->getType(), VT)) in X86SelectShift()
1238 if (!isTypeLegal(I->getType(), VT)) in X86SelectSelect()
[all …]
DX86ISelLowering.cpp5108 DAG.getTargetLoweringInfo().isTypeLegal(MVT::v2i64)) { in EltsFromConsecutiveLoads()
6685 if (!isTypeLegal(NVT)) in LowerVectorIntExtend()
12019 !DAG.getTargetLoweringInfo().isTypeLegal(VT)) { in LowerATOMIC_STORE()
12037 if (!DAG.getTargetLoweringInfo().isTypeLegal(VT)) in LowerADDC_ADDE_SUBC_SUBE()
12283 if (!TLI.isTypeLegal(N->getOperand(0).getValueType())) in ReplaceNodeResults()
14882 if (!DCI.isBeforeLegalize() && !TLI.isTypeLegal(VT.getVectorElementType())) in PerformShuffleCombine()
15191 VT != MVT::f80 && DAG.getTargetLoweringInfo().isTypeLegal(VT) && in PerformSELECTCombine()
15335 if (DAG.getTargetLoweringInfo().isTypeLegal(LHS.getValueType())) { in PerformSELECTCombine()
15988 if (!DAG.getTargetLoweringInfo().isTypeLegal(EltVT) && in PerformShiftCombine()
16595 if (TLI.isTypeLegal(Tp) && ((MemSz % Tp.getSizeInBits()) == 0)) { in PerformLOADCombine()
[all …]
/external/llvm/include/llvm/Target/
DTargetLowering.h256 bool isTypeLegal(EVT VT) const { in isTypeLegal() function
407 return (VT == MVT::Other || isTypeLegal(VT)) && in isOperationLegalOrCustom()
416 return (VT == MVT::Other || isTypeLegal(VT)) && in isOperationLegalOrPromote()
425 return (!isTypeLegal(VT) || getOperationAction(Op, VT) == Expand); in isOperationExpand()
431 return (VT == MVT::Other || isTypeLegal(VT)) && in isOperationLegal()
466 return isTypeLegal(ValVT) && MemVT.isSimple() && in isTruncStoreLegal()
556 } while (!isTypeLegal(NVT) || in getTypeToPromoteTo()
1866 return isTypeLegal(VT); in isTypeDesirableForOp()
/external/llvm/lib/Analysis/
DTargetTransformInfo.cpp115 bool TargetTransformInfo::isTypeLegal(Type *Ty) const { in isTypeLegal() function in TargetTransformInfo
116 return PrevTTI->isTypeLegal(Ty); in isTypeLegal()
462 bool isTypeLegal(Type *Ty) const { in isTypeLegal() function
/external/llvm/include/llvm/Analysis/
DTargetTransformInfo.h234 virtual bool isTypeLegal(Type *Ty) const;
/external/llvm/lib/Target/ARM/
DARMFastISel.cpp178 bool isTypeLegal(Type *Ty, MVT &VT);
767 bool ARMFastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal() function in ARMFastISel
776 return TLI.isTypeLegal(VT); in isTypeLegal()
780 if (isTypeLegal(Ty, VT)) return true; in isLoadTypeLegal()
1592 if (!isTypeLegal(Ty, DstVT)) in SelectIToFP()
1637 if (!isTypeLegal(RetTy, DstVT)) in SelectFPToI()
1666 if (!isTypeLegal(I->getType(), VT)) in SelectSelect()
1728 if (!isTypeLegal(Ty, VT)) in SelectDiv()
1756 if (!isTypeLegal(Ty, VT)) in SelectRem()
2207 else if (!isTypeLegal(RetTy, RetVT)) in ARMEmitLibcall()
[all …]
DARMISelLowering.cpp3454 if (SrcVT == MVT::i64 && TLI.isTypeLegal(DstVT)) { in ExpandBITCAST()
3464 if (DstVT == MVT::i64 && TLI.isTypeLegal(SrcVT)) { in ExpandBITCAST()
8012 if(!DAG.getTargetLoweringInfo().isTypeLegal(VT)) in PerformANDCombine()
8055 if(!DAG.getTargetLoweringInfo().isTypeLegal(VT)) in PerformORCombine()
8095 DAG.getTargetLoweringInfo().isTypeLegal(VT)) { in PerformORCombine()
8242 if(!DAG.getTargetLoweringInfo().isTypeLegal(VT)) in PerformXORCombine()
8381 if (!TLI.isTypeLegal(WideVecVT)) return SDValue(); in PerformSTORECombine()
8394 if (TLI.isTypeLegal(Tp) && Tp.getSizeInBits() <= NumElems * ToEltSz) in PerformSTORECombine()
8398 if (!TLI.isTypeLegal(StoreType)) in PerformSTORECombine()
8579 if (!TLI.isTypeLegal(VT) || in PerformVECTOR_SHUFFLECombine()
[all …]
/external/llvm/lib/Transforms/Scalar/
DCodeGenPrepare.cpp1708 TLI && (TLI->isTypeLegal(TLI->getValueType(LI->getType())) || in MoveExtToFormExtLoad()
1709 !TLI->isTypeLegal(TLI->getValueType(I->getType()))) && in MoveExtToFormExtLoad()
/external/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.cpp1254 if (isTypeLegal(VT)) in isTypeSupportedInIntrinsic()
1258 if (isTypeLegal(eVT)) in isTypeSupportedInIntrinsic()
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp2742 if(!DAG.getTargetLoweringInfo().isTypeLegal(VT)) in PerformORCombine()

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