Home
last modified time | relevance | path

Searched defs:Opc (Results 1 – 25 of 102) sorted by relevance

12345

/external/llvm/lib/Target/ARM/
DARMBaseInstrInfo.h343 bool isUncondBranchOpcode(int Opc) { in isUncondBranchOpcode()
348 bool isCondBranchOpcode(int Opc) { in isCondBranchOpcode()
353 bool isJumpTableBranchOpcode(int Opc) { in isJumpTableBranchOpcode()
359 bool isIndirectBranchOpcode(int Opc) { in isIndirectBranchOpcode()
DARMISelDAGToDAG.cpp116 SDValue &Opc) { in SelectAddrMode2Base()
121 SDValue &Opc) { in SelectAddrMode2ShOp()
126 SDValue &Opc) { in SelectAddrMode2()
307 static bool isOpcWithIntImmediate(SDNode *N, unsigned Opc, unsigned& Imm) { in isOpcWithIntImmediate()
478 SDValue &Opc, in SelectImmShifterOperand()
502 SDValue &Opc, in SelectRegShifterOperand()
580 SDValue &Opc) { in SelectLdStSOReg()
679 SDValue &Opc) { in SelectAddrMode2Worker()
815 SDValue &Offset, SDValue &Opc) { in SelectAddrMode2OffsetReg()
851 SDValue &Offset, SDValue &Opc) { in SelectAddrMode2OffsetImmPre()
[all …]
DARMFastISel.cpp523 unsigned Opc; in ARMMaterializeFP() local
549 unsigned Opc = is64bit ? ARM::VLDRD : ARM::VLDRS; in ARMMaterializeFP() local
568 unsigned Opc = isThumb2 ? ARM::t2MOVi16 : ARM::MOVi16; in ARMMaterializeInt() local
584 unsigned Opc = isThumb2 ? ARM::t2MVNi : ARM::MVNi; in ARMMaterializeInt() local
643 unsigned Opc; in ARMMaterializeGV() local
680 unsigned Opc = (RelocM!=Reloc::PIC_) ? ARM::t2LDRpci : ARM::t2LDRpci_pic; in ARMMaterializeGV() local
695 unsigned Opc = IsIndirect ? ARM::PICLDR : ARM::PICADD; in ARMMaterializeGV() local
762 unsigned Opc = isThumb2 ? ARM::t2ADDri : ARM::ADDri; in TargetMaterializeAlloca() local
941 unsigned Opc = isThumb2 ? ARM::t2ADDri : ARM::ADDri; in ARMSimplifyAddress() local
1009 unsigned Opc; in ARMEmitLoad() local
[all …]
DARMInstrInfo.cpp123 unsigned Opc = TM->getSubtarget<ARMSubtarget>().isThumb2() ? in runOnMachineFunction() local
DThumb1RegisterInfo.cpp129 int Opc = (isSub) ? ARM::tSUBrr : (isHigh ? ARM::tADDhirr : ARM::tADDrr); in emitThumbRegPlusImmInReg() local
143 static unsigned calcNumMI(int Opc, int ExtraOpc, unsigned Bytes, in calcNumMI()
182 int Opc = 0; in emitThumbRegPlusImmediate() local
DARMLoadStoreOptimizer.cpp262 static bool isT2i32Load(unsigned Opc) { in isT2i32Load()
266 static bool isi32Load(unsigned Opc) { in isi32Load()
270 static bool isT2i32Store(unsigned Opc) { in isT2i32Store()
274 static bool isi32Store(unsigned Opc) { in isi32Store()
631 static unsigned getUpdatingLSMultipleOpcode(unsigned Opc, in getUpdatingLSMultipleOpcode()
793 static unsigned getPreIndexedLoadStoreOpcode(unsigned Opc, in getPreIndexedLoadStoreOpcode()
818 static unsigned getPostIndexedLoadStoreOpcode(unsigned Opc, in getPostIndexedLoadStoreOpcode()
1842 int Opc = MI->getOpcode(); in RescheduleLoadStoreInstrs() local
DThumb2InstrInfo.cpp261 unsigned Opc = 0; in emitT2RegPlusImmediate() local
612 unsigned Opc = MI->getOpcode(); in getITInstrPredicate() local
/external/llvm/lib/Target/Hexagon/
DHexagonCFGOptimizer.cpp60 static bool IsConditionalBranch(int Opc) { in IsConditionalBranch()
66 static bool IsUnconditionalJump(int Opc) { in IsUnconditionalJump()
113 int Opc = MI->getOpcode(); in runOnMachineFunction() local
DHexagonExpandPredSpillCode.cpp85 int Opc = MI->getOpcode(); in runOnMachineFunction() local
DHexagonSplitConst32AndConst64.cpp83 int Opc = MI->getOpcode(); in runOnMachineFunction() local
/external/llvm/lib/Target/X86/
DX86FrameLowering.cpp107 unsigned Opc = MBBI->getOpcode(); in findDeadCallerSavedReg() local
152 unsigned Opc; in emitSPUpdate() local
209 unsigned Opc = PI->getOpcode(); in mergeSPUpdatesUp() local
239 unsigned Opc = NI->getOpcode(); in mergeSPUpdatesDown() local
271 unsigned Opc = PI->getOpcode(); in mergeSPUpdates() local
516 unsigned Opc = MI.getOpcode(); in getCompactUnwindEncoding() local
944 unsigned Opc = Is64Bit ? X86::MOV64rr : X86::MOV32rr; in emitPrologue() local
1047 unsigned Opc = PI->getOpcode(); in emitEpilogue() local
1071 unsigned Opc = getLEArOpcode(IsLP64); in emitEpilogue() local
1075 unsigned Opc = (Is64Bit ? X86::MOV64rr : X86::MOV32rr); in emitEpilogue() local
[all …]
DX86InstrInfo.cpp1718 unsigned Opc = Orig->getOpcode(); in reMaterialize() local
1767 unsigned Opc, bool AllowSP, in classifyLEAReg()
1854 unsigned Opc, leaInReg; in convertToThreeAddressWithLEA() local
2034 unsigned Opc = is64Bit ? X86::LEA64_32r : X86::LEA32r; in convertToThreeAddress() local
2075 unsigned Opc = MIOpc == X86::INC64r ? X86::LEA64r in convertToThreeAddress() local
2105 unsigned Opc = MIOpc == X86::DEC64r ? X86::LEA64r in convertToThreeAddress() local
2138 unsigned Opc; in convertToThreeAddress() local
2211 unsigned Opc = is64Bit ? X86::LEA64_32r : X86::LEA32r; in convertToThreeAddress() local
2269 unsigned Opc; in commuteInstruction() local
2306 unsigned Opc; in commuteInstruction() local
[all …]
DX86FastISel.cpp182 unsigned Opc = 0; in X86FastEmitLoad() local
241 unsigned Opc = 0; in X86FastEmitStore() local
301 unsigned Opc = 0; in X86FastEmitStore() local
335 bool X86FastISel::X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT, in X86FastEmitExtend()
550 unsigned Opc = 0; in X86SelectAddress() local
1440 unsigned Opc = 0; in X86SelectSelect() local
1710 unsigned Opc = X86::SETBr; in X86VisitIntrinsicCall() local
2238 unsigned Opc = ResVT == MVT::f32 ? X86::ST_Fp80m32 : X86::ST_Fp80m64; in DoSelectCall() local
2324 unsigned Opc = 0; in TargetMaterializeConstant() local
2432 unsigned Opc = Subtarget->is64Bit() ? X86::LEA64r : X86::LEA32r; in TargetMaterializeAlloca() local
[all …]
DX86ISelDAGToDAG.cpp1561 SDNode *X86DAGToDAGISel::SelectAtomic64(SDNode *Node, unsigned Opc) { in SelectAtomic64()
1795 unsigned Opc = 0; in SelectAtomicLoadArith() local
1917 static bool isLoadIncOrDecStore(StoreSDNode *StoreNode, unsigned Opc, in isLoadIncOrDecStore()
2002 static unsigned getFusedLdStOpcode(EVT &LdVT, unsigned Opc) { in getFusedLdStOpcode()
2020 SDNode *X86DAGToDAGISel::SelectGather(SDNode *Node, unsigned Opc) { in SelectGather()
2051 unsigned Opc, MOpc; in Select() local
2086 unsigned Opc; in Select() local
2130 unsigned Opc; in Select() local
2739 unsigned Opc = StoredVal->getOpcode(); in Select() local
/external/llvm/lib/Target/Mips/
DMipsSEInstrInfo.cpp50 unsigned Opc = MI->getOpcode(); in isLoadFromStackSlot() local
75 unsigned Opc = MI->getOpcode(); in isStoreToStackSlot() local
95 unsigned Opc = 0, ZeroReg = 0; in copyPhysReg() local
186 unsigned Opc = 0; in storeRegToStack() local
219 unsigned Opc = 0; in loadRegFromStack() local
391 MipsSEInstrInfo::compareOpndSize(unsigned Opc, in compareOpndSize()
DMipsAnalyzeImmediate.h20 unsigned Opc, ImmOpnd; member
DMipsInstrInfo.cpp68 void MipsInstrInfo::AnalyzeCondBr(const MachineInstr *Inst, unsigned Opc, in AnalyzeCondBr()
98 unsigned Opc = Cond[0].getImm(); in BuildCondBr() local
DMips16ISelDAGToDAG.cpp45 Mips16DAGToDAGISel::selectMULT(SDNode *N, unsigned Opc, SDLoc DL, EVT Ty, in selectMULT()
255 unsigned Opc = InFlag.getOpcode(); (void)Opc; in selectNode() local
DMips16InstrInfo.cpp72 unsigned Opc = 0; in copyPhysReg() local
108 unsigned Opc = 0; in storeRegToStack() local
124 unsigned Opc = 0; in loadRegFromStack() local
DMipsSEISelLowering.cpp46 for (unsigned Opc = 0; Opc < ISD::BUILTIN_OP_END; ++Opc) in MipsSETargetLowering() local
389 static SDValue performDSPShiftCombine(unsigned Opc, SDNode *N, EVT Ty, in performDSPShiftCombine()
619 static SDValue lowerDSPIntr(SDValue Op, SelectionDAG &DAG, unsigned Opc) { in lowerDSPIntr()
/external/llvm/lib/Target/XCore/
DXCoreInstrInfo.cpp290 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm()); in InsertBranch() local
299 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm()); in InsertBranch() local
/external/llvm/lib/Target/PowerPC/
DPPCFastISel.cpp141 unsigned Opc = (VT == MVT::f32) ? PPC::LFS : PPC::LFD; in PPCMaterializeFP() local
257 unsigned Opc = (VT == MVT::i64) ? PPC::LI8 : PPC::LI; in PPCMaterializeInt() local
DPPCCTRLoops.cpp564 unsigned Opc = I->getOpcode(); in verifyCTRBranch() local
626 unsigned Opc = MII->getOpcode(); in runOnMachineFunction() local
DPPCISelDAGToDAG.cpp327 static bool isOpcWithIntImmediate(SDNode *N, unsigned Opc, unsigned& Imm) { in isOpcWithIntImmediate()
474 unsigned Opc; in SelectCC() local
968 unsigned Opc = N->getValueType(0) == MVT::i32 ? PPC::ADDI : PPC::ADDI8; in Select() local
1254 unsigned Opc = Target.getValueType() == MVT::i32 ? PPC::MTCTR : PPC::MTCTR8; in Select() local
/external/llvm/lib/MC/
DMCExpr.cpp142 const MCBinaryExpr *MCBinaryExpr::Create(Opcode Opc, const MCExpr *LHS, in Create()
147 const MCUnaryExpr *MCUnaryExpr::Create(Opcode Opc, const MCExpr *Expr, in Create()

12345