Searched refs:CopyFromReg (Results 1 – 17 of 17) sorted by relevance
/external/llvm/lib/CodeGen/SelectionDAG/ |
D | ResourcePriorityQueue.cpp | 89 case ISD::CopyFromReg: NumberDeps++; break; in numberRCValPredInSU() 126 case ISD::CopyFromReg: break; in numberRCValSuccInSU() 458 case ISD::CopyFromReg: in SUSchedulingCost() 564 case ISD::CopyFromReg: in initNumRegDefsLeft()
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D | InstrEmitter.cpp | 336 Op.getNode()->getOpcode() != ISD::CopyFromReg && in AddRegisterOperand() 800 if (F->getOpcode() == ISD::CopyFromReg) { in EmitMachineNode() 865 case ISD::CopyFromReg: { in EmitSpecialNode()
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D | ScheduleDAGRRList.cpp | 288 if (!Node->isMachineOpcode() && Node->getOpcode() == ISD::CopyFromReg) { in GetCostForDef() 681 case ISD::CopyFromReg: in EmitNode() 2136 if (PN->getOpcode() == ISD::CopyFromReg) { in unscheduledNode() 2230 PredSU->getNode()->getOpcode() == ISD::CopyFromReg) { in hasOnlyLiveInOpers() 2304 assert(PredSU->getNode()->getOpcode() == ISD::CopyFromReg && in resetVRegCycle() 2322 I->getSUnit()->getNode()->getOpcode() == ISD::CopyFromReg) { in hasVRegCycleUse() 2854 if (N->getOpcode() == ISD::CopyFromReg && in PrescheduleNodesWithMultipleUses()
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D | SelectionDAGDumper.cpp | 126 case ISD::CopyFromReg: return "CopyFromReg"; in getOperationName()
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D | ScheduleDAGSDNodes.cpp | 532 if (Node->getOpcode() == ISD::CopyFromReg) in InitNodeNumDefs()
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D | SelectionDAGISel.cpp | 1753 UserOpcode == ISD::CopyFromReg || in WalkChainUsers() 2169 case ISD::CopyFromReg: in SelectCodeCommon()
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D | SelectionDAGBuilder.cpp | 4363 if (CFR.getOpcode() == ISD::CopyFromReg) in getTruncatedArgReg() 4397 if (N.getOpcode() == ISD::CopyFromReg) in EmitFuncArgumentDbgValue() 6618 assert((Op.getOpcode() != ISD::CopyFromReg || in CopyValueToVirtualRegister() 6840 if (!TM.Options.EnableFastISel && Res.getOpcode() == ISD::CopyFromReg) { in LowerArguments()
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/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 151 CopyFromReg, enumerator
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D | SelectionDAG.h | 467 return getNode(ISD::CopyFromReg, dl, VTs, Ops, 2); 477 return getNode(ISD::CopyFromReg, dl, VTs, Ops, Glue.getNode() ? 3 : 2);
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/external/llvm/lib/Target/X86/ |
D | README-X86-64.txt | 46 emits a CopyFromReg which gets turned into a movb and that can be allocated a 49 To get around this, isel emits a CopyFromReg from AX and then right shift it
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D | X86InstrCompiler.td | 1144 // register. Truncate can be lowered to EXTRACT_SUBREG. CopyFromReg may 1151 N->getOpcode() != ISD::CopyFromReg &&
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D | X86ISelDAGToDAG.cpp | 1150 RHS.getNode()->getOpcode() == ISD::CopyFromReg || in MatchAddressRecursively()
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D | X86ISelLowering.cpp | 2970 if (Arg.getOpcode() == ISD::CopyFromReg) { in MatchingStackOffset() 10138 T1.getOpcode() != ISD::CopyFromReg && T2.getOpcode()!=ISD::CopyFromReg){ in LowerSELECT()
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/external/llvm/lib/Target/R600/ |
D | SIISelLowering.cpp | 684 case ISD::CopyFromReg: { in getRegClassForNode()
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/external/llvm/lib/Target/MSP430/ |
D | MSP430InstrInfo.td | 294 // register. Truncate can be lowered to EXTRACT_SUBREG, and CopyFromReg may 300 N->getOpcode() != ISD::CopyFromReg;
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/external/llvm/lib/Target/Sparc/ |
D | SparcISelLowering.cpp | 1149 if (SrcReg->getReg() == Reg && Chain->getOpcode() == ISD::CopyFromReg) in LowerCall_64()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 1876 if (Arg.getOpcode() == ISD::CopyFromReg) { in MatchingStackOffset()
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