Home
last modified time | relevance | path

Searched refs:MachineInstrBuilder (Results 1 – 25 of 70) sorted by relevance

123

/external/llvm/include/llvm/CodeGen/
DMachineInstrBuilder.h45 class MachineInstrBuilder {
49 MachineInstrBuilder() : MF(0), MI(0) {} in MachineInstrBuilder() function
53 MachineInstrBuilder(MachineFunction &F, MachineInstr *I) : MF(&F), MI(I) {} in MachineInstrBuilder() function
64 MachineInstrBuilder &addReg(unsigned RegNo, unsigned flags = 0,
83 const MachineInstrBuilder &addImm(int64_t Val) const { in addImm()
88 const MachineInstrBuilder &addCImm(const ConstantInt *Val) const { in addCImm()
93 const MachineInstrBuilder &addFPImm(const ConstantFP *Val) const { in addFPImm()
98 const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB,
104 const MachineInstrBuilder &addFrameIndex(int Idx) const { in addFrameIndex()
109 const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx,
[all …]
/external/llvm/lib/Target/X86/
DX86InstrBuilder.h89 static inline const MachineInstrBuilder &
90 addDirectMem(const MachineInstrBuilder &MIB, unsigned Reg) { in addDirectMem()
97 static inline const MachineInstrBuilder &
98 addOffset(const MachineInstrBuilder &MIB, int Offset) { in addOffset()
106 static inline const MachineInstrBuilder &
107 addRegOffset(const MachineInstrBuilder &MIB, in addRegOffset()
114 static inline const MachineInstrBuilder &addRegReg(const MachineInstrBuilder &MIB, in addRegReg()
121 static inline const MachineInstrBuilder &
122 addFullAddress(const MachineInstrBuilder &MIB, in addFullAddress()
147 static inline const MachineInstrBuilder &
[all …]
/external/llvm/lib/Target/ARM/
DARMBaseInstrInfo.h138 const MachineInstrBuilder &AddDReg(MachineInstrBuilder &MIB, unsigned Reg,
322 const MachineInstrBuilder &AddDefaultPred(const MachineInstrBuilder &MIB) { in AddDefaultPred()
327 const MachineInstrBuilder &AddDefaultCC(const MachineInstrBuilder &MIB) { in AddDefaultCC()
332 const MachineInstrBuilder &AddDefaultT1CC(const MachineInstrBuilder &MIB,
338 const MachineInstrBuilder &AddNoT1CC(const MachineInstrBuilder &MIB) { in AddNoT1CC()
DARMExpandPseudoInsts.cpp55 MachineInstrBuilder &UseMI, MachineInstrBuilder &DefMI);
73 MachineInstrBuilder &UseMI, in TransferImpOps()
74 MachineInstrBuilder &DefMI) { in TransferImpOps()
383 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandVLD()
448 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandVST()
500 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandLaneOp()
584 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc)); in ExpandVTBL()
621 MachineInstrBuilder LO16, HI16; in ExpandMOV32BitImm()
839 MachineInstrBuilder MIB = in ExpandMI()
851 MachineInstrBuilder MIB = in ExpandMI()
[all …]
DThumb1RegisterInfo.cpp130 MachineInstrBuilder MIB = in emitThumbRegPlusImmInReg()
242 const MachineInstrBuilder MIB = in emitThumbRegPlusImmediate()
261 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg); in emitThumbRegPlusImmediate()
269 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg); in emitThumbRegPlusImmediate()
352 MachineInstrBuilder MIB(*MBB.getParent(), &MI); in rewriteFrameIndex()
569 MachineInstrBuilder MIB(*MBB.getParent(), &MI); in eliminateFrameIndex()
DThumb1FrameLowering.cpp320 MachineInstrBuilder MIB = in emitEpilogue()
344 MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, TII.get(ARM::tPUSH)); in spillCalleeSavedRegisters()
383 MachineInstrBuilder MIB = BuildMI(MF, DL, TII.get(ARM::tPOP)); in restoreCalleeSavedRegisters()
DThumb2InstrInfo.cpp157 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(ARM::t2STRDi8)); in storeRegToStackSlot()
198 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(ARM::t2LDRDi8)); in loadRegFromStackSlot()
314 MachineInstrBuilder MIB = in emitT2RegPlusImmediate()
446 MachineInstrBuilder MIB(*MI.getParent()->getParent(), &MI); in rewriteT2FrameIndex()
/external/llvm/lib/CodeGen/SelectionDAG/
DInstrEmitter.h25 class MachineInstrBuilder; variable
53 MachineInstrBuilder &MIB,
66 void AddRegisterOperand(MachineInstrBuilder &MIB,
77 void AddOperand(MachineInstrBuilder &MIB,
DInstrEmitter.cpp207 MachineInstrBuilder &MIB, in CreateVirtualRegisters()
295 InstrEmitter::AddRegisterOperand(MachineInstrBuilder &MIB, in AddRegisterOperand()
357 void InstrEmitter::AddOperand(MachineInstrBuilder &MIB, in AddOperand()
540 MachineInstrBuilder MIB = in EmitSubregNode()
597 MachineInstrBuilder MIB = BuildMI(*MF, Node->getDebugLoc(), II, NewVReg); in EmitRegSequence()
647 MachineInstrBuilder MIB = BuildMI(*MF, DL, II); in EmitDbgValue()
742 MachineInstrBuilder MIB = BuildMI(*MF, Node->getDebugLoc(), II); in EmitMachineNode()
894 MachineInstrBuilder MIB = BuildMI(*MF, Node->getDebugLoc(), in EmitSpecialNode()
/external/llvm/lib/Target/Mips/
DMips16InstrInfo.cpp91 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(Opc)); in copyPhysReg()
199 MachineInstrBuilder MIB1 = BuildMI(MBB, I, DL, get(Mips::SwRxSpImmX16), in makeFrame()
203 MachineInstrBuilder MIB2 = BuildMI(MBB, I, DL, get(Mips::SwRxSpImmX16), in makeFrame()
207 MachineInstrBuilder MIB3 = BuildMI(MBB, I, DL, get(Mips::SwRxSpImmX16), in makeFrame()
239 MachineInstrBuilder MIB1 = BuildMI(MBB, I, DL, get(Mips::LwRxSpImmX16), in restoreFrame()
243 MachineInstrBuilder MIB0 = BuildMI(MBB, I, DL, get(Mips::Move32R16), in restoreFrame()
246 MachineInstrBuilder MIB2 = BuildMI(MBB, I, DL, get(Mips::LwRxSpImmX16), in restoreFrame()
250 MachineInstrBuilder MIB3 = BuildMI(MBB, I, DL, get(Mips::LwRxSpImmX16), in restoreFrame()
278 MachineInstrBuilder MIB1 = BuildMI(MBB, I, DL, get(Mips::LwConstant32), Reg1); in adjustStackPtrBig()
280 MachineInstrBuilder MIB2 = BuildMI(MBB, I, DL, get(Mips::MoveR3216), Reg2); in adjustStackPtrBig()
[all …]
DMipsInstrInfo.cpp100 MachineInstrBuilder MIB = BuildMI(&MBB, DL, MCID); in BuildCondBr()
277 MachineInstrBuilder
280 MachineInstrBuilder MIB; in genInstrWithNewOpc()
/external/llvm/lib/Target/PowerPC/
DPPCInstrBuilder.h32 static inline const MachineInstrBuilder&
33 addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0,
/external/llvm/lib/Target/SystemZ/
DSystemZInstrBuilder.h26 static inline const MachineInstrBuilder &
27 addFrameReference(const MachineInstrBuilder &MIB, int FI) { in addFrameReference()
DSystemZElimCompare.cpp204 MachineInstrBuilder(*Branch->getParent()->getParent(), Branch) in convertToBRCT()
221 MachineInstrBuilder(*MI->getParent()->getParent(), MI) in convertToLoadAndTest()
407 MachineInstrBuilder(*Branch->getParent()->getParent(), Branch) in fuseCompareAndBranch()
/external/llvm/lib/Target/R600/
DR600InstrInfo.h30 class MachineInstrBuilder; variable
204 virtual MachineInstrBuilder buildIndirectWrite(MachineBasicBlock *MBB,
209 virtual MachineInstrBuilder buildIndirectRead(MachineBasicBlock *MBB,
225 MachineInstrBuilder buildDefaultInstruction(MachineBasicBlock &MBB,
DSIInstrInfo.h63 virtual MachineInstrBuilder buildIndirectWrite(MachineBasicBlock *MBB,
69 virtual MachineInstrBuilder buildIndirectRead(MachineBasicBlock *MBB,
DAMDGPUInstrInfo.h39 class MachineInstrBuilder; variable
177 virtual MachineInstrBuilder buildIndirectWrite(MachineBasicBlock *MBB,
185 virtual MachineInstrBuilder buildIndirectRead(MachineBasicBlock *MBB,
DSIInstrInfo.cpp160 MachineInstrBuilder Builder = BuildMI(MBB, MI, DL, in copyPhysReg()
203 MachineInstrBuilder MIB(*MF, MI); in getMovImmInstr()
255 MachineInstrBuilder SIInstrInfo::buildIndirectWrite( in buildIndirectWrite()
263 MachineInstrBuilder SIInstrInfo::buildIndirectRead( in buildIndirectRead()
DAMDGPUIndirectAddressing.cpp115 MachineInstrBuilder MOV = TII->buildIndirectWrite(BB, I, in runOnMachineFunction()
189 MachineInstrBuilder Phi = BuildMI(MBB, MBB.begin(), in runOnMachineFunction()
282 MachineInstrBuilder Sequence = BuildMI(MBB, I, MBB.findDebugLoc(I), in runOnMachineFunction()
303 MachineInstrBuilder Mov = TII->buildIndirectRead(BB, I, in runOnMachineFunction()
DR600InstrInfo.cpp83 MachineInstrBuilder MIB(*MF, MI); in getMovImmInstr()
948 MachineInstrBuilder MIB(*MI->getParent()->getParent(), MI); in PredicateInstruction()
1043 MachineInstrBuilder R600InstrInfo::buildIndirectWrite(MachineBasicBlock *MBB, in buildIndirectWrite()
1052 MachineInstrBuilder Mov = buildDefaultInstruction(*MBB, I, AMDGPU::MOV, in buildIndirectWrite()
1060 MachineInstrBuilder R600InstrInfo::buildIndirectRead(MachineBasicBlock *MBB, in buildIndirectRead()
1069 MachineInstrBuilder Mov = buildDefaultInstruction(*MBB, I, AMDGPU::MOV, in buildIndirectRead()
1087 MachineInstrBuilder R600InstrInfo::buildDefaultInstruction(MachineBasicBlock &MBB, in buildDefaultInstruction()
1093 MachineInstrBuilder MIB = BuildMI(MBB, I, MBB.findDebugLoc(I), get(Opcode), in buildDefaultInstruction()
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
DSIInstrInfo.cpp56 MachineInstrBuilder(MI).addReg(DstReg, RegState::Define); in getMovImmInstr()
57 MachineInstrBuilder(MI).addImm(Imm); in getMovImmInstr()
DR600InstrInfo.cpp82 MachineInstrBuilder(MI).addReg(DstReg, RegState::Define); in getMovImmInstr()
83 MachineInstrBuilder(MI).addReg(AMDGPU::ALU_LITERAL_X); in getMovImmInstr()
84 MachineInstrBuilder(MI).addImm(Imm); in getMovImmInstr()
85 MachineInstrBuilder(MI).addReg(0); // PREDICATE_BIT in getMovImmInstr()
463 MachineInstrBuilder(MI).addReg(AMDGPU::PREDICATE_BIT, RegState::Implicit); in PredicateInstruction()
/external/mesa3d/src/gallium/drivers/radeon/
DSIInstrInfo.cpp56 MachineInstrBuilder(MI).addReg(DstReg, RegState::Define); in getMovImmInstr()
57 MachineInstrBuilder(MI).addImm(Imm); in getMovImmInstr()
DR600InstrInfo.cpp82 MachineInstrBuilder(MI).addReg(DstReg, RegState::Define); in getMovImmInstr()
83 MachineInstrBuilder(MI).addReg(AMDGPU::ALU_LITERAL_X); in getMovImmInstr()
84 MachineInstrBuilder(MI).addImm(Imm); in getMovImmInstr()
85 MachineInstrBuilder(MI).addReg(0); // PREDICATE_BIT in getMovImmInstr()
463 MachineInstrBuilder(MI).addReg(AMDGPU::PREDICATE_BIT, RegState::Implicit); in PredicateInstruction()
/external/llvm/lib/CodeGen/
DMachineSSAUpdater.cpp112 MachineInstrBuilder InsertNewDef(unsigned Opcode, in InsertNewDef()
186 MachineInstrBuilder InsertedPHI = InsertNewDef(TargetOpcode::PHI, BB, in GetValueInMiddleOfBlock()
318 MachineInstrBuilder(*Pred->getParent(), PHI).addReg(Val).addMBB(Pred); in AddPHIOperand()

123