| /external/llvm/lib/Target/R600/ |
| D | SIInstrFormats.td | 56 let mayStore = 0;
74 let mayStore = 0;
91 let mayStore = 0;
107 let mayStore = 0;
124 let mayStore = 0;
163 let mayStore = 0;
181 let mayStore = 0;
209 let mayStore = 0;
235 let mayStore = 0;
252 let mayStore = 0;
[all …]
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| D | SIInstrInfo.td | 308 let mayStore = 0;
318 let mayStore = 1;
332 let mayStore = 1;
368 let mayStore = 1;
391 let mayStore = 0;
405 let mayStore = 0;
419 let mayStore = 0;
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| D | SIInsertWaits.cpp | 132 (MI.getOpcode() == AMDGPU::EXP || MI.getDesc().mayStore())); in getHwCounts()
169 if (!MI.getDesc().mayStore()) in isOpRelevant()
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| D | AMDILInstrInfo.td | 113 let mayStore = 0;
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| D | R600Instructions.td | 85 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in {
214 } // End mayLoad = 1, mayStore = 0, hasSideEffects = 0
820 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in {
855 } // End mayLoad = 0, mayStore = 0, hasSideEffects = 0
966 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in {
982 } // End mayLoad = 0, mayStore = 0, hasSideEffects = 0
1978 let mayLoad = 0, mayStore = 0, hasSideEffects = 1 in {
1987 } // End mayLoad = 0, mayStore = 0, hasSideEffects = 1
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| /external/llvm/lib/Target/ARM/ |
| D | ARMHazardRecognizer.cpp | 24 if (MI->mayStore()) in hasRAWHazard()
56 (LastMI->mayLoad() || LastMI->mayStore())) && in getHazardType()
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| D | MLxExpansionPass.cpp | 188 if (MI->mayStore()) in hasRAWHazard()
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| D | ARMFrameLowering.cpp | 867 assert(MI->mayStore() && "Expecting spill instruction"); in skipAlignedDPRCS2Spills()
873 assert(MI->mayStore() && "Expecting spill instruction"); in skipAlignedDPRCS2Spills()
876 assert(MI->mayStore() && "Expecting spill instruction"); in skipAlignedDPRCS2Spills()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonVLIWPacketizer.cpp | 502 if (MI->getDesc().mayStore()) { in GetPostIncrementOperand()
564 if (PacketSU->getInstr()->getDesc().mayStore() || in CanPromoteToNewValueStore()
581 MI->getDesc().mayStore() && in CanPromoteToNewValueStore()
1062 if (MCIDI.mayStore() && MCIDJ.mayStore() && in isLegalToPacketizeTogether()
1068 if ((QII->isMemOp(J) && MCIDI.mayStore()) in isLegalToPacketizeTogether()
1069 || (MCIDJ.mayStore() && QII->isMemOp(I)) in isLegalToPacketizeTogether()
1076 if (MCIDJ.mayStore() && QII->isDeallocRet(I)) { in isLegalToPacketizeTogether()
1120 if (PacketSU->getInstr()->getDesc().mayStore() || in isLegalToPacketizeTogether()
1262 MCIDI.mayStore() && MCIDJ.mayStore()) { in isLegalToPacketizeTogether()
1270 else if ( !MCIDJ.mayStore()) { in isLegalToPacketizeTogether()
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| D | HexagonInstrFormatsV4.td | 45 let mayStore = 1 in
55 let mayLoad = 1, mayStore = 1 in
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| D | HexagonInstrFormats.td | 208 let mayStore = 1 in
217 let mayStore = 1 in
359 let mayStore = 1 in
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| /external/llvm/lib/Target/Mips/ |
| D | MipsDelaySlotFiller.cpp | 390 if (!MI.mayStore() && !MI.mayLoad()) in hasHazard()
399 SeenStore |= MI.mayStore(); in hasHazard()
412 if (MI.mayStore()) in hasHazard_()
442 HasHazard |= updateDefsUses(*I, MI.mayStore()); in hasHazard_()
448 HasHazard = MI.mayStore() && (OrigSeenLoad || OrigSeenStore); in hasHazard_()
452 SeenNoObjStore |= MI.mayStore(); in hasHazard_()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrBuilder.h | 35 if (MCID.mayStore()) in addFrameReference()
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| D | SystemZInstrFormats.td | 580 let mayStore = 1;
595 let mayStore = 1;
607 let mayStore = 1;
626 let mayStore = 1;
634 let mayStore = 1;
642 let mayStore = 1;
650 let mayStore = 1;
669 let mayStore = 1;
682 let mayStore = 1;
693 let mayStore = 1;
[all …]
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| /external/llvm/utils/TableGen/ |
| D | CodeGenDAGPatterns.cpp | 2473 bool mayStore; member in InstAnalyzer
2479 : CDP(cdp), hasSideEffects(false), mayStore(false), mayLoad(false), in InstAnalyzer()
2493 if (hasSideEffects || mayLoad || mayStore || isVariadic) in IsNodeBitcast()
2523 if (CP.hasProperty(SDNPMayStore)) mayStore = true; in AnalyzeNode()
2545 if (OpInfo.hasProperty(SDNPMayStore)) mayStore = true; in AnalyzeNode()
2556 mayStore = true;// Intrinsics that can write to memory are 'mayStore'. in AnalyzeNode()
2588 if (InstInfo.mayStore != PatInfo.mayStore && !InstInfo.mayStore_Unset) { in InferFromPattern()
2591 Twine(InstInfo.mayStore)); in InferFromPattern()
2606 InstInfo.mayStore |= PatInfo.mayStore; in InferFromPattern()
3085 NumStores += InstInfo.mayStore; in VerifyInstructionFlags()
[all …]
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| D | CodeGenInstruction.h | 230 bool mayStore; variable
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| D | DAGISelMatcherGen.cpp | 660 return II.mayLoad || II.mayStore; in mayInstNodeLoadOrStore()
706 && (II.hasCtrlDep || II.mayLoad || II.mayStore || II.canFoldAsLoad || in EmitResultInstructionAsOperand()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrBuilder.h | 156 if (MCID.mayStore())
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| D | X86InstrInfo.td | 853 let mayStore = 1, SchedRW = [WriteStore] in {
880 } // mayStore, SchedRW
892 let mayStore = 1, SchedRW = [WriteStore] in {
899 } // mayStore, SchedRW
902 let Defs = [RSP], Uses = [RSP], neverHasSideEffects = 1, mayStore = 1,
915 let Defs = [RSP], Uses = [RSP, EFLAGS], mayStore = 1, neverHasSideEffects=1 in
925 mayStore = 1, neverHasSideEffects = 1, SchedRW = [WriteStore] in {
1176 let mayStore = 1 in
1287 let mayLoad = 1, mayStore = 1, SchedRW = [WriteALULd, WriteRMW] in {
1307 let mayLoad = 1, mayStore = 1, SchedRW = [WriteALULd, WriteRMW] in {
[all …]
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCHazardRecognizers.cpp | 97 isStore = MCID.mayStore(); in GetInstrType()
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| /external/llvm/include/llvm/MC/ |
| D | MCInstrDesc.h | 357 bool mayStore() const { in mayStore() function
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| /external/llvm/lib/CodeGen/ |
| D | TargetInstrInfo.cpp | 369 NewMI->mayStore()) && in foldMemoryOperand()
463 if (MI->isNotDuplicable() || MI->mayStore() || in isReallyTriviallyReMaterializableGeneric()
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| D | ScheduleDAGInstrs.cpp | 506 if (!MIa->mayStore() && !MIb->mayStore()) in MIsNeedChainEdge()
794 unsigned TrueMemOrderLatency = MI->mayStore() ? 1 : 0; in buildSchedGraph()
850 } else if (MI->mayStore()) { in buildSchedGraph()
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| D | StackColoring.cpp | 575 bool TouchesMemory = I->mayLoad() || I->mayStore(); in remapInstructions()
614 if (!I->mayLoad() && !I->mayStore()) in removeInvalidSlotRanges()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreInstrInfo.td | 379 let mayStore=1 in {
451 let mayStore=1 in {
527 let mayStore=1 in
545 let mayStore=1 in {
601 let mayStore = 1 in
651 let Uses = [SP], Defs = [SP], mayStore = 1 in
1061 let Uses = [SP], mayStore = 1 in {
|