| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonCallingConvLower.h | 109 unsigned getFirstUnallocated(const unsigned *Regs, unsigned NumRegs) const { in getFirstUnallocated()
136 unsigned AllocateReg(const unsigned *Regs, unsigned NumRegs) { in AllocateReg()
149 unsigned NumRegs) { in AllocateReg()
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| /external/llvm/lib/Target/R600/ |
| D | SIMachineFunctionInfo.cpp | 73 MachineRegisterInfo &MRI, MachineFunction *MF, unsigned NumRegs) { in reserveLanes()
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| /external/llvm/include/llvm/CodeGen/ |
| D | CallingConvLower.h | 300 unsigned getFirstUnallocated(const MCPhysReg *Regs, unsigned NumRegs) const { in getFirstUnallocated()
327 unsigned AllocateReg(const MCPhysReg *Regs, unsigned NumRegs) { in AllocateReg()
341 unsigned AllocateRegBlock(const uint16_t *Regs, unsigned NumRegs, unsigned RegsRequired) { in AllocateRegBlock()
365 unsigned NumRegs) { in AllocateReg()
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| D | RegisterClassInfo.h | 29 unsigned NumRegs; member
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| /external/llvm/lib/CodeGen/ |
| D | RegisterClassInfo.cpp | 83 unsigned NumRegs = RC->getNumRegs(); in compute() local
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| D | VirtRegMap.cpp | 70 unsigned NumRegs = MF->getRegInfo().getNumVirtRegs(); in grow() local
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| D | StackMaps.cpp | 165 for (unsigned Reg = 0, NumRegs = TRI->getNumRegs(); Reg != NumRegs; ++Reg) in parseRegisterLiveOutMask() local
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| D | LiveVariables.cpp | 426 for (unsigned Reg = 1, NumRegs = TRI->getNumRegs(); Reg != NumRegs; ++Reg) { in HandleRegMask() local
505 unsigned NumRegs = TRI->getNumRegs(); in runOnMachineFunction() local
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| D | ExecutionDepsFix.cpp | 136 const unsigned NumRegs; member in __anonb8d554340311::ExeDepsFix
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| D | MachineLICM.cpp | 500 unsigned NumRegs = TRI->getNumRegs(); in HoistRegionPostRA() local
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| /external/llvm/lib/Target/ARM/ |
| D | ARMExpandPseudoInsts.cpp | 111 uint8_t NumRegs; // D registers loaded or stored member
387 unsigned NumRegs = TableEntry->NumRegs; in ExpandVLD() local
452 unsigned NumRegs = TableEntry->NumRegs; in ExpandVST() local
505 unsigned NumRegs = TableEntry->NumRegs; in ExpandLaneOp() local
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| D | ARMCallingConv.h | 197 unsigned NumRegs; in CC_ARM_AAPCS_Custom_HA() local
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| D | Thumb1FrameLowering.cpp | 466 bool NumRegs = false; in restoreCalleeSavedRegisters() local
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| D | ARMBaseInstrInfo.cpp | 2906 unsigned NumRegs = MI->getNumOperands() - Desc.getNumOperands(); in getNumMicroOps() local
2942 unsigned NumRegs = MI->getNumOperands() - Desc.getNumOperands() + 1; in getNumMicroOps() local
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| D | ARMISelDAGToDAG.cpp | 1653 unsigned NumRegs = NumVecs; in GetVLDSTAlign() local
3341 unsigned NumRegs = InlineAsm::getNumOperandRegisters(Flag); in SelectInlineAsm() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | FunctionLoweringInfo.cpp | 270 unsigned NumRegs = TLI->getNumRegisters(Ty->getContext(), ValueVT); in CreateRegs() local
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| D | SelectionDAGBuilder.cpp | 250 unsigned NumRegs = in getCopyFromPartsVector() local
534 unsigned NumRegs = TLI.getVectorTypeBreakdown(*DAG.getContext(), ValueVT, in getCopyToPartsVector() local
619 unsigned NumRegs = tli.getNumRegisters(Context, ValueVT); in RegsForValue() local
682 unsigned NumRegs = TLI.getNumRegisters(*DAG.getContext(), ValueVT); in getCopyFromRegs() local
769 unsigned NumRegs = Regs.size(); in getCopyToRegs() local
842 unsigned NumRegs = TLI.getNumRegisters(*DAG.getContext(), ValueVTs[Value]); in AddInlineAsmOperands() local
6126 unsigned NumRegs = 1; in GetRegistersForValue() local
7113 unsigned NumRegs = getNumRegisters(CLI.RetTy->getContext(), VT); in LowerCallTo() local
7308 unsigned NumRegs = getNumRegisters(CLI.RetTy->getContext(), VT); in LowerCallTo() local
7455 unsigned NumRegs = TLI->getNumRegisters(*CurDAG->getContext(), VT); in LowerArguments() local
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| D | FastISel.cpp | 271 void FastISel::UpdateValueMap(const Value *I, unsigned Reg, unsigned NumRegs) { in UpdateValueMap()
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| D | LegalizeDAG.cpp | 340 unsigned NumRegs = (StoredBytes + RegBytes - 1) / RegBytes; in ExpandUnalignedStore() local
461 unsigned NumRegs = (LoadedBytes + RegBytes - 1) / RegBytes; in ExpandUnalignedLoad() local
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| /external/llvm/lib/Target/R600/InstPrinter/ |
| D | AMDGPUInstPrinter.cpp | 62 unsigned NumRegs; in printRegOperand() local
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 1268 unsigned NumRegs) { in forwardCopyWillClobberTuple()
1283 unsigned NumRegs = Indices.size(); in copyPhysRegTuple() local
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| /external/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 156 unsigned NumRegs; // Number of entries in the array variable
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.h | 342 unsigned NumRegs; // Number of registers used for this argument. member
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| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.cpp | 1162 unsigned NumRegs = 1; in printVectorList() local
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| /external/chromium_org/v8/src/ |
| D | frames.cc | 1582 int NumRegs(RegList reglist) { return base::bits::CountPopulation32(reglist); } in NumRegs() function
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