| /external/llvm/include/llvm/MC/ |
| D | MachineLocation.h | 54 unsigned getReg() const { return Register; } in getReg() function
|
| D | MCInst.h | 63 unsigned getReg() const { in getReg() function
|
| /external/llvm/include/llvm/CodeGen/ |
| D | LiveRangeEdit.h | 133 unsigned getReg() const { return getParent().reg; } in getReg() function
|
| D | ScheduleDAG.h | 229 unsigned getReg() const { in getReg() function
|
| D | MachineFrameInfo.h | 46 unsigned getReg() const { return Reg; } in getReg() function
|
| D | MachineOperand.h | 264 unsigned getReg() const { in getReg() function
|
| D | CallingConvLower.h | 69 static CCValAssign getReg(unsigned ValNo, MVT ValVT, in getReg() function
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsOptimizePICCall.cpp | 287 unsigned OptimizePICCall::getReg(ValueType Entry) { in getReg() function in OptimizePICCall
|
| /external/dexmaker/src/dx/java/com/android/dx/rop/code/ |
| D | RegisterSpec.java | 326 public int getReg() { in getReg() method in RegisterSpec
|
| /external/llvm/lib/CodeGen/ |
| D | PeepholeOptimizer.cpp | 241 unsigned getReg() const { return Reg; } in getReg() function in __anon2f08fc220111::ValueTracker
|
| /external/llvm/lib/Target/X86/AsmParser/ |
| D | X86Operand.h | 93 unsigned getReg() const override { in getReg() function
|
| /external/llvm/lib/Target/Sparc/AsmParser/ |
| D | SparcAsmParser.cpp | 203 unsigned getReg() const override { in getReg() function in __anon6d25192b0111::SparcOperand
|
| /external/llvm/utils/TableGen/ |
| D | FastISelEmitter.cpp | 86 static OpKind getReg() { OpKind K; K.Repr = OK_Reg; return K; } in getReg() function in __anone8ec1ae90311::OperandsSignature::OpKind
|
| D | CodeGenRegisters.cpp | 173 const CodeGenRegister *getReg() const { assert(isValid()); return *RegI; } in getReg() function in __anonb69811410111::RegUnitIterator
1031 CodeGenRegister *CodeGenRegBank::getReg(Record *Def) { in getReg() function in CodeGenRegBank
|
| D | DAGISelMatcher.h | 886 const CodeGenRegister *getReg() const { return Reg; } in getReg() function
|
| /external/llvm/lib/Target/XCore/Disassembler/ |
| D | XCoreDisassembler.cpp | 83 static unsigned getReg(const void *D, unsigned RC, unsigned RegNo) { in getReg() function
|
| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 688 unsigned getReg() const override { in getReg() function in __anonc89f468b0311::MipsOperand
1583 unsigned MipsAsmParser::getReg(int RC, int RegNo) { in getReg() function in MipsAsmParser
|
| /external/llvm/lib/Target/SystemZ/AsmParser/ |
| D | SystemZAsmParser.cpp | 180 unsigned getReg() const override { in getReg() function in __anon93072fb70111::SystemZOperand
|
| /external/libcxxabi/src/Unwind/ |
| D | UnwindCursor.hpp | 559 unw_word_t UnwindCursor<A, R>::getReg(int regNum) { in getReg() function in libunwind::UnwindCursor
|
| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| D | PPCAsmParser.cpp | 381 unsigned getReg() const override { in getReg() function
|
| /external/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 391 static unsigned getReg(const void *D, unsigned RC, unsigned RegNo) { in getReg() function
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonHardwareLoops.cpp | 255 unsigned getReg() const { in getReg() function in __anonf3083afd0111::CountValue
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64FastISel.cpp | 69 unsigned getReg() const { in getReg() function in __anonc165f17b0111::AArch64FastISel::Address
|
| /external/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 351 unsigned getReg() const override { in getReg() function in __anon27fec24b0211::AArch64Operand
|
| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 641 unsigned getReg() const override { in getReg() function in __anon92bc5ab90311::ARMOperand
|