Home
last modified time | relevance | path

Searched refs:getCommonSubClass (Results 1 – 16 of 16) sorted by relevance

/external/llvm/lib/Target/R600/
DSIRegisterInfo.cpp80 return getCommonSubClass(&AMDGPU::VReg_32RegClass, RC) || in hasVGPRs()
81 getCommonSubClass(&AMDGPU::VReg_64RegClass, RC) || in hasVGPRs()
82 getCommonSubClass(&AMDGPU::VReg_96RegClass, RC) || in hasVGPRs()
83 getCommonSubClass(&AMDGPU::VReg_128RegClass, RC) || in hasVGPRs()
84 getCommonSubClass(&AMDGPU::VReg_256RegClass, RC) || in hasVGPRs()
85 getCommonSubClass(&AMDGPU::VReg_512RegClass, RC); in hasVGPRs()
94 } else if (getCommonSubClass(SRC, &AMDGPU::SGPR_32RegClass)) { in getEquivalentVGPRClass()
96 } else if (getCommonSubClass(SRC, &AMDGPU::SGPR_64RegClass)) { in getEquivalentVGPRClass()
98 } else if (getCommonSubClass(SRC, &AMDGPU::SReg_128RegClass)) { in getEquivalentVGPRClass()
100 } else if (getCommonSubClass(SRC, &AMDGPU::SReg_256RegClass)) { in getEquivalentVGPRClass()
[all …]
DSILowerI1Copies.cpp117 TRI->getCommonSubClass(SrcRC, &AMDGPU::SGPR_64RegClass)) { in runOnMachineFunction()
129 } else if (TRI->getCommonSubClass(DstRC, &AMDGPU::SGPR_64RegClass) && in runOnMachineFunction()
DSIFixSGPRCopies.cpp149 RC = TRI->getCommonSubClass(RC, inferRegClassFromUses(TRI, MRI, in inferRegClassFromUses()
231 if (TRI->getCommonSubClass(RC, &AMDGPU::VReg_32RegClass)) { in runOnMachineFunction()
DSIInstrInfo.cpp202 } else if (TRI->getCommonSubClass(RC, &AMDGPU::SGPR_32RegClass)) { in storeRegToStackSlot()
/external/llvm/lib/CodeGen/
DLiveStackAnalysis.cpp69 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); in getOrCreateInterval()
DTargetRegisterInfo.cpp171 TargetRegisterInfo::getCommonSubClass(const TargetRegisterClass *A, in getCommonSubClass() function in TargetRegisterInfo
DMachineRegisterInfo.cpp59 getTargetRegisterInfo()->getCommonSubClass(OldRC, RC); in constrainRegClass()
DPeepholeOptimizer.cpp477 return TRI.getCommonSubClass(DefRC, SrcRC) != nullptr; in shareSameRegisterFile()
DRegisterCoalescer.cpp313 NewRC = TRI.getCommonSubClass(DstRC, SrcRC); in setRegisters()
831 NewRC = TRI->getCommonSubClass(NewRC, DefRC); in reMaterializeTrivialDef()
DMachineInstr.cpp1048 CurRC = TRI->getCommonSubClass(CurRC, OpRC); in getRegClassConstraintEffect()
/external/llvm/include/llvm/Target/
DTargetRegisterInfo.h567 getCommonSubClass(const TargetRegisterClass *A,
/external/llvm/lib/CodeGen/SelectionDAG/
DInstrEmitter.cpp142 TRI->getCommonSubClass(UseRC, RC); in EmitCopyFromReg()
230 VTRC = TRI->getCommonSubClass(RC, VTRC); in CreateVirtualRegisters()
DDAGCombiner.cpp8348 if (!TRI || TRI->getCommonSubClass(ArgRC, ResRC)) in canMergeExpensiveCrossRegisterBankCopy()
/external/llvm/lib/Target/PowerPC/
DPPCInstrInfo.cpp602 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
638 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in insertSelect()
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.cpp376 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
/external/llvm/lib/Target/X86/
DX86InstrInfo.cpp2987 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()