| /external/llvm/lib/Target/ARM/InstPrinter/ |
| D | ARMInstPrinter.h | 30 const MCSubtargetInfo &STI) override;
34 void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
38 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
42 const MCSubtargetInfo &STI, raw_ostream &O);
44 const MCSubtargetInfo &STI, raw_ostream &O);
47 const MCSubtargetInfo &STI, raw_ostream &O);
49 const MCSubtargetInfo &STI, raw_ostream &O);
51 const MCSubtargetInfo &STI, raw_ostream &O);
53 const MCSubtargetInfo &STI, raw_ostream &O);
55 const MCSubtargetInfo &STI, raw_ostream &O);
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| D | ARMInstPrinter.cpp | 70 StringRef Annot, const MCSubtargetInfo &STI) { in printInst() argument
96 if ((STI.getFeatureBits() & ARM::HasV8Ops)) { in printInst()
102 printInstruction(MI, STI, O); in printInst()
106 printPredicateOperand(MI, 1, STI, O); in printInst()
121 printSBitModifierOperand(MI, 6, STI, O); in printInst()
122 printPredicateOperand(MI, 4, STI, O); in printInst()
143 printSBitModifierOperand(MI, 5, STI, O); in printInst()
144 printPredicateOperand(MI, 3, STI, O); in printInst()
168 printPredicateOperand(MI, 2, STI, O); in printInst()
172 printRegisterList(MI, 4, STI, O); in printInst()
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsMCCodeEmitter.h | 40 bool isMicroMips(const MCSubtargetInfo &STI) const;
50 void EmitInstruction(uint64_t Val, unsigned Size, const MCSubtargetInfo &STI,
55 const MCSubtargetInfo &STI) const override;
61 const MCSubtargetInfo &STI) const;
68 const MCSubtargetInfo &STI) const;
75 const MCSubtargetInfo &STI) const;
81 const MCSubtargetInfo &STI) const;
85 const MCSubtargetInfo &STI) const;
89 const MCSubtargetInfo &STI) const;
95 const MCSubtargetInfo &STI) const;
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| D | MipsMCCodeEmitter.cpp | 114 bool MipsMCCodeEmitter::isMicroMips(const MCSubtargetInfo &STI) const { in isMicroMips()
115 return STI.getFeatureBits() & Mips::FeatureMicroMips; in isMicroMips()
123 const MCSubtargetInfo &STI, in EmitInstruction() argument
129 if (IsLittleEndian && Size == 4 && isMicroMips(STI)) { in EmitInstruction()
130 EmitInstruction(Val >> 16, 2, STI, OS); in EmitInstruction()
131 EmitInstruction(Val, 2, STI, OS); in EmitInstruction()
145 const MCSubtargetInfo &STI) const in EncodeInstruction()
168 uint32_t Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in EncodeInstruction()
178 if (STI.getFeatureBits() & Mips::FeatureMicroMips) { in EncodeInstruction()
185 Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in EncodeInstruction()
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| D | MipsNaClELFStreamer.cpp | 94 const MCSubtargetInfo &STI) { in emitMask() argument
100 MipsELFStreamer::EmitInstruction(MaskInst, STI); in emitMask()
105 void sandboxIndirectJump(const MCInst &MI, const MCSubtargetInfo &STI) { in sandboxIndirectJump() argument
109 emitMask(AddrReg, IndirectBranchMaskReg, STI); in sandboxIndirectJump()
110 MipsELFStreamer::EmitInstruction(MI, STI); in sandboxIndirectJump()
117 const MCSubtargetInfo &STI, bool MaskBefore, in sandboxLoadStoreStackChange() argument
123 emitMask(BaseReg, LoadStoreStackMaskReg, STI); in sandboxLoadStoreStackChange()
125 MipsELFStreamer::EmitInstruction(MI, STI); in sandboxLoadStoreStackChange()
130 emitMask(SPReg, LoadStoreStackMaskReg, STI); in sandboxLoadStoreStackChange()
139 const MCSubtargetInfo &STI) override { in EmitInstruction() argument
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| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.h | 32 const MCSubtargetInfo &STI) override;
36 virtual void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
38 virtual bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
42 const MCSubtargetInfo &STI,
53 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
55 void printHexImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
61 const MCSubtargetInfo &STI, raw_ostream &O) { in printPostIncOperand() argument
66 const MCSubtargetInfo &STI, raw_ostream &O);
68 const MCSubtargetInfo &STI, raw_ostream &O);
70 const MCSubtargetInfo &STI, raw_ostream &O);
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| D | AArch64InstPrinter.cpp | 52 const MCSubtargetInfo &STI) { in printInst() argument
209 if (!printAliasInstr(MI, STI, O)) in printInst()
210 printInstruction(MI, STI, O); in printInst()
614 const MCSubtargetInfo &STI) { in printInst() argument
624 printVectorList(MI, ListOpNum, STI, O, ""); in printInst()
638 printVectorList(MI, OpNum++, STI, O, ""); in printInst()
662 AArch64InstPrinter::printInst(MI, O, Annot, STI); in printInst()
889 const MCSubtargetInfo &STI, in printOperand() argument
904 const MCSubtargetInfo &STI, in printHexImm() argument
924 const MCSubtargetInfo &STI, in printVRegOperand() argument
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCCodeEmitter.cpp | 53 bool isThumb(const MCSubtargetInfo &STI) const { in isThumb()
54 return (STI.getFeatureBits() & ARM::ModeThumb) != 0; in isThumb()
56 bool isThumb2(const MCSubtargetInfo &STI) const { in isThumb2()
57 return isThumb(STI) && (STI.getFeatureBits() & ARM::FeatureThumb2) != 0; in isThumb2()
59 bool isTargetMachO(const MCSubtargetInfo &STI) const { in isTargetMachO()
60 Triple TT(STI.getTargetTriple()); in isTargetMachO()
70 const MCSubtargetInfo &STI) const;
76 const MCSubtargetInfo &STI) const;
83 const MCSubtargetInfo &STI) const;
88 const MCSubtargetInfo &STI) const;
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| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCMCCodeEmitter.cpp | 51 const MCSubtargetInfo &STI) const;
54 const MCSubtargetInfo &STI) const;
57 const MCSubtargetInfo &STI) const;
60 const MCSubtargetInfo &STI) const;
63 const MCSubtargetInfo &STI) const;
66 const MCSubtargetInfo &STI) const;
69 const MCSubtargetInfo &STI) const;
72 const MCSubtargetInfo &STI) const;
75 const MCSubtargetInfo &STI) const;
78 const MCSubtargetInfo &STI) const;
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| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64MCCodeEmitter.cpp | 49 const MCSubtargetInfo &STI) const;
55 const MCSubtargetInfo &STI) const;
63 const MCSubtargetInfo &STI) const;
69 const MCSubtargetInfo &STI) const;
75 const MCSubtargetInfo &STI) const;
81 const MCSubtargetInfo &STI) const;
87 const MCSubtargetInfo &STI) const;
94 const MCSubtargetInfo &STI) const;
100 const MCSubtargetInfo &STI) const;
106 const MCSubtargetInfo &STI) const;
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| /external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| D | SystemZMCCodeEmitter.cpp | 40 const MCSubtargetInfo &STI) const override;
46 const MCSubtargetInfo &STI) const;
52 const MCSubtargetInfo &STI) const;
60 const MCSubtargetInfo &STI) const;
63 const MCSubtargetInfo &STI) const;
66 const MCSubtargetInfo &STI) const;
69 const MCSubtargetInfo &STI) const;
72 const MCSubtargetInfo &STI) const;
86 const MCSubtargetInfo &STI) const { in getPC16DBLEncoding()
92 const MCSubtargetInfo &STI) const { in getPC32DBLEncoding()
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| /external/llvm/lib/Target/Sparc/InstPrinter/ |
| D | SparcInstPrinter.cpp | 37 bool SparcInstPrinter::isV9(const MCSubtargetInfo &STI) const { in isV9()
38 return (STI.getFeatureBits() & Sparc::FeatureV9) != 0; in isV9()
47 StringRef Annot, const MCSubtargetInfo &STI) { in printInst() argument
48 if (!printAliasInstr(MI, STI, O) && !printSparcAliasInstr(MI, STI, O)) in printInst()
49 printInstruction(MI, STI, O); in printInst()
54 const MCSubtargetInfo &STI, in printSparcAliasInstr() argument
75 O << "\tjmp "; printMemOperand(MI, 1, STI, O); in printSparcAliasInstr()
78 O << "\tcall "; printMemOperand(MI, 1, STI, O); in printSparcAliasInstr()
84 if (isV9(STI) in printSparcAliasInstr()
99 printOperand(MI, 1, STI, O); in printSparcAliasInstr()
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| D | SparcInstPrinter.h | 32 const MCSubtargetInfo &STI) override;
33 bool printSparcAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
35 bool isV9(const MCSubtargetInfo &STI) const;
38 void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
40 bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
44 const MCSubtargetInfo &STI, raw_ostream &O);
47 void printOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI,
49 void printMemOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI,
51 void printCCOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI,
53 bool printGetPCX(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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| /external/llvm/lib/Target/Sparc/MCTargetDesc/ |
| D | SparcMCCodeEmitter.cpp | 45 const MCSubtargetInfo &STI) const override;
51 const MCSubtargetInfo &STI) const;
57 const MCSubtargetInfo &STI) const;
61 const MCSubtargetInfo &STI) const;
64 const MCSubtargetInfo &STI) const;
67 const MCSubtargetInfo &STI) const;
70 const MCSubtargetInfo &STI) const;
84 const MCSubtargetInfo &STI) const { in EncodeInstruction()
85 unsigned Bits = getBinaryCodeForInstr(MI, Fixups, STI); in EncodeInstruction()
103 uint64_t op = getMachineOpValue(MI, MO, Fixups, STI); in EncodeInstruction()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcAsmPrinter.cpp | 74 const MCSubtargetInfo &STI);
112 const MCSubtargetInfo &STI) in EmitCall() argument
117 OutStreamer.EmitInstruction(CallInst, STI); in EmitCall()
122 const MCSubtargetInfo &STI) in EmitSETHI() argument
128 OutStreamer.EmitInstruction(SETHIInst, STI); in EmitSETHI()
133 const MCSubtargetInfo &STI) in EmitBinary() argument
140 OutStreamer.EmitInstruction(Inst, STI); in EmitBinary()
145 const MCSubtargetInfo &STI) { in EmitOR() argument
146 EmitBinary(OutStreamer, SP::ORri, RS1, Imm, RD, STI); in EmitOR()
151 const MCSubtargetInfo &STI) { in EmitADD() argument
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| /external/llvm/lib/Target/Mips/ |
| D | MipsAsmPrinter.cpp | 697 const MipsSubtarget STI(TT, CPU, FS, MTM.isLittleEndian(), MTM); in EmitStartOfAsmFile() local
699 bool IsABICalls = STI.isABICalls(); in EmitStartOfAsmFile()
720 STI.isNaN2008() ? getTargetStreamer().emitDirectiveNaN2008() in EmitStartOfAsmFile()
726 if (STI.isGP32bit()) in EmitStartOfAsmFile()
734 getTargetStreamer().updateABIInfo(STI); in EmitStartOfAsmFile()
739 if (ABI.IsO32() && (STI.isABI_FPXX() || STI.isFP64bit())) in EmitStartOfAsmFile()
745 if (ABI.IsO32() && (!STI.useOddSPReg() || STI.isABI_FPXX())) in EmitStartOfAsmFile()
746 getTargetStreamer().emitDirectiveModuleOddSPReg(STI.useOddSPReg(), in EmitStartOfAsmFile()
772 void MipsAsmPrinter::EmitJal(const MCSubtargetInfo &STI, MCSymbol *Symbol) { in EmitJal() argument
777 OutStreamer.EmitInstruction(I, STI); in EmitJal()
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| D | MipsAsmPrinter.h | 68 void EmitJal(const MCSubtargetInfo &STI, MCSymbol *Symbol);
70 void EmitInstrReg(const MCSubtargetInfo &STI, unsigned Opcode, unsigned Reg);
72 void EmitInstrRegReg(const MCSubtargetInfo &STI, unsigned Opcode,
75 void EmitInstrRegRegReg(const MCSubtargetInfo &STI, unsigned Opcode,
78 void EmitMovFPIntPair(const MCSubtargetInfo &STI, unsigned MovOpc,
82 void EmitSwapFPIntParams(const MCSubtargetInfo &STI,
86 void EmitSwapFPIntRetval(const MCSubtargetInfo &STI,
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| D | MipsSEFrameLowering.cpp | 364 MipsSEFrameLowering::MipsSEFrameLowering(const MipsSubtarget &STI) in MipsSEFrameLowering() argument
365 : MipsFrameLowering(STI, STI.stackAlignment()) {} in MipsSEFrameLowering()
375 return STI.isABI_N64() ? EhDataReg64[I] : EhDataReg[I]; in ehDataReg()
384 *static_cast<const MipsSEInstrInfo *>(STI.getInstrInfo()); in emitPrologue()
386 *static_cast<const MipsRegisterInfo *>(STI.getRegisterInfo()); in emitPrologue()
390 unsigned SP = STI.isABI_N64() ? Mips::SP_64 : Mips::SP; in emitPrologue()
391 unsigned FP = STI.isABI_N64() ? Mips::FP_64 : Mips::FP; in emitPrologue()
392 unsigned ZERO = STI.isABI_N64() ? Mips::ZERO_64 : Mips::ZERO; in emitPrologue()
393 unsigned ADDu = STI.isABI_N64() ? Mips::DADDu : Mips::ADDu; in emitPrologue()
437 if (!STI.isLittle()) in emitPrologue()
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| /external/llvm/lib/Target/BPF/MCTargetDesc/ |
| D | BPFMCCodeEmitter.cpp | 43 const MCSubtargetInfo &STI) const;
49 const MCSubtargetInfo &STI) const;
53 const MCSubtargetInfo &STI) const;
57 const MCSubtargetInfo &STI) const override;
70 const MCSubtargetInfo &STI) const { in getMachineOpValue()
122 const MCSubtargetInfo &STI) const { in EncodeInstruction()
128 uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI); in EncodeInstruction()
142 uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI); in EncodeInstruction()
153 const MCSubtargetInfo &STI) const { in getMemoryOpValue()
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| /external/llvm/lib/Target/X86/ |
| D | X86FrameLowering.cpp | 400 const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>(); in emitStackProbeCall() local
401 const TargetInstrInfo &TII = *STI.getInstrInfo(); in emitStackProbeCall()
402 bool Is64Bit = STI.is64Bit(); in emitStackProbeCall()
413 if (STI.isTargetCygMing()) { in emitStackProbeCall()
418 } else if (STI.isTargetCygMing()) in emitStackProbeCall()
471 const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>(); in calculateMaxStackAlign() local
472 const X86RegisterInfo *RegInfo = STI.getRegisterInfo(); in calculateMaxStackAlign()
474 unsigned StackAlign = STI.getFrameLowering()->getStackAlignment(); in calculateMaxStackAlign()
573 const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>(); in emitPrologue() local
574 const X86RegisterInfo *RegInfo = STI.getRegisterInfo(); in emitPrologue()
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| /external/llvm/lib/Target/R600/MCTargetDesc/ |
| D | R600MCCodeEmitter.cpp | 46 const MCSubtargetInfo &STI) const override;
51 const MCSubtargetInfo &STI) const override;
91 const MCSubtargetInfo &STI) const { in EncodeInstruction()
100 uint64_t InstWord01 = getBinaryCodeForInstr(MI, Fixups, STI); in EncodeInstruction()
102 if (!(STI.getFeatureBits() & AMDGPU::FeatureCaymanISA)) { in EncodeInstruction()
124 uint64_t Word01 = getBinaryCodeForInstr(MI, Fixups, STI); in EncodeInstruction()
134 uint64_t Inst = getBinaryCodeForInstr(MI, Fixups, STI); in EncodeInstruction()
135 if ((STI.getFeatureBits() & AMDGPU::FeatureR600ALUInst) && in EncodeInstruction()
173 const MCSubtargetInfo &STI) const { in getMachineOpValue()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.cpp | 51 static unsigned getFramePointerReg(const ARMSubtarget &STI) { in getFramePointerReg() argument
52 if (STI.isTargetMachO()) { in getFramePointerReg()
53 if (STI.isTargetDarwin() || STI.isThumb1Only()) in getFramePointerReg()
57 } else if (STI.isTargetWindows()) in getFramePointerReg()
60 return STI.isThumb() ? ARM::R7 : ARM::R11; in getFramePointerReg()
65 const ARMSubtarget &STI = MF->getSubtarget<ARMSubtarget>(); in getCalleeSavedRegs() local
67 STI.isTargetDarwin() ? CSR_iOS_SaveList : CSR_AAPCS_SaveList; in getCalleeSavedRegs()
75 if (STI.isMClass()) { in getCalleeSavedRegs()
96 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getCallPreservedMask() local
100 return STI.isTargetDarwin() ? CSR_iOS_RegMask : CSR_AAPCS_RegMask; in getCallPreservedMask()
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| D | Thumb1FrameLowering.cpp | 55 *static_cast<const Thumb1InstrInfo *>(STI.getInstrInfo()); in eliminateCallFramePseudoInstr()
57 static_cast<const ThumbRegisterInfo *>(STI.getRegisterInfo()); in eliminateCallFramePseudoInstr()
93 static_cast<const ThumbRegisterInfo *>(STI.getRegisterInfo()); in emitPrologue()
95 *static_cast<const Thumb1InstrInfo *>(STI.getInstrInfo()); in emitPrologue()
149 if (STI.isTargetMachO()) { in emitPrologue()
189 if (tryFoldSPUpdateIntoPushPop(STI, MF, std::prev(MBBI), NumBytes)) { in emitPrologue()
213 if (STI.isTargetMachO()) in emitPrologue()
277 if (STI.isTargetELF() && HasFP) in emitPrologue()
331 static_cast<const ThumbRegisterInfo *>(STI.getRegisterInfo()); in emitEpilogue()
333 *static_cast<const Thumb1InstrInfo *>(STI.getInstrInfo()); in emitEpilogue()
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| /external/llvm/include/llvm/MC/ |
| D | MCDisassembler.h | 57 MCDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx) in MCDisassembler() argument
58 : Ctx(Ctx), STI(STI), Symbolizer(), CommentStream(nullptr) {} in MCDisassembler()
87 const MCSubtargetInfo &STI;
105 const MCSubtargetInfo& getSubtargetInfo() const { return STI; } in getSubtargetInfo()
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| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCCodeEmitter.cpp | 44 bool is64BitMode(const MCSubtargetInfo &STI) const { in is64BitMode()
45 return (STI.getFeatureBits() & X86::Mode64Bit) != 0; in is64BitMode()
48 bool is32BitMode(const MCSubtargetInfo &STI) const { in is32BitMode()
49 return (STI.getFeatureBits() & X86::Mode32Bit) != 0; in is32BitMode()
52 bool is16BitMode(const MCSubtargetInfo &STI) const { in is16BitMode()
53 return (STI.getFeatureBits() & X86::Mode16Bit) != 0; in is16BitMode()
59 const MCSubtargetInfo &STI) const { in Is16BitMemOperand()
64 if (is16BitMode(STI) && BaseReg.getReg() == 0 && in Is16BitMemOperand()
150 const MCSubtargetInfo &STI) const;
154 const MCSubtargetInfo &STI) const override;
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