| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrQPX.td | 116 let isCodeGenOnly = 1 in
127 let isCodeGenOnly = 1 in
139 let isCodeGenOnly = 1 in
148 let isCodeGenOnly = 1 in
159 let isCodeGenOnly = 1 in
174 let isCodeGenOnly = 1 in
185 let isCodeGenOnly = 1 in
197 let isCodeGenOnly = 1 in
209 let isCodeGenOnly = 1 in
226 let isCodeGenOnly = 1 in
[all …]
|
| D | PPCInstr64Bit.td | 82 let Interpretation64Bit = 1, isCodeGenOnly = 1 in {
139 let Uses = [RM], isCodeGenOnly = 1 in {
158 let isCodeGenOnly = 1 in {
174 let isCall = 1, PPC970_Unit = 7, isCodeGenOnly = 1,
252 let Interpretation64Bit = 1, isCodeGenOnly = 1 in {
299 let Interpretation64Bit = 1, isCodeGenOnly = 1 in {
391 let isCodeGenOnly = 1 in {
521 } // isCodeGenOnly
564 let Interpretation64Bit = 1, isCodeGenOnly = 1 in {
582 let isCodeGenOnly = 1 in {
[all …]
|
| D | PPCInstrInfo.td | 1088 let isCodeGenOnly = 1 in {
1120 let isCodeGenOnly = 1 in {
1132 let isCodeGenOnly = 1 in {
1192 let isCall = 1, hasCtrlDep = 1, isCodeGenOnly = 1, PPC970_Unit = 7 in {
1207 let isCodeGenOnly = 1 in {
1228 let isCodeGenOnly = 1 in {
1243 let isCodeGenOnly = 1 in {
1314 let isCodeGenOnly = 1 in {
1808 let isCodeGenOnly = 1 in {
1842 let isCodeGenOnly = 1 in
[all …]
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsCondMov.td | 109 let isCodeGenOnly = 1 in {
121 let isCodeGenOnly = 1 in {
133 let isCodeGenOnly = 1 in
141 let isCodeGenOnly = 1 in
158 let isCodeGenOnly = 1 in {
169 let isCodeGenOnly = 1 in
177 let isCodeGenOnly = 1 in
|
| D | Mips16InstrInfo.td | 110 let isCodeGenOnly=1;
121 let isCodeGenOnly=1;
130 let isCodeGenOnly=1;
170 let isCodeGenOnly=1;
268 let isCodeGenOnly=1;
280 let isCodeGenOnly=1;
317 let isCodeGenOnly=1;
428 //let isCodeGenOnly=1;
454 let isCodeGenOnly=1;
478 let isCodeGenOnly=1;
[all …]
|
| D | Mips64InstrInfo.td | 95 let isPseudo = 1, isCodeGenOnly = 1 in {
111 let isCodeGenOnly = 1 in {
135 let isCodeGenOnly = 1 in {
175 let isCodeGenOnly = 1 in {
191 let isCodeGenOnly = 1 in {
212 let isCodeGenOnly = 1 in {
246 let isCodeGenOnly = 1 in {
278 let isCodeGenOnly = 1 in
289 let isCodeGenOnly = 1, rs = 0, shamt = 0 in {
|
| D | MicroMipsInstrFPU.td | 1 let isCodeGenOnly = 1, Predicates = [InMicroMips] in {
|
| /external/llvm/lib/Target/R600/ |
| D | SIInstrFormats.td | 136 let isCodeGenOnly = 0;
229 let isCodeGenOnly = 0;
240 let isCodeGenOnly = 0;
256 let isCodeGenOnly = 0;
575 let isCodeGenOnly = 0;
580 let isCodeGenOnly = 0;
|
| D | SIInstrInfo.td | 472 let isPseudo = 1, isCodeGenOnly = 1 in {
489 let isCodeGenOnly = 1;
496 let isCodeGenOnly = 0;
504 let isCodeGenOnly = 0;
569 let isCodeGenOnly = 1;
647 let isCodeGenOnly = 1;
655 let isCodeGenOnly = 0;
663 let isCodeGenOnly = 0;
714 let isCodeGenOnly = 0;
721 let isCodeGenOnly = 0;
[all …]
|
| D | R600Instructions.td | 583 let isCodeGenOnly = 1;
646 let isCodeGenOnly = 1;
654 let isCodeGenOnly = 1;
659 let isCodeGenOnly = 1;
744 let isPseudo = 1, isCodeGenOnly = 1, usesCustomInserter = 1 in {
753 } // end let isPseudo = 1, isCodeGenOnly = 1, usesCustomInserter = 1
956 let isCodeGenOnly = 1, isPseudo = 1, Namespace = "AMDGPU" in {
1361 let usesCustomInserter = 1, isCodeGenOnly = 1, isPseudo = 1, Namespace = "AMDGPU" in {
1372 } // end usesCustomInserter = 1, isCodeGenOnly = 1, isPseudo = 1, Namespace = "AMDGPU"
1500 let isCodeGenOnly = 1;
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDGPUInstructions.td | 94 let isCodeGenOnly = 1, isPseudo = 1, usesCustomInserter = 1 in {
117 } // End isCodeGenOnly = 1, isPseudo = 1, hasCustomInserter = 1
|
| /external/llvm/lib/Target/X86/ |
| D | X86InstrFMA.td | 242 let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0 in
252 let isCodeGenOnly = 1 in {
272 } // isCodeGenOnly = 1
319 let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0 in {
329 } // isCodeGenOnly = 1
|
| D | X86InstrControl.td | 62 let hasSideEffects = 0, isCodeGenOnly = 1, ForceDisassemble = 1 in {
75 let hasSideEffects = 0, isCodeGenOnly = 1, ForceDisassemble = 1 in {
229 isCodeGenOnly = 1, SchedRW = [WriteJumpLd] in
282 isCodeGenOnly = 1, Uses = [RSP], usesCustomInserter = 1,
|
| D | X86InstrCompiler.td | 160 hasCtrlDep = 1, isCodeGenOnly = 1 in {
168 hasCtrlDep = 1, isCodeGenOnly = 1 in {
175 let hasSideEffects = 1, isBarrier = 1, isCodeGenOnly = 1,
198 let isBranch = 1, isTerminator = 1, isCodeGenOnly = 1 in {
266 isCodeGenOnly = 1, hasSideEffects = 0 in
292 } // isCodeGenOnly
344 let Defs = [ECX,EDI,ESI], Uses = [ECX,EDI,ESI], isCodeGenOnly = 1 in {
356 let Defs = [RCX,RDI,RSI], Uses = [RCX,RDI,RSI], isCodeGenOnly = 1 in {
372 let Defs = [ECX,EDI], isCodeGenOnly = 1 in {
387 let Defs = [RCX,RDI], isCodeGenOnly = 1 in {
[all …]
|
| D | X86InstrMMX.td | 257 let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0, mayLoad = 1 in
275 let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0 in {
282 let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0, mayStore = 1 in
318 let isCodeGenOnly = 1, hasSideEffects = 1 in {
|
| D | X86InstrSSE.td | 268 let isCodeGenOnly = 1 in {
560 let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0 in
904 let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0,
981 let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0,
1129 let isCodeGenOnly = 1 in {
1686 let isCodeGenOnly = 1 in {
1717 } // isCodeGenOnly = 1
1722 let isCodeGenOnly = 1 in {
1751 } // isCodeGenOnly = 1
1850 let isCodeGenOnly = 1 in {
[all …]
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrFormatsV4.td | 49 let isCodeGenOnly = 1;
144 let isCodeGenOnly = 1 in
|
| D | HexagonInstrInfoV3.td | 67 let isCodeGenOnly = 1, isCall = 1, hasSideEffects = 1, Defs = VolatileV3.Regs in
80 let isCodeGenOnly = 1, Defs = VolatileV3.Regs in {
|
| D | HexagonInstrFormats.td | 325 let isCodeGenOnly = 1, isPseudo = 1 in
331 let isCodeGenOnly = 1, isPseudo = 1 in
337 let isCodeGenOnly = 1, isPseudo = 1 in
|
| D | HexagonInstrInfo.td | 722 let isCodeGenOnly = 1, isPseudo = 1 in
1591 let isReturn = 1, isCodeGenOnly = 1 in
1604 isCodeGenOnly = 1, Defs = [PC], Uses = [R28], isPredicable = 0 in
2014 isCodeGenOnly = 1, isPseudo = 1, hasSideEffects = 0 in
2171 let isCodeGenOnly = 1, mayLoad = 1, hasSideEffects = 0, isPseudo = 1 in
2291 let isCodeGenOnly = 1, mayLoad = 1, hasSideEffects = 0, isPseudo = 1 in
3647 isCodeGenOnly = 1, isPseudo = 1, hasSideEffects = 0 in
3749 let isCodeGenOnly = 1, mayStore = 1, hasSideEffects = 0, isPseudo = 1 in
3912 let isCodeGenOnly = 1, mayStore = 1, hasSideEffects = 0, isPseudo = 1 in
4410 let hasSideEffects = 0, isCodeGenOnly = 1 in
[all …]
|
| /external/llvm/utils/TableGen/ |
| D | CodeGenInstruction.h | 253 bool isCodeGenOnly : 1; variable
|
| D | PseudoLoweringEmitter.cpp | 142 if (Insn.isCodeGenOnly || Insn.isPseudo) in evaluateExpansion()
|
| /external/llvm/lib/Target/Sparc/ |
| D | SparcInstrInfo.td | 305 let isCodeGenOnly = 1;
399 isCodeGenOnly = 1 in {
510 let Predicates = [Is32Bit], isCodeGenOnly = 1 in
619 isIndirectBranch = 1, rd = 0, isCodeGenOnly = 1 in {
694 let isCodeGenOnly = 1, rd = 15 in {
890 let Defs = [FCC0], rd = 0, isCodeGenOnly = 1 in {
909 let isCodeGenOnly = 1, isAsmParserOnly = 1 in {
|
| D | SparcInstr64Bit.td | 144 let isCodeGenOnly = 1 in {
241 let mayLoad = 1, isCodeGenOnly = 1, isAsmParserOnly = 1 in
480 let Predicates = [Is64Bit], isCodeGenOnly = 1 in {
|
| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.td | 59 let isCodeGenOnly = 1, CCMaskFirst = 1 in {
110 let isCodeGenOnly = 1 in
289 let isCodeGenOnly = 1, Uses = [CC] in {
348 let isCodeGenOnly = 1, Uses = [CC] in {
378 let isCodeGenOnly = 1, Uses = [CC] in {
650 let isCodeGenOnly = 1 in
1058 let isCodeGenOnly = 1 in
|