Searched refs:HasV8_1aOps (Results 1 – 11 of 11) sorted by relevance
/external/llvm/lib/Target/AArch64/Utils/ |
D | AArch64BaseInfo.cpp | 148 {"pan", PAN, {AArch64::HasV8_1aOps}}, 266 {"lorid_el1", LORID_EL1, {AArch64::HasV8_1aOps}}, 780 {"pan", PAN, {AArch64::HasV8_1aOps}}, 783 {"lorsa_el1", LORSA_EL1, {AArch64::HasV8_1aOps}}, 784 {"lorea_el1", LOREA_EL1, {AArch64::HasV8_1aOps}}, 785 {"lorn_el1", LORN_EL1, {AArch64::HasV8_1aOps}}, 786 {"lorc_el1", LORC_EL1, {AArch64::HasV8_1aOps}}, 789 {"ttbr1_el2", TTBR1_EL2, {AArch64::HasV8_1aOps}}, 790 {"contextidr_el2", CONTEXTIDR_EL2, {AArch64::HasV8_1aOps}}, 791 {"cnthv_tval_el2", CNTHV_TVAL_EL2, {AArch64::HasV8_1aOps}}, [all …]
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/external/llvm/lib/Target/AArch64/ |
D | AArch64Subtarget.h | 41 bool HasV8_1aOps; variable 108 bool hasV8_1aOps() const { return HasV8_1aOps; } in hasV8_1aOps()
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D | AArch64.td | 65 def HasV8_1aOps : SubtargetFeature<"v8.1a", "HasV8_1aOps", "true", 69 "Support ARM v8.2a instructions", [HasV8_1aOps]>;
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D | AArch64Subtarget.cpp | 54 HasV8_1aOps(false), HasV8_2aOps(false), HasFPARMv8(false), HasNEON(false), in AArch64Subtarget()
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D | AArch64InstrInfo.td | 18 AssemblerPredicate<"HasV8_1aOps", "armv8.1a">;
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/external/llvm/lib/Target/ARM/ |
D | ARMSubtarget.h | 79 bool HasV8_1aOps; variable 317 bool hasV8_1aOps() const { return HasV8_1aOps; } in hasV8_1aOps()
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D | ARM.td | 220 def HasV8_1aOps : SubtargetFeature<"v8.1a", "HasV8_1aOps", "true", 225 [HasV8_1aOps]>; 358 def ARMv81a : Architecture<"armv8.1-a", "ARMv81a", [HasV8_1aOps,
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D | ARMSubtarget.cpp | 114 HasV8_1aOps = false; in initializeEnvironment()
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D | ARMInstrInfo.td | 217 AssemblerPredicate<"HasV8_1aOps", "armv8.1a">;
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/external/llvm/lib/Target/ARM/Disassembler/ |
D | ARMDisassembler.cpp | 2142 if (!FeatureBits[ARM::HasV8_1aOps] || in DecodeSETPANInstruction()
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/external/llvm/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 282 return getSTI().getFeatureBits()[ARM::HasV8_1aOps]; in hasV8_1aOps()
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