| /external/valgrind/none/tests/arm/ |
| D | vfp.c | 77 #define TESTINSN_vmov_core_single(instruction, RN, SD, SDval) \ argument
95 #define TESTINSN_vmov_single_core(instruction, SD, RN, RNval) \ argument
134 #define TESTINSN_vmov_2single_2core(instruction, SD1, SD2, RN, RM, RNval, RMval) \ argument
154 #define TESTINSN_vmov_double_2core(instruction, DD, RN, RM, RNval, RMval) \ argument
295 #define TESTINSN_un_f64_q_vmrs(instruction, DD, DM, DMtype, DMval, RN) \ argument
334 #define TESTINSN_vldr_f64(instruction, DD, RN, RNval, imm) \ argument
351 #define TESTINSN_vldr_f32(instruction, SD, RN, RNval, imm) \ argument
452 #define TESTINSN_VSTMIAnoWB(instruction, RN, QD, QDval) \ argument
468 #define TESTINSN_VSTMIAnoWB32(instruction, RN, SD, SDval) \ argument
484 #define TESTINSN_VSTMIAWB(RN, QD1, QD2) \ argument
[all …]
|
| D | v6intARM.c | 41 #define TESTINST3(instruction, RMval, RNval, RD, RM, RN, carryin) \ argument
70 #define TESTINST4(instruction, RMval, RNval, RSval, RD, RM, RN, RS, carryin) \ argument
|
| D | v6media.c | 50 #define TESTINST3(instruction, RMval, RNval, RD, RM, RN, carryin) \ argument
79 #define TESTINST4(instruction, RMval, RNval, RSval, RD, RM, RN, RS, carryin) \ argument
|
| D | v6intThumb.c | 135 #define TESTINST3(instruction, RMval, RNval, RD, RM, RN, cvin) \ argument
162 #define TESTINST4(instruction, RMval, RNval, RSval, RD, RM, RN, RS, cvin) \ argument
|
| /external/valgrind/none/tests/arm64/ |
| D | memory.c | 45 #define TESTINST2_hide2(instruction, RNval, RD, RN, carryin) \ argument
72 #define TESTINST3_hide2and3(instruction, RMval, RNval, RD, RM, RN, carryin) \ argument
|
| D | crc32.c | 25 #define TESTINST3(instruction, RMval, RNval, RD, RM, RN, carryin) \ argument
|
| D | integer.c | 64 #define TESTINST2(instruction, RNval, RD, RN, carryin) \ argument
91 #define TESTINST3(instruction, RMval, RNval, RD, RM, RN, carryin) \ argument
119 #define TESTINST4(instruction, RMval, RNval, RAval, RD, RM, RN, RA, carryin) \ argument
|
| /external/swiftshader/third_party/LLVM/lib/Analysis/ |
| D | ScalarEvolutionNormalization.cpp | 187 const SCEV *RN = TransformSubExpr(RO, User, OperandValToReplace); in TransformImpl() local
|
| /external/llvm/lib/Analysis/ |
| D | ScalarEvolutionNormalization.cpp | 217 const SCEV *RN = TransformSubExpr(RO, User, OperandValToReplace); in TransformImpl() local
|
| /external/llvm/lib/Transforms/Utils/ |
| D | CodeExtractor.cpp | 112 buildExtractionBlockSet(const RegionNode &RN) { in buildExtractionBlockSet()
135 CodeExtractor::CodeExtractor(DominatorTree &DT, const RegionNode &RN, in CodeExtractor()
|
| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTX.h | 129 RN, enumerator
|
| /external/eigen/Eigen/src/SparseLU/ |
| D | SparseLU_gemm_kernel.h | 35 RN = 2, // register blocking in sparselu_gemm() enumerator
|
| /external/clang/lib/AST/ |
| D | DeclarationName.cpp | 99 unsigned LN = LHSSelector.getNumArgs(), RN = RHSSelector.getNumArgs(); in compare() local
|
| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| D | PPCInstPrinter.cpp | 45 std::string RN(RegName); in printRegName() local
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 628 if (unsigned RN = Value.getResNo()) in printOperand() local
|
| D | InstrEmitter.cpp | 74 if (RegisterSDNode *RN = dyn_cast<RegisterSDNode>(Node->getOperand(I - 1))) in countOperands() local
|
| /external/swiftshader/third_party/LLVM/utils/TableGen/ |
| D | CodeGenDAGPatterns.h | 612 Record *getResult(unsigned RN) const { in getResult()
622 Record *getImpResult(unsigned RN) const { in getImpResult()
|
| /external/llvm/utils/TableGen/ |
| D | CodeGenDAGPatterns.h | 665 Record *getResult(unsigned RN) const { in getResult()
675 Record *getImpResult(unsigned RN) const { in getImpResult()
|
| /external/llvm/include/llvm/Support/ |
| D | GenericDomTree.h | 398 const DomTreeNodeBase<NodeT> *RN = getNode(R); in getDescendants() local
|
| /external/v8/src/ppc/ |
| D | constants-ppc.h | 2702 RN = 0, // Round to Nearest. enumerator
|
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | SPUISelDAGToDAG.cpp | 865 RegisterSDNode *RN; in Select() local
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonExpandCondsets.cpp | 916 void HexagonExpandCondsets::renameInRange(RegisterRef RO, RegisterRef RN, in renameInRange()
|
| /external/v8/src/arm/ |
| D | constants-arm.h | 407 RN = 0 << 22, // Round to Nearest. enumerator
|
| /external/pcre/dist2/src/sljit/ |
| D | sljitNativeARM_64.c | 53 #define RN(rn) (reg_map[rn] << 5) macro
|
| /external/v8/src/s390/ |
| D | constants-s390.h | 1841 RN = 0, // Round to Nearest. enumerator
|