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Searched refs:Instr (Results 1 – 25 of 182) sorted by relevance

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/external/swiftshader/third_party/subzero/src/
DIceConverter.cpp206 Ice::Operand *convertOperand(const Instruction *Instr, unsigned OpNum) { in convertOperand() argument
207 if (OpNum >= Instr->getNumOperands()) { in convertOperand()
210 const Value *Op = Instr->getOperand(OpNum); in convertOperand()
224 Ice::Inst *convertInstruction(const Instruction *Instr) { in convertInstruction() argument
225 switch (Instr->getOpcode()) { in convertInstruction()
227 return convertPHINodeInstruction(cast<PHINode>(Instr)); in convertInstruction()
229 return convertBrInstruction(cast<BranchInst>(Instr)); in convertInstruction()
231 return convertRetInstruction(cast<ReturnInst>(Instr)); in convertInstruction()
233 return convertIntToPtrInstruction(cast<IntToPtrInst>(Instr)); in convertInstruction()
235 return convertPtrToIntInstruction(cast<PtrToIntInst>(Instr)); in convertInstruction()
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DIceInstrumentation.cpp61 Inst *Instr = iteratorToInst(Context.getCur()); in instrumentInst() local
62 switch (Instr->getKind()) { in instrumentInst()
64 instrumentAlloca(Context, llvm::cast<InstAlloca>(Instr)); in instrumentInst()
67 instrumentArithmetic(Context, llvm::cast<InstArithmetic>(Instr)); in instrumentInst()
70 instrumentBr(Context, llvm::cast<InstBr>(Instr)); in instrumentInst()
73 instrumentCall(Context, llvm::cast<InstCall>(Instr)); in instrumentInst()
76 instrumentCast(Context, llvm::cast<InstCast>(Instr)); in instrumentInst()
79 instrumentExtractElement(Context, llvm::cast<InstExtractElement>(Instr)); in instrumentInst()
82 instrumentFcmp(Context, llvm::cast<InstFcmp>(Instr)); in instrumentInst()
85 instrumentIcmp(Context, llvm::cast<InstIcmp>(Instr)); in instrumentInst()
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DIceVariableSplitting.cpp80 for (const Inst &Instr : Node->getInsts()) { in reset() local
81 if (Instr.isDeleted()) in reset()
83 for (SizeT i = 0; i < Instr.getSrcSize(); ++i) { in reset()
84 if (auto *SrcVar = llvm::dyn_cast<Variable>(Instr.getSrc(i))) { in reset()
86 Map[VarNum].LastUseInst = &Instr; in reset()
141 bool isInstLastUseOfVar(const Variable *Var, const Inst *Instr) { in isInstLastUseOfVar() argument
142 return Map[getVarNum(Var)].LastUseInst == Instr; in isInstLastUseOfVar()
190 Instr = CurInst; in setInst()
191 Dest = Instr->getDest(); in setInst()
221 Instr->getNumber())) { in handleUnwantedInstruction()
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DIceTargetLowering.cpp82 void LoweringContext::insert(Inst *Instr) { in insert() argument
83 getNode()->getInsts().insert(Next, Instr); in insert()
84 LastInserted = Instr; in insert()
111 Inst *Instr = LastInserted; in availabilityUpdate() local
112 if (Instr == nullptr) in availabilityUpdate()
114 if (!Instr->isVarAssign()) in availabilityUpdate()
117 LastDest = Instr->getDest(); in availabilityUpdate()
118 LastSrc = llvm::cast<Variable>(Instr->getSrc(0)); in availabilityUpdate()
404 Inst *Instr = iteratorToInst(Context.getCur()); in lower() local
405 Instr->deleteIfDead(); in lower()
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DIceTargetLowering.h53 #define UnimplementedLoweringError(Target, Instr) \ argument
56 (Target)->addFakeDefUses(Instr); \
61 (std::string("Not yet implemented: ") + Instr->getInstName()) \
96 void insert(Inst *Instr);
224 void lowerInst(CfgNode *Node, InstList::iterator Next, InstHighLevel *Instr);
400 virtual void lowerAlloca(const InstAlloca *Instr) = 0;
401 virtual void lowerArithmetic(const InstArithmetic *Instr) = 0;
402 virtual void lowerAssign(const InstAssign *Instr) = 0;
403 virtual void lowerBr(const InstBr *Instr) = 0;
404 virtual void lowerBreakpoint(const InstBreakpoint *Instr) = 0;
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DIceInst.h293 static bool classof(const Inst *Instr) { return Instr->getKind() == Alloca; } in classof() argument
331 static bool classof(const Inst *Instr) { in classof() argument
332 return Instr->getKind() == Arithmetic; in classof()
359 static bool classof(const Inst *Instr) { return Instr->getKind() == Assign; } in classof() argument
400 static bool classof(const Inst *Instr) { return Instr->getKind() == Br; } in classof() argument
440 static bool classof(const Inst *Instr) { return Instr->getKind() == Call; } in classof() argument
482 static bool classof(const Inst *Instr) { return Instr->getKind() == Cast; } in classof() argument
505 static bool classof(const Inst *Instr) { in classof() argument
506 return Instr->getKind() == ExtractElement; in classof()
537 static bool classof(const Inst *Instr) { return Instr->getKind() == Fcmp; } in classof() argument
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DIceCfg.cpp282 for (auto &Instr : Node->getPhis()) { in fixPhiNodes() local
283 auto *Phi = llvm::cast<InstPhi>(&Instr); in fixPhiNodes()
560 size_t operator()(const Inst *Instr) const { in localCSE()
561 auto Kind = Instr->getKind(); in localCSE()
565 for (SizeT i = 0; i < Instr->getSrcSize(); ++i) { in localCSE()
566 Result ^= Instr->getSrc(i)->hashValue(); in localCSE()
618 for (Inst &Instr : Node->getInsts()) { in localCSE()
619 if (Instr.isDeleted() || !llvm::isa<InstArithmetic>(&Instr)) in localCSE()
623 auto Iter = Replacements.find(Instr.getDest()); in localCSE()
629 auto DepIter = Dependency.find(Instr.getDest()); in localCSE()
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DIceTargetLoweringX86BaseImpl.h102 Inst *Instr = nullptr;
140 static BoolFoldingProducerKind getProducerKind(const Inst *Instr);
141 static BoolFoldingConsumerKind getConsumerKind(const Inst *Instr);
142 static bool hasComplexLowering(const Inst *Instr);
153 return Element != Producers.end() && Element->second.Instr != nullptr;
155 void setInvalid(SizeT VarNum) { Producers[VarNum].Instr = nullptr; }
156 void invalidateProducersOnStore(const Inst *Instr);
163 : Instr(I), IsComplex(BoolFolding<Traits>::hasComplexLowering(I)) {}
167 BoolFolding<Traits>::getProducerKind(const Inst *Instr) {
168 if (llvm::isa<InstIcmp>(Instr)) {
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DIceTargetLoweringARM32.cpp447 void TargetARM32::genTargetHelperCallFor(Inst *Instr) { in genTargetHelperCallFor() argument
451 switch (Instr->getKind()) { in genTargetHelperCallFor()
455 Variable *Dest = Instr->getDest(); in genTargetHelperCallFor()
458 llvm::cast<InstArithmetic>(Instr)->getOp(); in genTargetHelperCallFor()
469 scalarizeArithmetic(Op, Dest, Instr->getSrc(0), Instr->getSrc(1)); in genTargetHelperCallFor()
470 Instr->setDeleted(); in genTargetHelperCallFor()
503 Call->addArg(Instr->getSrc(0)); in genTargetHelperCallFor()
504 Call->addArg(Instr->getSrc(1)); in genTargetHelperCallFor()
505 Instr->setDeleted(); in genTargetHelperCallFor()
541 Operand *Src0 = Instr->getSrc(0); in genTargetHelperCallFor()
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DIceASanInstrumentation.cpp342 InstCall *Instr) { in instrumentCall() argument
344 llvm::dyn_cast<ConstantRelocatable>(Instr->getCallTarget()); in instrumentCall()
356 InstCall::create(Context.getNode()->getCfg(), Instr->getNumArgs(), in instrumentCall()
357 Instr->getDest(), NewFunc, Instr->isTailcall()); in instrumentCall()
358 for (SizeT I = 0, Args = Instr->getNumArgs(); I < Args; ++I) in instrumentCall()
359 NewCall->addArg(Instr->getArg(I)); in instrumentCall()
361 Instr->setDeleted(); in instrumentCall()
365 InstLoad *Instr) { in instrumentLoad() argument
366 Operand *Src = Instr->getSourceAddress(); in instrumentLoad()
369 Instr->getDest(), instrumentReloc(Reloc)); in instrumentLoad()
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DIceTargetLoweringMIPS32.cpp210 for (Inst &Instr : Node->getInsts()) { in unsetIfNonLeafFunc()
211 if (llvm::isa<InstCall>(&Instr)) { in unsetIfNonLeafFunc()
265 void TargetMIPS32::genTargetHelperCallFor(Inst *Instr) { in genTargetHelperCallFor() argument
268 Variable *Dest = Instr->getDest(); in genTargetHelperCallFor()
271 switch (Instr->getKind()) { in genTargetHelperCallFor()
276 Operand *SrcT = llvm::cast<InstSelect>(Instr)->getTrueOperand(); in genTargetHelperCallFor()
277 Operand *SrcF = llvm::cast<InstSelect>(Instr)->getFalseOperand(); in genTargetHelperCallFor()
278 Operand *Cond = llvm::cast<InstSelect>(Instr)->getCondition(); in genTargetHelperCallFor()
299 Instr->setDeleted(); in genTargetHelperCallFor()
305 InstFcmp::FCond Cond = llvm::cast<InstFcmp>(Instr)->getCondition(); in genTargetHelperCallFor()
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DIceInstARM32.h471 const InstARM32 *Instr, const Cfg *Func,
474 const InstARM32 *Instr, const Cfg *Func);
485 static bool isClassof(const Inst *Instr, InstKindARM32 MyKind) { in isClassof() argument
486 return Instr->getKind() == static_cast<InstKind>(MyKind); in isClassof()
512 static void emitUnaryopGPR(const char *Opcode, const InstARM32Pred *Instr,
515 const InstARM32Pred *Instr, const Cfg *Func);
516 static void emitTwoAddr(const char *Opcode, const InstARM32Pred *Instr,
518 static void emitThreeAddr(const char *Opcode, const InstARM32Pred *Instr,
520 static void emitFourAddr(const char *Opcode, const InstARM32Pred *Instr,
522 static void emitCmpLike(const char *Opcode, const InstARM32Pred *Instr,
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DIceTargetLoweringARM32.h210 void lowerAlloca(const InstAlloca *Instr) override;
211 SafeBoolChain lowerInt1Arithmetic(const InstArithmetic *Instr);
214 void lowerArithmetic(const InstArithmetic *Instr) override;
215 void lowerAssign(const InstAssign *Instr) override;
216 void lowerBr(const InstBr *Instr) override;
217 void lowerCall(const InstCall *Instr) override;
218 void lowerCast(const InstCast *Instr) override;
219 void lowerExtractElement(const InstExtractElement *Instr) override;
250 CondWhenTrue lowerFcmpCond(const InstFcmp *Instr);
251 void lowerFcmp(const InstFcmp *Instr) override;
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DIceTargetLoweringMIPS32.h63 bool doBranchOpt(Inst *Instr, const CfgNode *NextNode) override;
376 auto *Instr = Context.insert<InstMIPS32Mov>(Dest, Src0, Src1); variable
377 if (Instr->getDestHi() != nullptr) {
381 Context.insert<InstFakeDef>(Instr->getDestHi());
390 auto *Instr = Context.insert<InstMIPS32Mov>(Dest, Src0, Src1); variable
391 Instr->setDestRedefined();
392 if (Instr->getDestHi() != nullptr) {
396 Context.insert<InstFakeDef>(Instr->getDestHi());
765 void lowerAlloca(const InstAlloca *Instr) override;
766 void lowerArithmetic(const InstArithmetic *Instr) override;
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/external/llvm/lib/Target/ARM/
DARMFeatures.h22 bool IsCPSRDead(InstrType *Instr);
25 inline bool isV8EligibleForIT(InstrType *Instr) { in isV8EligibleForIT() argument
26 switch (Instr->getOpcode()) { in isV8EligibleForIT()
53 return IsCPSRDead(Instr); in isV8EligibleForIT()
79 return Instr->getOperand(2).getReg() != ARM::PC; in isV8EligibleForIT()
84 return Instr->getOperand(0).getReg() != ARM::PC; in isV8EligibleForIT()
86 return Instr->getOperand(0).getReg() != ARM::PC && in isV8EligibleForIT()
87 Instr->getOperand(2).getReg() != ARM::PC; in isV8EligibleForIT()
90 return Instr->getOperand(0).getReg() != ARM::PC && in isV8EligibleForIT()
91 Instr->getOperand(1).getReg() != ARM::PC; in isV8EligibleForIT()
/external/v8/src/mips/
Dassembler-mips.h432 int BranchOffset(Instr instr);
505 static const int kInstrSize = sizeof(Instr);
1086 static Instr instr_at(byte* pc) { return *reinterpret_cast<Instr*>(pc); } in instr_at()
1087 static void instr_at_put(byte* pc, Instr instr) { in instr_at_put()
1088 *reinterpret_cast<Instr*>(pc) = instr; in instr_at_put()
1090 Instr instr_at(int pos) { return *reinterpret_cast<Instr*>(buffer_ + pos); } in instr_at()
1091 void instr_at_put(int pos, Instr instr) { in instr_at_put()
1092 *reinterpret_cast<Instr*>(buffer_ + pos) = instr; in instr_at_put()
1096 static bool IsBranch(Instr instr);
1097 static bool IsBc(Instr instr);
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Dassembler-mips.cc260 const Instr kPopInstruction = ADDIU | (Register::kCode_sp << kRsShift) |
264 const Instr kPushInstruction = ADDIU | (Register::kCode_sp << kRsShift) |
268 const Instr kPushRegPattern =
271 const Instr kPopRegPattern =
274 const Instr kLwRegFpOffsetPattern =
277 const Instr kSwRegFpOffsetPattern =
280 const Instr kLwRegFpNegOffsetPattern = LW | (Register::kCode_fp << kRsShift) |
283 const Instr kSwRegFpNegOffsetPattern = SW | (Register::kCode_fp << kRsShift) |
286 const Instr kRtMask = kRtFieldMask;
287 const Instr kLwSwInstrTypeMask = 0xffe00000;
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/external/llvm/lib/Target/AMDGPU/
DR600OptimizeVectorRegisters.cpp65 MachineInstr *Instr; member in __anonc1a707f80111::RegSeqInfo
68 RegSeqInfo(MachineRegisterInfo &MRI, MachineInstr *MI) : Instr(MI) { in RegSeqInfo()
70 for (unsigned i = 1, e = Instr->getNumOperands(); i < e; i+=2) { in RegSeqInfo()
71 MachineOperand &MO = Instr->getOperand(i); in RegSeqInfo()
72 unsigned Chan = Instr->getOperand(i + 1).getImm(); in RegSeqInfo()
82 return RSI.Instr == Instr; in operator ==()
182 unsigned Reg = RSI->Instr->getOperand(0).getReg(); in RebuildVector()
183 MachineBasicBlock::iterator Pos = RSI->Instr; in RebuildVector()
187 unsigned SrcVec = BaseRSI->Instr->getOperand(0).getReg(); in RebuildVector()
225 RSI->Instr->eraseFromParent(); in RebuildVector()
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/external/v8/src/mips64/
Dassembler-mips64.h436 int BranchOffset(Instr instr);
512 static const int kInstrSize = sizeof(Instr);
1147 static Instr instr_at(byte* pc) { return *reinterpret_cast<Instr*>(pc); } in instr_at()
1148 static void instr_at_put(byte* pc, Instr instr) { in instr_at_put()
1149 *reinterpret_cast<Instr*>(pc) = instr; in instr_at_put()
1151 Instr instr_at(int pos) { return *reinterpret_cast<Instr*>(buffer_ + pos); } in instr_at()
1152 void instr_at_put(int pos, Instr instr) { in instr_at_put()
1153 *reinterpret_cast<Instr*>(buffer_ + pos) = instr; in instr_at_put()
1157 static bool IsBranch(Instr instr);
1158 static bool IsBc(Instr instr);
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Dassembler-mips64.cc241 const Instr kPopInstruction = DADDIU | (Register::kCode_sp << kRsShift) |
245 const Instr kPushInstruction = DADDIU | (Register::kCode_sp << kRsShift) |
249 const Instr kPushRegPattern =
252 const Instr kPopRegPattern =
255 const Instr kLwRegFpOffsetPattern =
258 const Instr kSwRegFpOffsetPattern =
261 const Instr kLwRegFpNegOffsetPattern = LW | (Register::kCode_fp << kRsShift) |
264 const Instr kSwRegFpNegOffsetPattern = SW | (Register::kCode_fp << kRsShift) |
267 const Instr kRtMask = kRtFieldMask;
268 const Instr kLwSwInstrTypeMask = 0xffe00000;
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/external/llvm/lib/Target/Lanai/Disassembler/
DLanaiDisassembler.cpp89 static void PostOperandDecodeAdjust(MCInst &Instr, uint32_t Insn) { in PostOperandDecodeAdjust() argument
93 if (isRMOpcode(Instr.getOpcode())) in PostOperandDecodeAdjust()
95 else if (isSPLSOpcode(Instr.getOpcode())) in PostOperandDecodeAdjust()
97 else if (isRRMOpcode(Instr.getOpcode())) { in PostOperandDecodeAdjust()
111 if (Instr.getOperand(2).isReg()) { in PostOperandDecodeAdjust()
112 Instr.getOperand(2).setReg(Lanai::R0); in PostOperandDecodeAdjust()
114 if (Instr.getOperand(2).isImm()) in PostOperandDecodeAdjust()
115 Instr.getOperand(2).setImm(0); in PostOperandDecodeAdjust()
126 Instr.addOperand(MCOperand::createImm(AluOp)); in PostOperandDecodeAdjust()
130 DecodeStatus LanaiDisassembler::getInstruction(MCInst &Instr, uint64_t &Size, in getInstruction() argument
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/external/v8/src/arm/
Dassembler-arm.h536 int instructions_required(const Assembler* assembler, Instr instr = 0) const;
762 static const int kInstrSize = sizeof(Instr);
1557 Instr instr_at(int pos) { return *reinterpret_cast<Instr*>(buffer_ + pos); } in instr_at()
1558 void instr_at_put(int pos, Instr instr) { in instr_at_put()
1559 *reinterpret_cast<Instr*>(buffer_ + pos) = instr; in instr_at_put()
1561 static Instr instr_at(byte* pc) { return *reinterpret_cast<Instr*>(pc); } in instr_at()
1562 static void instr_at_put(byte* pc, Instr instr) { in instr_at_put()
1563 *reinterpret_cast<Instr*>(pc) = instr; in instr_at_put()
1565 static Condition GetCondition(Instr instr);
1566 static bool IsBranch(Instr instr);
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/external/v8/src/arm64/
Dassembler-arm64-inl.h950 Instr Assembler::Flags(FlagsUpdate S) {
961 Instr Assembler::Cond(Condition cond) {
966 Instr Assembler::ImmPCRelAddress(int imm21) {
968 Instr imm = static_cast<Instr>(truncate_to_int21(imm21));
969 Instr immhi = (imm >> ImmPCRelLo_width) << ImmPCRelHi_offset;
970 Instr immlo = imm << ImmPCRelLo_offset;
975 Instr Assembler::ImmUncondBranch(int imm26) {
981 Instr Assembler::ImmCondBranch(int imm19) {
987 Instr Assembler::ImmCmpBranch(int imm19) {
993 Instr Assembler::ImmTestBranch(int imm14) {
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/external/llvm/test/TableGen/
DPaste.td4 class Instr<int i> {
9 def Vx#NAME#PS : Instr<0>;
10 def Vx#NAME#PD : Instr<1>;
11 def Vy#NAME#PS : Instr<2>;
12 def Vy#NAME#PD : Instr<3>;
/external/vixl/src/aarch64/
Dassembler-aarch64.h1419 void NEONFPConvertToInt(const Register& rd, const VRegister& vn, Instr op);
1420 void NEONFPConvertToInt(const VRegister& vd, const VRegister& vn, Instr op);
2554 void dci(Instr raw_inst) { Emit(raw_inst); } in dci()
2583 static Instr Rd(CPURegister rd) { in Rd()
2588 static Instr Rn(CPURegister rn) { in Rn()
2593 static Instr Rm(CPURegister rm) { in Rm()
2598 static Instr RmNot31(CPURegister rm) { in RmNot31()
2604 static Instr Ra(CPURegister ra) { in Ra()
2609 static Instr Rt(CPURegister rt) { in Rt()
2614 static Instr Rt2(CPURegister rt2) { in Rt2()
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