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Searched refs:RBP (Results 1 – 25 of 57) sorted by relevance

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/external/libunwind/src/x86_64/
DGstash_frame.c41 rs->reg[RBP].where, rs->reg[RBP].val, DWARF_GET_LOC(d->loc[RBP]), in tdep_stash_frame()
51 && (rs->reg[DWARF_CFA_REG_COLUMN].val == RBP in tdep_stash_frame()
55 && (rs->reg[RBP].where == DWARF_WHERE_UNDEF in tdep_stash_frame()
56 || rs->reg[RBP].where == DWARF_WHERE_SAME in tdep_stash_frame()
57 || (rs->reg[RBP].where == DWARF_WHERE_CFAREL in tdep_stash_frame()
58 && labs(rs->reg[RBP].val) < (1 << 14) in tdep_stash_frame()
59 && rs->reg[RBP].val+1 != 0)) in tdep_stash_frame()
70 if (rs->reg[RBP].where == DWARF_WHERE_CFAREL) in tdep_stash_frame()
71 f->rbp_cfa_offset = rs->reg[RBP].val; in tdep_stash_frame()
88 assert (DWARF_GET_LOC(d->loc[RBP]) - uc == UC_MCONTEXT_GREGS_RBP); in tdep_stash_frame()
DGstep.c90 if (DWARF_IS_NULL_LOC (c->dwarf.loc[RBP])) in unw_step()
138 else if (DWARF_IS_NULL_LOC (c->dwarf.loc[RBP])) in unw_step()
147 ret = dwarf_get (&c->dwarf, c->dwarf.loc[RBP], &rbp); in unw_step()
151 DWARF_GET_LOC (c->dwarf.loc[RBP])); in unw_step()
170 (unsigned long) DWARF_GET_LOC (c->dwarf.loc[RBP]), in unw_step()
197 c->dwarf.loc[RBP] = rbp_loc; in unw_step()
204 if (DWARF_IS_NULL_LOC (c->dwarf.loc[RBP])) in unw_step()
Dinit.h55 c->dwarf.loc[RBP] = REG_INIT_LOC(c, rbp, RBP); in common_init()
Dunwind_i.h45 #define RBP 6 macro
DGget_save_loc.c42 case UNW_X86_64_RBP: loc = c->dwarf.loc[RBP]; break; in unw_get_save_loc()
DGregs.c110 case UNW_X86_64_RBP: loc = c->dwarf.loc[RBP]; break; in tdep_access_reg()
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86RegisterInfo.cpp70 FramePtr = X86::RBP; in X86RegisterInfo()
87 case X86::EBP: case X86::RBP: return 6; in getCompactUnwindRegNum()
361 X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, 0 in getCalleeSavedRegs()
366 X86::R13, X86::R14, X86::R15, X86::RBP, 0 in getCalleeSavedRegs()
370 X86::RBX, X86::RBP, X86::RDI, X86::RSI, in getCalleeSavedRegs()
406 Reserved.set(X86::RBP); in getReservedRegs()
693 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP: in getX86SubSuperRegister()
730 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP: in getX86SubSuperRegister()
766 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP: in getX86SubSuperRegister()
802 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP: in getX86SubSuperRegister()
[all …]
DX86RegisterInfo.td130 def RBP : RegisterWithSubRegs<"rbp", [EBP]>, DwarfRegNum<[6, -2, -2]>;
277 // List call-clobbered registers before callee-save registers. RBX, RBP, (and
314 RBX, R14, R15, R12, R13, RBP, RSP, RIP)> {
387 (add RAX, RCX, RDX, RSI, RDI, RBX, RBP, RSP, RIP)> {
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86MCTargetDesc.cpp109 X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::RBP, X86::RSP, in initLLVMToSEHAndCVRegMapping()
289 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP: in getX86SubSuperRegisterOrZero()
317 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP: in getX86SubSuperRegisterOrZero()
354 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP: in getX86SubSuperRegisterOrZero()
390 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP: in getX86SubSuperRegisterOrZero()
426 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP: in getX86SubSuperRegisterOrZero()
427 return X86::RBP; in getX86SubSuperRegisterOrZero()
DX86AsmBackend.cpp500 case X86::RBP: in PushInstrSize()
550 (Is64Bit ? X86::RBP : X86::EBP) && "Invalid frame pointer!"); in generateCompactUnwindEncodingImpl()
682 X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, 0 in getCompactUnwindRegNum()
/external/llvm/test/CodeGen/X86/
Dstackmap.ll274 ; Check that at least one is a spilled entry from RBP.
275 ; Location: Indirect RBP + ...
293 ; Check that at least one is a spilled entry from RBP.
294 ; Location: Indirect RBP + ...
312 ; Location: Indirect, 4-byte, RBP + ...
398 ; Loc 0: Direct RBP - ofs
409 ; Loc 0: Direct RBP - ofs
414 ; Loc 1: Direct RBP - ofs
Dwin-funclet-cfi.ll42 ; Emit CFI for pushing RBP.
72 ; Emit CFI for pushing RBP.
Dwin-catchpad-varargs.ll51 ; arg2 is at RBP+40:
55 ; + 8 for RBP
Dcleanuppad-realign.ll60 ; RBP will reload from this offset.
/external/strace/linux/x86_64/
Duserent.h5 XLAT(8*RBP),
/external/llvm/lib/Target/X86/
DX86CallingConv.td186 CCIfType<[i64], CCAssignToReg<[R15, RBP, RAX, RDX]>>
233 CCIfType<[i64], CCAssignToReg<[RBX, RBP, RDI, RSI, RDX, RCX, R8, R9,
373 CCIfType<[i64], CCAssignToReg<[RBX, R12, RBP, R15,
380 // Pass the first argument in RBP.
381 CCIfType<[i64], CCAssignToReg<[RBP]>>,
463 CCAssignToReg<[R13, RBP, R12, RBX, R14, RSI, RDI, R8, R9, R15]>>,
476 CCIfType<[i64], CCAssignToReg<[R15, RBP, RSI, RDX, RCX, R8]>>,
856 def CSR_64 : CalleeSavedRegs<(add RBX, R12, R13, R14, R15, RBP)>;
863 def CSR_Win64 : CalleeSavedRegs<(add RBX, RBP, RDI, RSI, R12, R13, R14, R15,
873 def CSR_64_CXX_TLS_Darwin_PE : CalleeSavedRegs<(add RBP)>;
[all …]
DX86RegisterInfo.td135 def RBP : X86Reg<"rbp", 5, [EBP]>, DwarfRegNum<[6, -2, -2]>;
317 // List call-clobbered registers before callee-save registers. RBX, RBP, (and
350 RBX, R14, R15, R12, R13, RBP, RSP, RIP)>;
396 (add RAX, RCX, RDX, RSI, RDI, RBX, RBP, RSP, RIP)>;
431 // When RBP is used as a base pointer in a 32-bit addresses environement,
433 // Since RBP will never be spilled, stick to a 32 alignment to save
436 (add LOW32_ADDR_ACCESS, RBP)>;
DX86RegisterInfo.cpp71 FramePtr = Use64BitReg ? X86::RBP : X86::EBP; in X86RegisterInfo()
448 for (MCSubRegIterator I(X86::RBP, this, /*IncludeSelf=*/true); I.isValid(); in getReservedRegs()
/external/kernel-headers/original/uapi/asm-x86/asm/
Dptrace-abi.h36 #define RBP 32 macro
/external/valgrind/coregrind/m_sigframe/
Dsigframe-amd64-darwin.c103 SC2(__rbp,RBP); in synthesize_ucontext()
131 SC2(RBP,__rbp); in restore_from_ucontext()
/external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h166 ENTRY(RBP) \
184 ENTRY(RBP) \
/external/lzma/Asm/x86/
D7zAsm.asm71 r5 equ RBP
/external/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h176 ENTRY(RBP) \
194 ENTRY(RBP) \
/external/google-breakpad/src/common/android/
Dbreakpad_getcontext_unittest.cc131 CHECK_REG(RBP); in TEST()
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dghc-cc64.ll6 @sp = external global i64 ; assigned to register: RBP

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