/external/llvm/test/CodeGen/AMDGPU/ |
D | llvm.amdgcn.rsq.clamp.ll | 11 ; VI-DAG: v_rsq_f32_e32 [[RSQ:v[0-9]+]], [[SRC]] 12 ; VI-DAG: v_min_f32_e32 [[MIN:v[0-9]+]], 0x7f7fffff, [[RSQ]] 31 ; VI-DAG: v_rsq_f64_e32 [[RSQ:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+:[0-9]+}} 32 ; VI-DAG: v_min_f64 v[0:1], [[RSQ]], s{{\[}}[[LOW1]]:[[HIGH1]]]
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D | llvm.AMDGPU.rsq.clamped.f64.ll | 9 ; VI-DAG: v_rsq_f64_e32 [[RSQ:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+:[0-9]+}}] 13 ; VI-DAG: v_min_f64 v[0:1], [[RSQ]], s{{\[}}[[LOW1]]:[[HIGH1]]]
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D | llvm.AMDGPU.rsq.clamped.ll | 13 ; VI-DAG: v_rsq_f32_e32 [[RSQ:v[0-9]+]], {{s[0-9]+}} 14 ; VI-DAG: v_min_f32_e32 [[MIN:v[0-9]+]], 0x7f7fffff, [[RSQ]]
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/external/mesa3d/src/gallium/tests/graw/fragment-shader/ |
D | frag-rsq.sh | 12 RSQ TEMP[0].x, TEMP[0].xxxx
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/external/mesa3d/src/gallium/tests/graw/vertex-shader/ |
D | vert-rsq.sh | 14 RSQ TEMP[0].x, TEMP[0].xxxx
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/external/mesa3d/src/mesa/program/ |
D | program_lexer.l | 217 RSQ{sat} { return_opcode( 1, SCALAR_OP, RSQ, 3); }
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/external/mesa3d/src/gallium/auxiliary/tgsi/ |
D | tgsi_opcode_tmp.h | 63 OP11(RSQ)
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/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelLowering.h | 256 RSQ, enumerator
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D | AMDGPUInstrInfo.td | 65 def AMDGPUrsq : SDNode<"AMDGPUISD::RSQ", SDTFPUnaryOp>;
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D | SIISelLowering.cpp | 1692 return DAG.getNode(AMDGPUISD::RSQ, DL, VT, Op.getOperand(1)); in LowerINTRINSIC_WO_CHAIN() 1708 SDValue Rsq = DAG.getNode(AMDGPUISD::RSQ, DL, VT, Op.getOperand(1)); in LowerINTRINSIC_WO_CHAIN() 2136 return DAG.getNode(AMDGPUISD::RSQ, SL, VT, RHS.getOperand(0)); in LowerFastFDIV() 3051 case AMDGPUISD::RSQ: in PerformDAGCombine()
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D | AMDGPUISelLowering.cpp | 2827 NODE_NAME_CASE(RSQ) in getTargetNodeName() 2886 return DAG.getNode(AMDGPUISD::RSQ, SDLoc(Operand), VT, Operand); in getRsqrtEstimate()
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/external/mesa3d/src/gallium/drivers/etnaviv/ |
D | etnaviv_disasm.c | 476 OPC(RSQ),
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D | etnaviv_compiler.c | 1742 INSTR(RSQ, trans_instr, .opc = INST_OPCODE_RSQ, .src = {2, -1, -1}),
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/external/mesa3d/src/gallium/drivers/vc4/ |
D | vc4_qir.h | 737 QIR_ALU1(RSQ) in QIR_ALU1()
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/external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
D | ir3.h | 1096 INSTR1(RSQ) in INSTR2()
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/external/mesa3d/src/gallium/state_trackers/nine/ |
D | nine_shader.c | 2264 DECL_SPECIAL(RSQ) in DECL_SPECIAL() argument 2901 _OPI(RSQ, RSQ, V(0,0), V(3,0), V(0,0), V(3,0), 1, 1, SPECIAL(RSQ)), /* 7 */
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/external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
D | nv50_ir_from_tgsi.cpp | 715 NV50_IR_OPCODE_CASE(RSQ, RSQ); in translateOpcode() 829 NV50_IR_OPCODE_CASE(DRSQ, RSQ); in translateOpcode()
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/external/mesa3d/src/mesa/drivers/dri/r200/ |
D | r200_vertprog.c | 92 OPN(RSQ, 1|SCALAR_FLAG),
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/external/mesa3d/src/gallium/drivers/nouveau/nv30/ |
D | nvfx_vertprog.c | 649 nvfx_vp_emit(vpc, arith(sat, SCA, RSQ, dst, mask, none, none, abs(src[0]))); in nvfx_vertprog_parse_instruction()
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/external/mesa3d/src/mesa/state_tracker/ |
D | st_glsl_to_tgsi.cpp | 979 case3fid(RSQ, RSQ, DRSQ); in get_opcode()
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/external/mesa3d/src/gallium/docs/source/ |
D | tgsi.rst | 92 .. opcode:: RSQ - Reciprocal Square Root
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