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Searched refs:andc (Results 1 – 25 of 31) sorted by relevance

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/external/swiftshader/third_party/LLVM/test/CodeGen/CellSPU/
Dintrinsics_logical.ll3 ; RUN: grep andc %t1.s | count 5
8 declare <4 x i32> @llvm.spu.si.andc(<4 x i32>, <4 x i32>)
34 call <4 x i32> @llvm.spu.si.andc(<4 x i32> %A, <4 x i32> %B)
Dand_ops.ll3 ; RUN: grep andc %t1.s | count 85
/external/llvm/test/CodeGen/PowerPC/
Dvariable_elem_vec_extracts.ll16 ; CHECK-DAG: andc [[MASKREG:[0-9]+]], [[TRUNCREG]], 5
34 ; CHECK-BE-DAG: andc [[ANDCREG:[0-9]+]], [[IMMREG]], 5
50 ; CHECK-DAG: andc [[MASKREG:[0-9]+]], [[TRUNCREG]], 5
96 ; CHECK: andc [[MASKREG:[0-9]+]], [[TRUNCREG]], 5
Dandc.ll3 ; TODO: These could use 'andc'.
Deqv-andc-orc-nor.ll4 ; RUN: grep andc | count 3
Dp8-scalar_vector_conversions.ll686 ; CHECK-DAG: andc [[ANDC:[0-9]+]], [[IMM7]]
692 ; CHECK-DAG-LE: andc [[ANDC:[0-9]+]], [[IMM8]]
720 ; CHECK-DAG: andc [[ANDC:[0-9]+]], [[IMM7]]
726 ; CHECK-DAG-LE: andc [[ANDC:[0-9]+]], [[IMM8]]
1038 ; CHECK-DAG: andc [[ANDC:[0-9]+]], [[IMM3]]
1044 ; CHECK-DAG-LE: andc [[ANDC:[0-9]+]], [[IMM4]]
1074 ; CHECK-DAG: andc [[ANDC:[0-9]+]], [[IMM3]]
1080 ; CHECK-DAG-LE: andc [[ANDC:[0-9]+]], [[IMM4]]
/external/valgrind/none/tests/ppc32/
Djm-int_other.stdout.exp12 andc 00000000, 00000000 => 00000000 (00000000 00000000)
13 andc 00000000, 000f423f => 00000000 (00000000 00000000)
14 andc 00000000, ffffffff => 00000000 (00000000 00000000)
15 andc 000f423f, 00000000 => 000f423f (00000000 00000000)
16 andc 000f423f, 000f423f => 00000000 (00000000 00000000)
17 andc 000f423f, ffffffff => 00000000 (00000000 00000000)
18 andc ffffffff, 00000000 => ffffffff (00000000 00000000)
19 andc ffffffff, 000f423f => fff0bdc0 (00000000 00000000)
20 andc ffffffff, ffffffff => 00000000 (00000000 00000000)
/external/llvm/test/MC/PowerPC/
Dppc64-encoding.s632 # CHECK-BE: andc 2, 3, 4 # encoding: [0x7c,0x62,0x20,0x78]
633 # CHECK-LE: andc 2, 3, 4 # encoding: [0x78,0x20,0x62,0x7c]
634 andc 2, 3, 4
635 # CHECK-BE: andc. 2, 3, 4 # encoding: [0x7c,0x62,0x20,0x79]
636 # CHECK-LE: andc. 2, 3, 4 # encoding: [0x79,0x20,0x62,0x7c]
637 andc. 2, 3, 4
/external/valgrind/none/tests/ppc64/
Djm-int_other.stdout.exp-LE12 andc 0000000000000000, 0000000000000000 => 0000000000000000 (00000000 00000000)
13 andc 0000000000000000, 0000001cbe991def => 0000000000000000 (00000000 00000000)
14 andc 0000000000000000, ffffffffffffffff => 0000000000000000 (00000000 00000000)
15 andc 0000001cbe991def, 0000000000000000 => 0000001cbe991def (00000000 00000000)
16 andc 0000001cbe991def, 0000001cbe991def => 0000000000000000 (00000000 00000000)
17 andc 0000001cbe991def, ffffffffffffffff => 0000000000000000 (00000000 00000000)
18 andc ffffffffffffffff, 0000000000000000 => ffffffffffffffff (00000000 00000000)
19 andc ffffffffffffffff, 0000001cbe991def => ffffffe34166e210 (00000000 00000000)
20 andc ffffffffffffffff, ffffffffffffffff => 0000000000000000 (00000000 00000000)
153 andc. 0000000000000000, 0000000000000000 => 0000000000000000 (20000000 00000000)
[all …]
Djm-int.stdout.exp-LE624 andc 0000000000000000, 0000000000000000 => 0000000000000000 (00000000 00000000)
625 andc 0000000000000000, 0000001cbe991def => 0000000000000000 (00000000 00000000)
626 andc 0000000000000000, ffffffffffffffff => 0000000000000000 (00000000 00000000)
627 andc 0000001cbe991def, 0000000000000000 => 0000001cbe991def (00000000 00000000)
628 andc 0000001cbe991def, 0000001cbe991def => 0000000000000000 (00000000 00000000)
629 andc 0000001cbe991def, ffffffffffffffff => 0000000000000000 (00000000 00000000)
630 andc ffffffffffffffff, 0000000000000000 => ffffffffffffffff (00000000 00000000)
631 andc ffffffffffffffff, 0000001cbe991def => ffffffe34166e210 (00000000 00000000)
632 andc ffffffffffffffff, ffffffffffffffff => 0000000000000000 (00000000 00000000)
765 andc. 0000000000000000, 0000000000000000 => 0000000000000000 (20000000 00000000)
[all …]
Djm-int_other.stdout.exp12 andc 0000000000000000, 0000000000000000 => 0000000000000000 (00000000 00000000)
13 andc 0000000000000000, 0000001cbe991def => 0000000000000000 (00000000 00000000)
14 andc 0000000000000000, ffffffffffffffff => 0000000000000000 (00000000 00000000)
15 andc 0000001cbe991def, 0000000000000000 => 0000001cbe991def (00000000 00000000)
16 andc 0000001cbe991def, 0000001cbe991def => 0000000000000000 (00000000 00000000)
17 andc 0000001cbe991def, ffffffffffffffff => 0000000000000000 (00000000 00000000)
18 andc ffffffffffffffff, 0000000000000000 => ffffffffffffffff (00000000 00000000)
19 andc ffffffffffffffff, 0000001cbe991def => ffffffe34166e210 (00000000 00000000)
20 andc ffffffffffffffff, ffffffffffffffff => 0000000000000000 (00000000 00000000)
/external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/
Deqv-andc-orc-nor.ll4 ; RUN: grep andc | count 3
/external/llvm/test/MC/Disassembler/PowerPC/
Dppc64le-encoding.txt487 # CHECK: andc 2, 3, 4
490 # CHECK: andc. 2, 3, 4
Dppc64-encoding.txt508 # CHECK: andc 2, 3, 4
511 # CHECK: andc. 2, 3, 4
/external/swiftshader/third_party/LLVM/include/llvm/
DIntrinsicsCellSPU.td198 def int_spu_si_andc: v4i32_rr<"andc">;
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DREADME_ALTIVEC.txt174 codegen'd to andc. The issue is that the 'all ones' build vector is
DPPCSchedule.td127 // andc IntGeneral
DREADME.txt482 andc r3, r3, r2
DPPCInstr64Bit.td286 "andc $rA, $rS, $rB", IntGeneral,
/external/llvm/lib/Target/PowerPC/
DREADME_ALTIVEC.txt174 codegen'd to andc. The issue is that the 'all ones' build vector is
DREADME.txt269 andc r3, r3, r2
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DCellSDKIntrinsics.td117 "andc\t $rT, $rA, $rB", IntegerOp,
/external/v8/src/ppc/
Dassembler-ppc.h842 void andc(Register dst, Register src1, Register src2, RCBit rc = LeaveRC);
Dconstants-ppc.h1128 V(andc, ANDCX, 0x7C000078) \
/external/v8/src/compiler/ppc/
Dcode-generator-ppc.cc1160 __ andc(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1), in AssembleArchInstruction() local

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