Home
last modified time | relevance | path

Searched refs:coerce (Results 1 – 25 of 81) sorted by relevance

1234

/external/llvm/test/CodeGen/Mips/
Ddsp-patterns-cmp-vselect.ll7 define { i32 } @select_v2q15_eq_(i32 %a0.coerce, i32 %a1.coerce, i32 %a2.coerce, i32 %a3.coerce) {
9 %0 = bitcast i32 %a0.coerce to <2 x i16>
10 %1 = bitcast i32 %a1.coerce to <2 x i16>
11 %2 = bitcast i32 %a2.coerce to <2 x i16>
12 %3 = bitcast i32 %a3.coerce to <2 x i16>
24 define { i32 } @select_v2q15_lt_(i32 %a0.coerce, i32 %a1.coerce, i32 %a2.coerce, i32 %a3.coerce) {
26 %0 = bitcast i32 %a0.coerce to <2 x i16>
27 %1 = bitcast i32 %a1.coerce to <2 x i16>
28 %2 = bitcast i32 %a2.coerce to <2 x i16>
29 %3 = bitcast i32 %a3.coerce to <2 x i16>
[all …]
Ddsp-r2.ll3 define i64 @test__builtin_mips_dpa_w_ph1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) nou…
7 %1 = bitcast i32 %a1.coerce to <2 x i16>
8 %2 = bitcast i32 %a2.coerce to <2 x i16>
15 define i64 @test__builtin_mips_dps_w_ph1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) nou…
19 %1 = bitcast i32 %a1.coerce to <2 x i16>
20 %2 = bitcast i32 %a2.coerce to <2 x i16>
27 define i64 @test__builtin_mips_mulsa_w_ph1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) n…
31 %1 = bitcast i32 %a1.coerce to <2 x i16>
32 %2 = bitcast i32 %a2.coerce to <2 x i16>
39 define i64 @test__builtin_mips_dpax_w_ph1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) no…
[all …]
Ddsp-r1.ll112 define i64 @test__builtin_mips_dpau_h_qbl1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) n…
116 %1 = bitcast i32 %a1.coerce to <4 x i8>
117 %2 = bitcast i32 %a2.coerce to <4 x i8>
124 define i64 @test__builtin_mips_dpau_h_qbr1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) n…
128 %1 = bitcast i32 %a1.coerce to <4 x i8>
129 %2 = bitcast i32 %a2.coerce to <4 x i8>
136 define i64 @test__builtin_mips_dpsu_h_qbl1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) n…
140 %1 = bitcast i32 %a1.coerce to <4 x i8>
141 %2 = bitcast i32 %a2.coerce to <4 x i8>
148 define i64 @test__builtin_mips_dpsu_h_qbr1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) n…
[all …]
Ddsp-patterns.ll37 define { i32 } @test_add_v2q15_(i32 %a.coerce, i32 %b.coerce) {
39 %0 = bitcast i32 %a.coerce to <2 x i16>
40 %1 = bitcast i32 %b.coerce to <2 x i16>
50 define { i32 } @test_sub_v2q15_(i32 %a.coerce, i32 %b.coerce) {
52 %0 = bitcast i32 %a.coerce to <2 x i16>
53 %1 = bitcast i32 %b.coerce to <2 x i16>
68 define { i32 } @test_mul_v2q15_(i32 %a.coerce, i32 %b.coerce) {
70 %0 = bitcast i32 %a.coerce to <2 x i16>
71 %1 = bitcast i32 %b.coerce to <2 x i16>
81 define { i32 } @test_add_v4i8_(i32 %a.coerce, i32 %b.coerce) {
[all …]
Dspill-copy-acreg.ll27 define { i32 } @test_ccond_spill(i32 %a.coerce, i32 %b.coerce) {
29 %0 = bitcast i32 %a.coerce to <2 x i16>
30 %1 = bitcast i32 %b.coerce to <2 x i16>
/external/llvm/test/Transforms/LoopRotate/
Dnosimplifylatch.ll9 …St3__14findINS_11__wrap_iterIPiEEiEET_S4_S4_RKT0_(i64 %__first.coerce, i64 %__last.coerce, i32* no…
11 %coerce.val.ip = inttoptr i64 %__first.coerce to i32*
12 %coerce.val.ip2 = inttoptr i64 %__last.coerce to i32*
16 %coerce.val.ip9 = phi i32* [ %incdec.ptr.i, %for.inc ], [ %coerce.val.ip, %entry ]
17 %lnot.i = icmp eq i32* %coerce.val.ip9, %coerce.val.ip2
21 %0 = load i32, i32* %coerce.val.ip9, align 4
27 %incdec.ptr.i = getelementptr inbounds i32, i32* %coerce.val.ip9, i64 1
31 %coerce.val.ip9.lcssa = phi i32* [ %coerce.val.ip9, %for.cond ], [ %coerce.val.ip9, %for.body ]
32 %coerce.val.pi = ptrtoint i32* %coerce.val.ip9.lcssa to i64
33 ret i64 %coerce.val.pi
/external/llvm/test/Transforms/SLPVectorizer/ARM/
Dsroa.ll15 …Aed(%class.Complex* noalias nocapture sret %agg.result, [4 x i32] %a.coerce, [4 x i32] %b.coerce) {
17 %a.coerce.fca.0.extract = extractvalue [4 x i32] %a.coerce, 0
18 %a.sroa.0.0.insert.ext = zext i32 %a.coerce.fca.0.extract to i64
19 %a.coerce.fca.1.extract = extractvalue [4 x i32] %a.coerce, 1
20 %a.sroa.0.4.insert.ext = zext i32 %a.coerce.fca.1.extract to i64
24 %a.coerce.fca.2.extract = extractvalue [4 x i32] %a.coerce, 2
25 %a.sroa.3.8.insert.ext = zext i32 %a.coerce.fca.2.extract to i64
26 %a.coerce.fca.3.extract = extractvalue [4 x i32] %a.coerce, 3
27 %a.sroa.3.12.insert.ext = zext i32 %a.coerce.fca.3.extract to i64
31 %b.coerce.fca.0.extract = extractvalue [4 x i32] %b.coerce, 0
[all …]
/external/llvm/test/Transforms/EarlyCSE/AArch64/
Dintrinsics.ll4 define <4 x i32> @test_cse(i32* %a, [2 x <4 x i32>] %s.coerce, i32 %n) {
9 %s.coerce.fca.0.extract = extractvalue [2 x <4 x i32>] %s.coerce, 0
10 %s.coerce.fca.1.extract = extractvalue [2 x <4 x i32>] %s.coerce, 1
21 %1 = bitcast <4 x i32> %s.coerce.fca.0.extract to <16 x i8>
22 %2 = bitcast <4 x i32> %s.coerce.fca.1.extract to <16 x i8>
38 define <4 x i32> @test_cse2(i32* %a, [2 x <4 x i32>] %s.coerce, i32 %n) {
44 %s.coerce.fca.0.extract = extractvalue [2 x <4 x i32>] %s.coerce, 0
45 %s.coerce.fca.1.extract = extractvalue [2 x <4 x i32>] %s.coerce, 1
56 %1 = bitcast <4 x i32> %s.coerce.fca.0.extract to <16 x i8>
57 %2 = bitcast <4 x i32> %s.coerce.fca.1.extract to <16 x i8>
[all …]
/external/llvm/test/Transforms/InstCombine/
Dvector-type.ll6 define i32 @vselect1(i32 %a.coerce, i32 %b.coerce, i32 %c.coerce) {
8 %0 = bitcast i32 %a.coerce to <2 x i16>
9 %1 = bitcast i32 %b.coerce to <2 x i16>
10 %2 = bitcast i32 %c.coerce to <2 x i16>
/external/llvm/test/CodeGen/PowerPC/
Dvarargs-struct-float.ll8 define void @foo(float inreg %s.coerce) nounwind {
11 %coerce.dive = getelementptr %struct.Sf1, %struct.Sf1* %s, i32 0, i32 0
12 store float %s.coerce, float* %coerce.dive, align 1
13 %coerce.dive1 = getelementptr %struct.Sf1, %struct.Sf1* %s, i32 0, i32 0
14 %0 = load float, float* %coerce.dive1, align 1
/external/llvm/test/CodeGen/Mips/cconv/
Darguments-varargs-small-structs-byte.ll170 %.coerce = alloca { i24 }
173 %1 = bitcast { i24 }* %.coerce to i8*
176 %3 = getelementptr { i24 }, { i24 }* %.coerce, i32 0, i32 0
203 %.coerce = alloca { i40 }
206 %1 = bitcast { i40 }* %.coerce to i8*
209 %3 = getelementptr { i40 }, { i40 }* %.coerce, i32 0, i32 0
220 %.coerce = alloca { i48 }
223 %1 = bitcast { i48 }* %.coerce to i8*
226 %3 = getelementptr { i48 }, { i48 }* %.coerce, i32 0, i32 0
237 %.coerce = alloca { i56 }
[all …]
Darguments-small-structures-bigger-than-32bits.ll51 %s1_1.coerce = alloca { i48 }
52 %0 = bitcast { i48 }* %s1_1.coerce to i8*
55 %2 = getelementptr { i48 }, { i48 }* %s1_1.coerce, i32 0, i32 0
68 %s2_1.coerce = alloca { i40 }
69 %0 = bitcast { i40 }* %s2_1.coerce to i8*
72 %2 = getelementptr { i40 }, { i40 }* %s2_1.coerce, i32 0, i32 0
/external/llvm/test/CodeGen/AArch64/
Darm64-dagcombiner-convergence.ll8 define i64 @foo(i128 %Params.coerce, i128 %SelLocs.coerce) {
10 %tmp = lshr i128 %Params.coerce, 61
13 %tmp1 = lshr i128 %SelLocs.coerce, 62
Darm64-abi_align.ll35 define i32 @f38(i32 %i, i64 %s1.coerce, i64 %s2.coerce) #0 {
40 %s1.sroa.0.0.extract.trunc = trunc i64 %s1.coerce to i32
41 %s1.sroa.1.4.extract.shift = lshr i64 %s1.coerce, 32
42 %s2.sroa.0.0.extract.trunc = trunc i64 %s2.coerce to i32
43 %s2.sroa.1.4.extract.shift = lshr i64 %s2.coerce, 32
69 i32 %i7, i32 %i8, i32 %i9, i64 %s1.coerce, i64 %s2.coerce) #0
88 define i32 @f39(i32 %i, i128 %s1.coerce, i128 %s2.coerce) #0 {
93 %s1.sroa.0.0.extract.trunc = trunc i128 %s1.coerce to i32
94 %s1.sroa.1.4.extract.shift = lshr i128 %s1.coerce, 32
95 %s2.sroa.0.0.extract.trunc = trunc i128 %s2.coerce to i32
[all …]
/external/llvm/test/Linker/
Dtype-unique-type-array-b.ll25 define void @_Z4topBP1B2SA(%class.B* %b, i32 %sa.coerce) #0 !dbg !15 {
30 %coerce.dive = getelementptr %struct.SA, %struct.SA* %sa, i32 0, i32 0
31 store i32 %sa.coerce, i32* %coerce.dive
39 %coerce.dive1 = getelementptr %struct.SA, %struct.SA* %agg.tmp, i32 0, i32 0, !dbg !28
40 %3 = load i32, i32* %coerce.dive1, !dbg !28
49 define linkonce_odr void @_ZN1B5testBE2SA(%class.B* %this, i32 %sa.coerce) #2 align 2 !dbg !20 {
53 %coerce.dive = getelementptr %struct.SA, %struct.SA* %sa, i32 0, i32 0
54 store i32 %sa.coerce, i32* %coerce.dive
Dtype-unique-type-array-a.ll46 define void @_Z4topAP1A2SA(%class.A* %a, i32 %sa.coerce) #0 !dbg !15 {
51 %coerce.dive = getelementptr %struct.SA, %struct.SA* %sa, i32 0, i32 0
52 store i32 %sa.coerce, i32* %coerce.dive
60 %coerce.dive1 = getelementptr %struct.SA, %struct.SA* %agg.tmp, i32 0, i32 0, !dbg !28
61 %3 = load i32, i32* %coerce.dive1, !dbg !28
70 define linkonce_odr void @_ZN1A5testAE2SA(%class.A* %this, i32 %a.coerce) #2 align 2 !dbg !20 {
74 %coerce.dive = getelementptr %struct.SA, %struct.SA* %a, i32 0, i32 0
75 store i32 %a.coerce, i32* %coerce.dive
/external/llvm/test/Transforms/LoopVectorize/X86/
Dpropagate-metadata.ll7 define void @no_propagate_range_metadata(i8* readonly %first.coerce, i8* readnone %last.coerce, i8*…
13 …%first.sroa.0.04 = phi i8* [ %incdec.ptr.i.i.i, %for.body ], [ %first.coerce, %for.body.preheader ]
18 %lnot.i = icmp eq i8* %incdec.ptr.i.i.i, %last.coerce
/external/llvm/test/DebugInfo/X86/
Dsroasplit-3.ll6 ; CHECK: call void @llvm.dbg.value(metadata float %s.coerce, i64 0, metadata ![[VAR:[0-9]+]], metad…
23 define float @foo(float %s.coerce) #0 !dbg !4 {
26 %coerce.dive = getelementptr %struct.S, %struct.S* %s, i32 0, i32 0
27 store float %s.coerce, float* %coerce.dive, align 1
/external/llvm/test/CodeGen/ARM/
Dssp-data-layout.ll153 …%coerce.dive = getelementptr %struct.struct_large_char, %struct.struct_large_char* %a, i32 0, i32 0
154 %3 = bitcast [8 x i8]* %coerce.dive to i64*
156 …%coerce.dive25 = getelementptr %struct.struct_small_char, %struct.struct_small_char* %b, i32 0, i3…
157 %5 = bitcast [2 x i8]* %coerce.dive25 to i16*
159 …%coerce.dive26 = getelementptr %struct.struct_small_nonchar, %struct.struct_small_nonchar* %d, i32…
160 %7 = bitcast [2 x i16]* %coerce.dive26 to i32*
298 …%coerce.dive = getelementptr %struct.struct_large_char, %struct.struct_large_char* %a, i32 0, i32 0
299 %3 = bitcast [8 x i8]* %coerce.dive to i64*
301 …%coerce.dive25 = getelementptr %struct.struct_small_char, %struct.struct_small_char* %b, i32 0, i3…
302 %5 = bitcast [2 x i8]* %coerce.dive25 to i16*
[all …]
Dfp16-args.ll7 define float @foo(float %a.coerce, float %b.coerce) {
9 %0 = bitcast float %a.coerce to i32
12 %2 = bitcast float %b.coerce to i32
Dfast-isel-update-valuemap-for-extract.ll16 define void @test([4 x i32] %xpic.coerce, %struct.node* %t) {
18 %tmp29 = extractvalue [4 x i32] %xpic.coerce, 0
22 call void @foo([4 x i32] %xpic.coerce, %struct.node* %tmp42)
/external/swiftshader/third_party/LLVM/test/Transforms/LoopUnswitch/
D2010-11-18-LCSSA.ll5 define void @func_67(i32 %p_68.coerce) nounwind {
14 %tobool.i = icmp eq i32 %p_68.coerce, 1
15 %xor4.i = xor i32 %p_68.coerce, 1
/external/llvm/test/Transforms/LoopUnswitch/
D2010-11-18-LCSSA.ll5 define void @func_67(i32 %p_68.coerce) nounwind {
14 %tobool.i = icmp eq i32 %p_68.coerce, 1
15 %xor4.i = xor i32 %p_68.coerce, 1
/external/llvm/test/CodeGen/X86/
D3dnow-intrinsics.ll3 define <8 x i8> @test_pavgusb(x86_mmx %a.coerce, x86_mmx %b.coerce) nounwind readnone {
6 %0 = bitcast x86_mmx %a.coerce to <8 x i8>
7 %1 = bitcast x86_mmx %b.coerce to <8 x i8>
206 define <2 x float> @test_pi2fd(x86_mmx %a.coerce) nounwind readnone {
209 %0 = bitcast x86_mmx %a.coerce to <2 x i32>
218 define <4 x i16> @test_pmulhrw(x86_mmx %a.coerce, x86_mmx %b.coerce) nounwind readnone {
221 %0 = bitcast x86_mmx %a.coerce to <4 x i16>
222 %1 = bitcast x86_mmx %b.coerce to <4 x i16>
267 define <2 x float> @test_pi2fw(x86_mmx %a.coerce) nounwind readnone {
270 %0 = bitcast x86_mmx %a.coerce to <2 x i32>
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
D3dnow-intrinsics.ll3 define <8 x i8> @test_pavgusb(x86_mmx %a.coerce, x86_mmx %b.coerce) nounwind readnone {
6 %0 = bitcast x86_mmx %a.coerce to <8 x i8>
7 %1 = bitcast x86_mmx %b.coerce to <8 x i8>
206 define <2 x float> @test_pi2fd(x86_mmx %a.coerce) nounwind readnone {
209 %0 = bitcast x86_mmx %a.coerce to <2 x i32>
218 define <4 x i16> @test_pmulhrw(x86_mmx %a.coerce, x86_mmx %b.coerce) nounwind readnone {
221 %0 = bitcast x86_mmx %a.coerce to <4 x i16>
222 %1 = bitcast x86_mmx %b.coerce to <4 x i16>
267 define <2 x float> @test_pi2fw(x86_mmx %a.coerce) nounwind readnone {
270 %0 = bitcast x86_mmx %a.coerce to <2 x i32>

1234