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/external/mesa3d/src/mesa/drivers/dri/i965/
Dgen7_wm_state.c41 const struct brw_wm_prog_data *prog_data = in upload_wm_state() local
42 brw_wm_prog_data(brw->wm.base.prog_data); in upload_wm_state()
43 bool writes_depth = prog_data->computed_depth_mode != BRW_PSCDEPTH_OFF; in upload_wm_state()
62 if (prog_data->uses_src_depth) in upload_wm_state()
65 if (prog_data->uses_src_w) in upload_wm_state()
68 dw1 |= prog_data->computed_depth_mode << GEN7_WM_COMPUTED_DEPTH_MODE_SHIFT; in upload_wm_state()
69 dw1 |= prog_data->barycentric_interp_modes << in upload_wm_state()
75 if (prog_data->uses_kill || in upload_wm_state()
78 prog_data->uses_omask) { in upload_wm_state()
84 prog_data->has_side_effects || dw1 & GEN7_WM_KILL_ENABLE) { in upload_wm_state()
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Dgen8_ps_state.c33 const struct brw_wm_prog_data *prog_data) in gen8_upload_ps_extra() argument
39 dw1 |= prog_data->computed_depth_mode << GEN8_PSX_COMPUTED_DEPTH_MODE_SHIFT; in gen8_upload_ps_extra()
41 if (prog_data->uses_kill) in gen8_upload_ps_extra()
44 if (prog_data->num_varying_inputs != 0) in gen8_upload_ps_extra()
47 if (prog_data->uses_src_depth) in gen8_upload_ps_extra()
50 if (prog_data->uses_src_w) in gen8_upload_ps_extra()
53 if (prog_data->persample_dispatch) in gen8_upload_ps_extra()
57 if (prog_data->uses_sample_mask) { in gen8_upload_ps_extra()
59 if (prog_data->post_depth_coverage) in gen8_upload_ps_extra()
61 else if (prog_data->inner_coverage && ctx->IntelConservativeRasterization) in gen8_upload_ps_extra()
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Dgen6_wm_state.c47 const struct brw_stage_prog_data *prog_data = brw->wm.base.prog_data; in gen6_upload_wm_push_constants() local
51 gen6_upload_push_constants(brw, &fp->program, prog_data, in gen6_upload_wm_push_constants()
74 const struct brw_wm_prog_data *prog_data, in gen6_upload_wm_state() argument
91 if (prog_data->base.nr_params == 0) { in gen6_upload_wm_state()
124 if (prog_data->base.use_alt_mode) in gen6_upload_wm_state()
130 dw2 |= ((prog_data->base.binding_table.size_bytes / 4) << in gen6_upload_wm_state()
135 if (prog_data->dispatch_8) in gen6_upload_wm_state()
138 if (prog_data->dispatch_16) in gen6_upload_wm_state()
141 dw4 |= prog_data->base.dispatch_grf_start_reg << in gen6_upload_wm_state()
143 dw4 |= prog_data->dispatch_grf_start_reg_2 << in gen6_upload_wm_state()
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Dbrw_interpolation_map.c40 gen4_frag_prog_set_interp_modes(struct brw_wm_prog_data *prog_data, in gen4_frag_prog_set_interp_modes() argument
47 if (slot != -1 && prog_data->interp_mode[slot] == INTERP_MODE_NONE) { in gen4_frag_prog_set_interp_modes()
48 prog_data->interp_mode[slot] = interp; in gen4_frag_prog_set_interp_modes()
50 if (prog_data->interp_mode[slot] == INTERP_MODE_FLAT) { in gen4_frag_prog_set_interp_modes()
51 prog_data->contains_flat_varying = true; in gen4_frag_prog_set_interp_modes()
52 } else if (prog_data->interp_mode[slot] == INTERP_MODE_NOPERSPECTIVE) { in gen4_frag_prog_set_interp_modes()
53 prog_data->contains_noperspective_varying = true; in gen4_frag_prog_set_interp_modes()
62 struct brw_wm_prog_data *prog_data, in brw_setup_vue_interpolation() argument
66 memset(prog_data->interp_mode, 0, sizeof(prog_data->interp_mode)); in brw_setup_vue_interpolation()
76 prog_data->interp_mode[pos_slot] = INTERP_MODE_NOPERSPECTIVE; in brw_setup_vue_interpolation()
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Dbrw_cs.c40 struct brw_cs_prog_data *prog_data) in assign_cs_binding_table_offsets() argument
45 prog_data->binding_table.work_groups_start = next_binding_table_offset; in assign_cs_binding_table_offsets()
48 brw_assign_common_binding_table_offsets(devinfo, prog, &prog_data->base, in assign_cs_binding_table_offsets()
62 struct brw_cs_prog_data prog_data; in brw_codegen_cs_prog() local
66 memset(&prog_data, 0, sizeof(prog_data)); in brw_codegen_cs_prog()
78 prog_data.base.total_shared = cp->program.info.cs.shared_size; in brw_codegen_cs_prog()
81 assign_cs_binding_table_offsets(devinfo, &cp->program, &prog_data); in brw_codegen_cs_prog()
90 prog_data.thread_local_id_index = param_count++; in brw_codegen_cs_prog()
94 prog_data.base.param = in brw_codegen_cs_prog()
96 prog_data.base.pull_param = in brw_codegen_cs_prog()
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Dbrw_gs.c66 struct brw_gs_prog_data *prog_data) in assign_gs_binding_table_offsets() argument
74 &prog_data->base.base, reserved); in assign_gs_binding_table_offsets()
85 struct brw_gs_prog_data prog_data; in brw_codegen_gs_prog() local
89 memset(&prog_data, 0, sizeof(prog_data)); in brw_codegen_gs_prog()
91 assign_gs_binding_table_offsets(devinfo, &gp->program, &prog_data); in brw_codegen_gs_prog()
103 prog_data.base.base.param = in brw_codegen_gs_prog()
105 prog_data.base.base.pull_param = in brw_codegen_gs_prog()
107 prog_data.base.base.image_param = in brw_codegen_gs_prog()
110 prog_data.base.base.nr_params = param_count; in brw_codegen_gs_prog()
111 prog_data.base.base.nr_image_params = gp->program.info.num_images; in brw_codegen_gs_prog()
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Dbrw_wm_state.c84 const struct brw_wm_prog_data *prog_data = in brw_upload_wm_unit() local
85 brw_wm_prog_data(brw->wm.base.prog_data); in brw_upload_wm_unit()
92 if (prog_data->dispatch_8 && prog_data->dispatch_16) { in brw_upload_wm_unit()
97 assert(prog_data->base.dispatch_grf_start_reg == in brw_upload_wm_unit()
98 prog_data->dispatch_grf_start_reg_2); in brw_upload_wm_unit()
102 wm->wm5.enable_8_pix = prog_data->dispatch_8; in brw_upload_wm_unit()
103 wm->wm5.enable_16_pix = prog_data->dispatch_16; in brw_upload_wm_unit()
105 if (prog_data->dispatch_8 || prog_data->dispatch_16) { in brw_upload_wm_unit()
106 wm->thread0.grf_reg_count = prog_data->reg_blocks_0; in brw_upload_wm_unit()
115 if (prog_data->prog_offset_2) { in brw_upload_wm_unit()
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Dbrw_vec4_gs_visitor.cpp40 struct brw_gs_prog_data *prog_data, in vec4_gs_visitor() argument
46 &prog_data->base, shader, mem_ctx, in vec4_gs_visitor()
49 gs_prog_data(prog_data) in vec4_gs_visitor()
89 unsigned input_array_stride = prog_data->urb_read_length * 2; in setup_varying_inputs()
115 prog_data->dispatch_mode == DISPATCH_MODE_4X2_DUAL_OBJECT ? 1 : 2; in setup_payload()
591 struct brw_gs_prog_data *prog_data, in brw_compile_gs() argument
623 prog_data->base.clip_distance_mask = in brw_compile_gs()
625 prog_data->base.cull_distance_mask = in brw_compile_gs()
629 prog_data->include_primitive_id = in brw_compile_gs()
632 prog_data->invocations = shader->info->gs.invocations; in brw_compile_gs()
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Dbrw_binding_tables.c91 const struct brw_stage_prog_data *prog_data, in brw_upload_binding_table() argument
94 if (prog_data->binding_table.size_bytes == 0) { in brw_upload_binding_table()
105 prog_data->binding_table.shader_time_start], in brw_upload_binding_table()
115 prog_data->binding_table in brw_upload_binding_table()
119 prog_data->binding_table.size_bytes, in brw_upload_binding_table()
125 prog_data->binding_table.size_bytes); in brw_upload_binding_table()
134 reserve_hw_bt_space(brw, prog_data->binding_table.size_bytes); in brw_upload_binding_table()
158 const struct brw_stage_prog_data *prog_data = brw->vs.base.prog_data; in brw_vs_upload_binding_table() local
161 prog_data, in brw_vs_upload_binding_table()
183 const struct brw_stage_prog_data *prog_data = brw->wm.base.prog_data; in brw_upload_wm_binding_table() local
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Dbrw_vs_surface_state.c57 const struct brw_stage_prog_data *prog_data) in brw_upload_pull_constants() argument
60 uint32_t surf_index = prog_data->binding_table.pull_constants_start; in brw_upload_pull_constants()
62 if (!prog_data->nr_pull_params) { in brw_upload_pull_constants()
76 uint32_t size = prog_data->nr_pull_params * 4; in brw_upload_pull_constants()
84 for (i = 0; i < prog_data->nr_pull_params; i++) { in brw_upload_pull_constants()
85 constants[i] = *prog_data->pull_param[i]; in brw_upload_pull_constants()
89 for (i = 0; i < ALIGN(prog_data->nr_pull_params, 4) / 4; i++) { in brw_upload_pull_constants()
119 const struct brw_stage_prog_data *prog_data = brw->vs.base.prog_data; in brw_upload_vs_pull_constants() local
124 stage_state, prog_data); in brw_upload_vs_pull_constants()
151 &brw->vs.base, brw->vs.base.prog_data); in brw_upload_vs_ubo_surfaces()
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Dbrw_tes.c75 struct brw_tes_prog_data prog_data; in brw_codegen_tes_prog() local
79 memset(&prog_data, 0, sizeof(prog_data)); in brw_codegen_tes_prog()
82 &prog_data.base.base, 0); in brw_codegen_tes_prog()
94 prog_data.base.base.param = in brw_codegen_tes_prog()
96 prog_data.base.base.pull_param = in brw_codegen_tes_prog()
98 prog_data.base.base.image_param = in brw_codegen_tes_prog()
101 prog_data.base.base.nr_params = param_count; in brw_codegen_tes_prog()
102 prog_data.base.base.nr_image_params = tep->program.info.num_images; in brw_codegen_tes_prog()
104 brw_nir_setup_glsl_uniforms(nir, &tep->program, &prog_data.base.base, in brw_codegen_tes_prog()
124 brw_compile_tes(compiler, brw, mem_ctx, key, &input_vue_map, &prog_data, in brw_codegen_tes_prog()
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Dgen7_ds_state.c39 const struct brw_stage_prog_data *prog_data = brw->tes.base.prog_data; in gen7_upload_tes_push_constants() local
41 gen6_upload_push_constants(brw, &tep->program, prog_data, stage_state, in gen7_upload_tes_push_constants()
69 const struct brw_stage_prog_data *prog_data = stage_state->prog_data; in gen7_upload_ds_state() local
71 brw_vue_prog_data(stage_state->prog_data); in gen7_upload_ds_state()
73 brw_tes_prog_data(stage_state->prog_data); in gen7_upload_ds_state()
84 SET_FIELD(prog_data->binding_table.size_bytes / 4, in gen7_upload_ds_state()
86 if (prog_data->total_scratch) { in gen7_upload_ds_state()
93 OUT_BATCH(SET_FIELD(prog_data->dispatch_grf_start_reg, in gen7_upload_ds_state()
Dgen6_vs_state.c45 const struct brw_stage_prog_data *prog_data = brw->vs.base.prog_data; in gen6_upload_vs_push_constants() local
48 gen6_upload_push_constants(brw, &vp->program, prog_data, stage_state, in gen6_upload_vs_push_constants()
78 const struct brw_stage_prog_data *prog_data = stage_state->prog_data; in upload_vs_state() local
80 brw_vue_prog_data(stage_state->prog_data); in upload_vs_state()
120 if (prog_data->use_alt_mode) in upload_vs_state()
128 ((prog_data->binding_table.size_bytes / 4) << in upload_vs_state()
131 if (prog_data->total_scratch) { in upload_vs_state()
139 OUT_BATCH((prog_data->dispatch_grf_start_reg << in upload_vs_state()
Dgen7_cs_state.c40 if (!brw->cs.base.prog_data) in brw_upload_cs_state()
47 struct brw_stage_prog_data *prog_data = stage_state->prog_data; in brw_upload_cs_state() local
48 struct brw_cs_prog_data *cs_prog_data = brw_cs_prog_data(prog_data); in brw_upload_cs_state()
54 prog_data->binding_table.shader_time_start], in brw_upload_cs_state()
60 prog_data->binding_table.size_bytes, in brw_upload_cs_state()
67 if (prog_data->total_scratch) { in brw_upload_cs_state()
148 prog_data->binding_table.size_bytes); in brw_upload_cs_state()
169 encode_slm_size(devinfo->gen, prog_data->total_shared); in brw_upload_cs_state()
219 const struct brw_stage_prog_data *prog_data = in brw_upload_cs_push_constants() local
249 param_copy[i] = *prog_data->param[i]; in brw_upload_cs_push_constants()
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Dbrw_vs.c137 struct brw_vs_prog_data prog_data; in brw_codegen_vs_prog() local
138 struct brw_stage_prog_data *stage_prog_data = &prog_data.base.base; in brw_codegen_vs_prog()
143 memset(&prog_data, 0, sizeof(prog_data)); in brw_codegen_vs_prog()
152 &prog_data.base.base, 0); in brw_codegen_vs_prog()
160 prog_data.base.base.nr_image_params = vp->program.info.num_images; in brw_codegen_vs_prog()
178 &prog_data.base.base, in brw_codegen_vs_prog()
182 &prog_data.base.base); in brw_codegen_vs_prog()
187 prog_data.inputs_read = vp->program.info.inputs_read; in brw_codegen_vs_prog()
188 prog_data.double_inputs_read = vp->program.info.double_inputs_read; in brw_codegen_vs_prog()
191 prog_data.inputs_read |= VERT_BIT_EDGEFLAG; in brw_codegen_vs_prog()
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Dgen7_hs_state.c40 const struct brw_stage_prog_data *prog_data = brw->tcs.base.prog_data; in gen7_upload_tcs_push_constants() local
43 gen6_upload_push_constants(brw, &tcp->program, prog_data, stage_state, in gen7_upload_tcs_push_constants()
71 const struct brw_stage_prog_data *prog_data = stage_state->prog_data; in gen7_upload_hs_state() local
73 brw_tcs_prog_data(stage_state->prog_data); in gen7_upload_hs_state()
80 SET_FIELD(prog_data->binding_table.size_bytes / 4, in gen7_upload_hs_state()
88 if (prog_data->total_scratch) { in gen7_upload_hs_state()
96 SET_FIELD(prog_data->dispatch_grf_start_reg, in gen7_upload_hs_state()
Dgen6_gs_state.c44 struct brw_stage_prog_data *prog_data = brw->gs.base.prog_data; in gen6_upload_gs_push_constants() local
47 gen6_upload_push_constants(brw, &gp->program, prog_data, stage_state, in gen6_upload_gs_push_constants()
79 (brw->ff_gs.prog_data->urb_read_length << GEN6_GS_URB_READ_LENGTH_SHIFT)); in upload_gs_state_for_tf()
86 (brw->ff_gs.prog_data->svbi_postincrement_value << in upload_gs_state_for_tf()
100 const struct brw_stage_prog_data *prog_data = stage_state->prog_data; in upload_gs_state() local
102 brw_vue_prog_data(stage_state->prog_data); in upload_gs_state()
143 ((prog_data->binding_table.size_bytes / 4) << in upload_gs_state()
146 if (prog_data->total_scratch) { in upload_gs_state()
157 (prog_data->dispatch_grf_start_reg << in upload_gs_state()
Dgen7_vs_state.c37 const struct brw_stage_prog_data *prog_data = stage_state->prog_data; in upload_vs_state() local
39 brw_vue_prog_data(stage_state->prog_data); in upload_vs_state()
47 if (prog_data->use_alt_mode) in upload_vs_state()
56 ((prog_data->binding_table.size_bytes / 4) << in upload_vs_state()
59 if (prog_data->total_scratch) { in upload_vs_state()
67 OUT_BATCH((prog_data->dispatch_grf_start_reg << in upload_vs_state()
Dgen6_clip_state.c46 if (brw->gs.base.prog_data) { in brw_is_drawing_points()
48 return brw_gs_prog_data(brw->gs.base.prog_data)->output_topology == in brw_is_drawing_points()
50 } else if (brw->tes.base.prog_data) { in brw_is_drawing_points()
52 return brw_tes_prog_data(brw->tes.base.prog_data)->output_topology == in brw_is_drawing_points()
70 if (brw->gs.base.prog_data) { in brw_is_drawing_lines()
72 return brw_gs_prog_data(brw->gs.base.prog_data)->output_topology == in brw_is_drawing_lines()
74 } else if (brw->tes.base.prog_data) { in brw_is_drawing_lines()
76 return brw_tes_prog_data(brw->tes.base.prog_data)->output_topology == in brw_is_drawing_lines()
102 if (brw_wm_prog_data(brw->wm.base.prog_data)->barycentric_interp_modes & in upload_clip_state()
108 dw1 |= brw_vue_prog_data(brw->vs.base.prog_data)->cull_distance_mask; in upload_clip_state()
Dgen8_vs_state.c40 const struct brw_stage_prog_data *prog_data = stage_state->prog_data; in upload_vs_state() local
42 brw_vue_prog_data(stage_state->prog_data); in upload_vs_state()
47 if (prog_data->use_alt_mode) in upload_vs_state()
57 ((prog_data->binding_table.size_bytes / 4) << in upload_vs_state()
60 if (prog_data->total_scratch) { in upload_vs_state()
69 OUT_BATCH((prog_data->dispatch_grf_start_reg << in upload_vs_state()
Dbrw_gs_surface_state.c50 const struct brw_stage_prog_data *prog_data = brw->gs.base.prog_data; in brw_upload_gs_pull_constants() local
55 stage_state, prog_data); in brw_upload_gs_pull_constants()
82 struct brw_stage_prog_data *prog_data = brw->gs.base.prog_data; in brw_upload_gs_ubo_surfaces() local
85 &brw->gs.base, prog_data); in brw_upload_gs_ubo_surfaces()
107 brw_upload_abo_surfaces(brw, gp, &brw->gs.base, brw->gs.base.prog_data); in brw_upload_gs_abo_surfaces()
131 brw->gs.base.prog_data); in brw_upload_gs_image_surfaces()
Dbrw_tes_surface_state.c50 const struct brw_stage_prog_data *prog_data = brw->tes.base.prog_data; in brw_upload_tes_pull_constants() local
55 stage_state, prog_data); in brw_upload_tes_pull_constants()
82 struct brw_stage_prog_data *prog_data = brw->tes.base.prog_data; in brw_upload_tes_ubo_surfaces() local
85 &brw->tes.base, prog_data); in brw_upload_tes_ubo_surfaces()
108 brw->tes.base.prog_data); in brw_upload_tes_abo_surfaces()
132 brw->tes.base.prog_data); in brw_upload_tes_image_surfaces()
Dbrw_tcs_surface_state.c50 const struct brw_stage_prog_data *prog_data = brw->tcs.base.prog_data; in brw_upload_tcs_pull_constants() local
55 stage_state, prog_data); in brw_upload_tcs_pull_constants()
82 struct brw_stage_prog_data *prog_data = brw->tcs.base.prog_data; in brw_upload_tcs_ubo_surfaces() local
85 &brw->tcs.base, prog_data); in brw_upload_tcs_ubo_surfaces()
108 brw->tcs.base.prog_data); in brw_upload_tcs_abo_surfaces()
132 brw->tcs.base.prog_data); in brw_upload_tcs_image_surfaces()
Dgen6_constant_state.c121 const struct brw_stage_prog_data *prog_data, in gen6_upload_push_constants() argument
127 if (prog_data->nr_params == 0) { in gen6_upload_push_constants()
141 prog_data->nr_params * sizeof(gl_constant_value), in gen6_upload_push_constants()
152 for (i = 0; i < prog_data->nr_params; i++) { in gen6_upload_push_constants()
153 param[i] = *prog_data->param[i]; in gen6_upload_push_constants()
159 for (i = 0; i < prog_data->nr_params; i++) { in gen6_upload_push_constants()
162 prog_data->dispatch_grf_start_reg + i / 8); in gen6_upload_push_constants()
172 stage_state->push_const_size = ALIGN(prog_data->nr_params, 8) / 8; in gen6_upload_push_constants()
/external/mesa3d/src/intel/vulkan/
Danv_pipeline.c315 struct brw_stage_prog_data *prog_data, in anv_pipeline_compile() argument
327 prog_data->nr_params = 0; in anv_pipeline_compile()
334 prog_data->nr_params += MAX_PUSH_CONSTANTS_SIZE / sizeof(float); in anv_pipeline_compile()
338 prog_data->nr_params += MAX_DYNAMIC_BUFFERS * 2; in anv_pipeline_compile()
341 prog_data->nr_params += nir->info->num_images * BRW_IMAGE_PARAM_SIZE; in anv_pipeline_compile()
346 ((struct brw_cs_prog_data *)prog_data)->thread_local_id_index = in anv_pipeline_compile()
347 prog_data->nr_params++; /* The CS Thread ID uniform */ in anv_pipeline_compile()
352 if (prog_data->nr_params > 0) { in anv_pipeline_compile()
354 prog_data->param = (const union gl_constant_value **) in anv_pipeline_compile()
355 malloc(prog_data->nr_params * sizeof(union gl_constant_value *)); in anv_pipeline_compile()
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