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Searched refs:setMemRefs (Results 1 – 25 of 63) sorted by relevance

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/external/llvm/include/llvm/CodeGen/
DMachineInstrBuilder.h163 const MachineInstrBuilder &setMemRefs(MachineInstr::mmo_iterator b, in setMemRefs() function
165 MI->setMemRefs(b, e); in setMemRefs()
169 const MachineInstrBuilder &setMemRefs(std::pair<MachineInstr::mmo_iterator, in setMemRefs() function
171 MI->setMemRefs(MemOperandsRef); in setMemRefs()
DMachineInstr.h1209 void setMemRefs(mmo_iterator NewMemRefs, mmo_iterator NewMemRefsEnd) {
1210 setMemRefs(std::make_pair(NewMemRefs, NewMemRefsEnd-NewMemRefs));
1217 void setMemRefs(std::pair<mmo_iterator, unsigned> NewMemRefs) {
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DMachineInstrBuilder.h132 const MachineInstrBuilder &setMemRefs(MachineInstr::mmo_iterator b, in setMemRefs() function
134 MI->setMemRefs(b, e); in setMemRefs()
DMachineInstr.h551 void setMemRefs(mmo_iterator NewMemRefs, mmo_iterator NewMemRefsEnd) {
/external/llvm/lib/Target/ARM/
DARMExpandPseudoInsts.cpp450 MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandVLD()
503 MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandVST()
593 MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandLaneOp()
694 LO16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMOV32BitImm()
695 HI16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMOV32BitImm()
743 LO16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMOV32BitImm()
744 HI16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMOV32BitImm()
1239 MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMI()
1254 MIB1->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMI()
1353 MIB3->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMI()
[all …]
DARMInstrInfo.cpp132 MIB.setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); in expandLoadStackGuard()
DThumb2SizeReduction.cpp458 MIB->setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); in ReduceLoadStore()
579 MIB->setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); in ReduceLoadStore()
DARMISelDAGToDAG.cpp1922 cast<MachineSDNode>(VLd)->setMemRefs(MemOp, MemOp + 1); in SelectVLD()
2045 cast<MachineSDNode>(VSt)->setMemRefs(MemOp, MemOp + 1); in SelectVST()
2069 cast<MachineSDNode>(VStA)->setMemRefs(MemOp, MemOp + 1); in SelectVST()
2088 cast<MachineSDNode>(VStB)->setMemRefs(MemOp, MemOp + 1); in SelectVST()
2193 cast<MachineSDNode>(VLdLn)->setMemRefs(MemOp, MemOp + 1); in SelectVLDSTLane()
2281 cast<MachineSDNode>(VLdDup)->setMemRefs(MemOp, MemOp + 1); in SelectVLDDup()
2648 cast<MachineSDNode>(CmpSwap)->setMemRefs(MemOp, MemOp + 1); in SelectCMP_SWAP()
3431 cast<MachineSDNode>(Ld)->setMemRefs(MemOp, MemOp + 1); in Select()
3499 cast<MachineSDNode>(St)->setMemRefs(MemOp, MemOp + 1); in Select()
DARMLoadStoreOptimizer.cpp1272 MIB->setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); in MergeBaseUpdateLSMultiple()
1488 MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in MergeBaseUpdateLSDouble()
2247 MIB.setMemRefs(Op0->mergeMemRefsWith(*Op1)); in RescheduleOps()
2261 MIB.setMemRefs(Op0->mergeMemRefsWith(*Op1)); in RescheduleOps()
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMExpandPseudoInsts.cpp465 MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandVLD()
513 MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandVST()
669 LO16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMOV32BitImm()
670 HI16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMOV32BitImm()
706 LO16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMOV32BitImm()
707 HI16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMOV32BitImm()
888 MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMI()
903 MIB1->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMI()
959 MIB2->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMI()
DARMISelDAGToDAG.cpp1657 cast<MachineSDNode>(VLd)->setMemRefs(MemOp, MemOp + 1); in SelectVLD()
1767 cast<MachineSDNode>(VSt)->setMemRefs(MemOp, MemOp + 1); in SelectVST()
1790 cast<MachineSDNode>(VStA)->setMemRefs(MemOp, MemOp + 1); in SelectVST()
1809 cast<MachineSDNode>(VStB)->setMemRefs(MemOp, MemOp + 1); in SelectVST()
1915 cast<MachineSDNode>(VLdLn)->setMemRefs(MemOp, MemOp + 1); in SelectVLDSTLane()
1995 cast<MachineSDNode>(VLdDup)->setMemRefs(MemOp, MemOp + 1); in SelectVLDDup()
2380 cast<MachineSDNode>(ResNode)->setMemRefs(MemOp, MemOp + 1); in SelectAtomic64()
2914 cast<MachineSDNode>(Ld)->setMemRefs(MemOp, MemOp + 1); in Select()
2988 cast<MachineSDNode>(St)->setMemRefs(MemOp, MemOp + 1); in Select()
/external/llvm/lib/Target/Hexagon/
DHexagonFrameLowering.cpp1422 .setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); in expandStoreInt()
1445 .setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); in expandLoadInt()
1575 .setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); in expandStoreVec2()
1587 .setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); in expandStoreVec2()
1627 .setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); in expandLoadVec2()
1638 .setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); in expandLoadVec2()
1676 .setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); in expandStoreVec()
1712 .setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); in expandLoadVec()
DHexagonISelDAGToDAG.cpp333 L->setMemRefs(MemOp, MemOp+1); in SelectIndexedLoad()
344 L->setMemRefs(MemOp, MemOp+1); in SelectIndexedLoad()
607 S->setMemRefs(MemOp, MemOp + 1); in SelectIndexedStore()
614 S->setMemRefs(MemOp, MemOp + 1); in SelectIndexedStore()
/external/llvm/lib/Target/X86/
DX86FixupBWInsts.cpp235 MIB->setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); in tryReplaceLoad()
/external/llvm/lib/Target/AArch64/
DAArch64LoadStoreOptimizer.cpp689 .setMemRefs(I->mergeMemRefsWith(*MergeMI)); in mergeNarrowInsns()
778 .setMemRefs(I->mergeMemRefsWith(*MergeMI)); in mergeNarrowInsns()
873 .setMemRefs(I->mergeMemRefsWith(*Paired)); in mergePairedInsns()
1387 .setMemRefs(I->memoperands_begin(), I->memoperands_end()); in mergeUpdateInsn()
1397 .setMemRefs(I->memoperands_begin(), I->memoperands_end()); in mergeUpdateInsn()
/external/llvm/lib/CodeGen/
DTargetInstrInfo.cpp525 NewMI->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in foldMemoryOperand()
810 NewMI->setMemRefs(LoadMI.memoperands_begin(), LoadMI.memoperands_end()); in foldMemoryOperand()
814 NewMI->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in foldMemoryOperand()
DImplicitNullChecks.cpp509 MIB.setMemRefs(LoadMI->memoperands_begin(), LoadMI->memoperands_end()); in insertFaultingLoad()
/external/llvm/lib/Target/XCore/
DXCoreISelDAGToDAG.cpp157 cast<MachineSDNode>(node)->setMemRefs(MemOp, MemOp + 1); in Select()
/external/llvm/lib/Target/Lanai/
DLanaiMemAluCombiner.cpp280 InstrBuilder->setMemRefs(MemInstr->memoperands_begin(), in insertMergedInstruction()
/external/swiftshader/third_party/LLVM/lib/Target/XCore/
DXCoreISelDAGToDAG.cpp178 cast<MachineSDNode>(node)->setMemRefs(MemOp, MemOp + 1); in Select()
/external/llvm/lib/Target/Mips/
DMipsInstrInfo.cpp465 MIB.setMemRefs(I->memoperands_begin(), I->memoperands_end()); in genInstrWithNewOpc()
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DTargetInstrInfoImpl.cpp350 NewMI->setMemRefs(LoadMI->memoperands_begin(), in foldMemoryOperand()
/external/llvm/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp367 cast<MachineSDNode>(ResNode)->setMemRefs(MemRefs0, MemRefs0 + 1); in tryIndexedBinOp()
/external/swiftshader/third_party/LLVM/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp372 cast<MachineSDNode>(ResNode)->setMemRefs(MemRefs0, MemRefs0 + 1); in SelectIndexedBinOp()
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86ISelDAGToDAG.cpp1340 cast<MachineSDNode>(ResNode)->setMemRefs(MemOp, MemOp + 1); in SelectAtomic64()
1484 cast<MachineSDNode>(Ret)->setMemRefs(MemOp, MemOp + 1); in SelectAtomicLoadAdd()
1490 cast<MachineSDNode>(Ret)->setMemRefs(MemOp, MemOp + 1); in SelectAtomicLoadAdd()
1645 cast<MachineSDNode>(Ret)->setMemRefs(MemOp, MemOp + 1); in SelectAtomicLoadArith()

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