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Searched refs:smul (Results 1 – 25 of 39) sorted by relevance

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/external/speex/libspeex/
D_kiss_fft_guts.h62 # define smul(a,b) ( (SAMPPROD)(a)*(b) ) macro
65 # define S_MUL(a,b) sround( smul(a,b) )
68 do{ (m).r = sround( smul((a).r,(b).r) - smul((a).i,(b).i) ); \
69 (m).i = sround( smul((a).r,(b).i) + smul((a).i,(b).r) ); }while(0)
72 do{ (m).r = PSHR32( smul((a).r,(b).r) - smul((a).i,(b).i),17 ); \
73 (m).i = PSHR32( smul((a).r,(b).i) + smul((a).i,(b).r),17 ); }while(0)
76 (x) = sround( smul( x, SAMP_MAX/k ) )
83 do{ (c).r = sround( smul( (c).r , s ) ) ;\
84 (c).i = sround( smul( (c).i , s ) ) ; }while(0)
/external/swiftshader/third_party/LLVM/test/CodeGen/Generic/
Doverflow.ll150 ;; smul
154 %smul = tail call { i8, i1 } @llvm.smul.with.overflow.i8(i8 %a, i8 %b)
155 %cmp = extractvalue { i8, i1 } %smul, 1
156 %smul.result = extractvalue { i8, i1 } %smul, 0
157 %X = select i1 %cmp, i8 %smul.result, i8 42
161 declare { i8, i1 } @llvm.smul.with.overflow.i8(i8, i8) nounwind readnone
165 %smul = tail call { i16, i1 } @llvm.smul.with.overflow.i16(i16 %a, i16 %b)
166 %cmp = extractvalue { i16, i1 } %smul, 1
167 %smul.result = extractvalue { i16, i1 } %smul, 0
168 %X = select i1 %cmp, i16 %smul.result, i16 42
[all …]
/external/llvm/test/CodeGen/Generic/
Doverflow.ll150 ;; smul
154 %smul = tail call { i8, i1 } @llvm.smul.with.overflow.i8(i8 %a, i8 %b)
155 %cmp = extractvalue { i8, i1 } %smul, 1
156 %smul.result = extractvalue { i8, i1 } %smul, 0
157 %X = select i1 %cmp, i8 %smul.result, i8 42
161 declare { i8, i1 } @llvm.smul.with.overflow.i8(i8, i8) nounwind readnone
165 %smul = tail call { i16, i1 } @llvm.smul.with.overflow.i16(i16 %a, i16 %b)
166 %cmp = extractvalue { i16, i1 } %smul, 1
167 %smul.result = extractvalue { i16, i1 } %smul, 0
168 %X = select i1 %cmp, i16 %smul.result, i16 42
[all …]
/external/llvm/test/CodeGen/X86/
Dsmul-with-overflow.ll8 %t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %v1, i32 %v2)
27 %t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %v1, i32 %v2)
45 declare {i32, i1} @llvm.smul.with.overflow.i32(i32, i32)
50 %tmp1 = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %tmp0, i32 2)
62 %tmp1 = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %tmp0, i32 4)
71 declare { i63, i1 } @llvm.smul.with.overflow.i63(i63, i63) nounwind readnone
75 %res = call { i63, i1 } @llvm.smul.with.overflow.i63(i63 4, i63 4611686018427387903)
Dmuloti.ll16 %0 = tail call %1 @llvm.smul.with.overflow.i128(i128 %ins14, i128 %ins)
79 declare %1 @llvm.smul.with.overflow.i128(i128, i128) nounwind readnone
Dxaluo.ll301 %t = call {i8, i1} @llvm.smul.with.overflow.i8(i8 %v1, i8 %v2)
313 %t = call {i16, i1} @llvm.smul.with.overflow.i16(i16 %v1, i16 %v2)
325 %t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %v1, i32 %v2)
337 %t = call {i64, i1} @llvm.smul.with.overflow.i64(i64 %v1, i64 %v2)
490 %t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %v1, i32 %v2)
501 %t = call {i64, i1} @llvm.smul.with.overflow.i64(i64 %v1, i64 %v2)
674 %t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %v1, i32 %v2)
691 %t = call {i64, i1} @llvm.smul.with.overflow.i64(i64 %v1, i64 %v2)
769 declare {i8, i1} @llvm.smul.with.overflow.i8 (i8, i8 ) nounwind readnone
770 declare {i16, i1} @llvm.smul.with.overflow.i16(i16, i16) nounwind readnone
[all …]
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dsmul-with-overflow.ll8 %t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %v1, i32 %v2)
27 %t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %v1, i32 %v2)
45 declare {i32, i1} @llvm.smul.with.overflow.i32(i32, i32)
50 %tmp1 = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %tmp0, i32 2)
62 %tmp1 = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %tmp0, i32 4)
Dmuloti.ll16 %0 = tail call %1 @llvm.smul.with.overflow.i128(i128 %ins14, i128 %ins)
79 declare %1 @llvm.smul.with.overflow.i128(i128, i128) nounwind readnone
/external/llvm/test/Analysis/ValueTracking/
Dpr23011.ll3 declare { i8, i1 } @llvm.smul.with.overflow.i8(i8, i8) nounwind readnone
9 %t = call { i8, i1 } @llvm.smul.with.overflow.i8(i8 %rem, i8 %rem)
10 ; CHECK: %t = call { i8, i1 } @llvm.smul.with.overflow.i8(i8 %rem, i8 %rem)
/external/swiftshader/third_party/LLVM/test/Transforms/GVN/
D2011-07-07-MatchIntrinsicExtract.ll68 %smul = tail call %0 @llvm.smul.with.overflow.i64(i64 %a, i64 %b)
69 %smul.0 = extractvalue %0 %smul, 0
84 declare %0 @llvm.smul.with.overflow.i64(i64, i64) nounwind readnone
/external/llvm/test/Transforms/GVN/
D2011-07-07-MatchIntrinsicExtract.ll68 %smul = tail call %0 @llvm.smul.with.overflow.i64(i64 %a, i64 %b)
69 %smul.0 = extractvalue %0 %smul, 0
84 declare %0 @llvm.smul.with.overflow.i64(i64, i64) nounwind readnone
/external/llvm/test/CodeGen/SPARC/
Dbasictest.ll57 ; CHECK: smul %o0, %o1, %o0
64 ; CHECK: smul %o0, %o1, %o1
74 ;FIXME: the smul in the output is totally redundant and should not there.
75 ; CHECK: smul %o0, %o1, %o2
/external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/
Dmul-with-overflow.ll10 declare {i32, i1} @llvm.smul.with.overflow.i32(i32 %a, i32 %b)
12 %res = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %x, i32 3)
/external/llvm/test/CodeGen/PowerPC/
Dmul-with-overflow.ll10 declare {i32, i1} @llvm.smul.with.overflow.i32(i32 %a, i32 %b)
12 %res = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %x, i32 3)
/external/swiftshader/third_party/LLVM/test/CodeGen/CellSPU/
Dmul-with-overflow.ll3 declare {i16, i1} @llvm.smul.with.overflow.i16(i16 %a, i16 %b)
5 %res = call {i16, i1} @llvm.smul.with.overflow.i16(i16 %x, i16 3)
/external/llvm/test/CodeGen/Mips/Fast-ISel/
Dmul1.ll8 declare { i32, i1 } @llvm.smul.with.overflow.i32(i32, i32)
13 %1 = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %0, i32 %b)
/external/swiftshader/third_party/LLVM/test/Transforms/ConstProp/
Doverflow-ops.ll10 declare {i8, i1} @llvm.smul.with.overflow.i8(i8, i8)
196 ;; smul
202 %t = call {i8, i1} @llvm.smul.with.overflow.i8(i8 -20, i8 -10)
/external/llvm/test/Transforms/ConstProp/
Doverflow-ops.ll10 declare {i8, i1} @llvm.smul.with.overflow.i8(i8, i8)
196 ;; smul
202 %t = call {i8, i1} @llvm.smul.with.overflow.i8(i8 -20, i8 -10)
/external/llvm/test/CodeGen/AArch64/
Darm64-xaluo.ll199 %t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %v1, i32 %v2)
213 %t = call {i64, i1} @llvm.smul.with.overflow.i64(i64 %v1, i64 %v2)
225 %t = call {i64, i1} @llvm.smul.with.overflow.i64(i64 %v1, i64 2)
369 %t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %v1, i32 %v2)
382 %t = call {i64, i1} @llvm.smul.with.overflow.i64(i64 %v1, i64 %v2)
559 %t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %v1, i32 %v2)
578 %t = call {i64, i1} @llvm.smul.with.overflow.i64(i64 %v1, i64 %v2)
595 %t = call {i64, i1} @llvm.smul.with.overflow.i64(i64 %v1, i64 2)
667 declare {i32, i1} @llvm.smul.with.overflow.i32(i32, i32) nounwind readnone
668 declare {i64, i1} @llvm.smul.with.overflow.i64(i64, i64) nounwind readnone
/external/llvm/test/MC/Sparc/
Dsparc-alu-instructions.s41 ! CHECK: smul %g1, %g2, %g3 ! encoding: [0x86,0x58,0x40,0x02]
42 smul %g1, %g2, %g3
/external/llvm/test/Transforms/InstCombine/
Dintrinsics.ll13 declare %ov.result.32 @llvm.smul.with.overflow.i32(i32, i32) nounwind readnone
155 %x = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 %A, i32 %B)
166 %x = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 %A, i32 %B)
177 %x = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 %A, i32 %B)
180 ; CHECK: %x = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 %A, i32 %B)
401 %t = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 %rem, i32 %rem)
413 %t = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 %rem, i32 %rem)
Dmul.ll167 declare {i32, i1} @llvm.smul.with.overflow.i32(i32, i32)
176 %E = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %C, i32 %D)
/external/llvm/test/Analysis/ScalarEvolution/
Doverflow-intrinsics.ll286 %agg = tail call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %val_a, i32 %val_b)
306 declare { i32, i1 } @llvm.smul.with.overflow.i32(i32, i32) nounwind readnone
/external/llvm/test/Transforms/IndVarSimplify/
Doverflow-intrinsics.ll134 declare { i32, i1 } @llvm.smul.with.overflow.i32(i32, i32) nounwind readnone
/external/llvm/test/MC/Disassembler/Sparc/
Dsparc.txt48 # CHECK: smul %g1, %g2, %g3

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