| /external/llvm/test/CodeGen/ARM/ |
| D | fp16-promote.ll | 9 ; CHECK-FP16: vcvtb.f32.f16
10 ; CHECK-FP16: vcvtb.f32.f16
15 ; CHECK-FP16: vcvtb.f16.f32
26 ; CHECK-FP16: vcvtb.f32.f16
27 ; CHECK-FP16: vcvtb.f32.f16
32 ; CHECK-FP16: vcvtb.f16.f32
43 ; CHECK-FP16: vcvtb.f32.f16
44 ; CHECK-FP16: vcvtb.f32.f16
49 ; CHECK-FP16: vcvtb.f16.f32
60 ; CHECK-FP16: vcvtb.f32.f16
[all …]
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| D | fp16-v3.ll | 7 ; CHECK-DAG: vcvtb.f32.f16 [[SREG1:s[0-9]+]],
9 ; CHECK-DAG: vcvtb.f16.f32 [[SREG3:s[0-9]+]], [[SREG2]]
10 ; CHECK-DAG: vcvtb.f32.f16 [[SREG4:s[0-9]+]], [[SREG3]]
12 ; CHECK-NEXT: vcvtb.f16.f32 [[SREG6:s[0-9]+]], [[SREG5]]
31 ; CHECK: vcvtb.f16.f32
32 ; CHECK: vcvtb.f16.f32
33 ; CHECK: vcvtb.f16.f32
|
| D | fp16-args.ll | 24 ; SOFT: vcvtb.f32.f16 {{s[0-9]+}}, {{s[0-9]+}}
25 ; SOFT: vcvtb.f32.f16 {{s[0-9]+}}, {{s[0-9]+}}
27 ; SOFT: vcvtb.f16.f32 {{s[0-9]+}}, {{s[0-9]+}}
32 ; HARD: vcvtb.f32.f16 {{s[0-9]+}}, s1
33 ; HARD: vcvtb.f32.f16 {{s[0-9]+}}, s0
35 ; HARD: vcvtb.f16.f32 [[SREG:s[0-9]+]], {{s[0-9]+}}
|
| D | half.ll | 34 ; CHECK-F16: vcvtb.f32.f16
35 ; CHECK-V8: vcvtb.f32.f16
46 ; CHECK-F16: vcvtb.f32.f16
48 ; CHECK-V8: vcvtb.f64.f16
58 ; CHECK-F16: vcvtb.f16.f32
59 ; CHECK-V8: vcvtb.f16.f32
70 ; CHECK-V8: vcvtb.f16.f64
|
| D | fp16.ll | 31 ; CHECK-FP16: vcvtb.f32.f16
32 ; CHECK-ARMv8: vcvtb.f32.f16
38 ; CHECK-FP16: vcvtb.f32.f16
39 ; CHECK-ARMV8: vcvtb.f32.f16
46 ; CHECK-FP16: vcvtb.f16.f32
47 ; CHECK-ARMV8: vcvtb.f16.f32
66 ; CHECK-FP16: vcvtb.f32.f16 [[TMP32:s[0-9]+]], [[TMP16]]
70 ; CHECK-ARMV8: vcvtb.f64.f16 d0, [[TMP]]
90 ; CHECK-FP16-UNSAFE-NEXT: vcvtb.f16.f32 s0, s0
92 ; CHECK-ARMV8: vcvtb.f16.f64 [[TMP:s[0-9]+]], d0
|
| /external/llvm/test/MC/ARM/ |
| D | neon-vcvt-fp16.s | 13 @ CHECK-FP16: vcvtb.f32.f16 s7, s1 @ encoding: [0x60,0x3a,0xf2,0xee]
15 vcvtb.f32.f16 s7, s1
16 @ CHECK-FP16: vcvtb.f16.f32 s1, s7 @ encoding: [0x63,0x0a,0xf3,0xee]
18 vcvtb.f16.f32 s1, s7
|
| D | thumb-fp-armv8.s | 10 vcvtb.f64.f16 d3, s1
11 @ CHECK: vcvtb.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0x60,0x3b]
12 vcvtb.f16.f64 s4, d1
13 @ CHECK: vcvtb.f16.f64 s4, d1 @ encoding: [0xb3,0xee,0x41,0x2b]
|
| D | fp-armv8.s | 10 vcvtb.f64.f16 d3, s1
11 @ CHECK: vcvtb.f64.f16 d3, s1 @ encoding: [0x60,0x3b,0xb2,0xee]
12 vcvtb.f16.f64 s4, d1
13 @ CHECK: vcvtb.f16.f64 s4, d1 @ encoding: [0x41,0x2b,0xb3,0xee]
|
| D | directive-arch_extension-fp.s | 48 vcvtb.f64.f16 d0, s0
50 vcvtb.f16.f64 s0, d0
184 vcvtb.f64.f16 d0, s0
186 vcvtb.f16.f64 s0, d0
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| D | fp16.ll | 18 ; CHECK-FP16: vcvtb.f16.f32
21 ; CHECK-FP16: vcvtb.f16.f32
25 ; CHECK-FP16: vcvtb.f32.f16
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | invalid-because-armv7.txt | 12 # Would be vcvtb.f16.f64 s4, d1
|
| D | fp-armv8.txt | 10 # CHECK: vcvtb.f64.f16 d3, s1
13 # CHECK: vcvtb.f16.f64 s4, d1
|
| D | thumb-fp-armv8.txt | 10 # CHECK: vcvtb.f64.f16 d3, s1
13 # CHECK: vcvtb.f16.f64 s4, d1
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 4225 void vcvtb(
4227 void vcvtb(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { in vcvtb() function
4228 vcvtb(al, dt1, dt2, rd, rm); in vcvtb()
4231 void vcvtb(
4233 void vcvtb(DataType dt1, DataType dt2, DRegister rd, SRegister rm) { in vcvtb() function
4234 vcvtb(al, dt1, dt2, rd, rm); in vcvtb()
4237 void vcvtb(
4239 void vcvtb(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { in vcvtb() function
4240 vcvtb(al, dt1, dt2, rd, rm); in vcvtb()
|
| D | disasm-aarch32.h | 1601 void vcvtb(
1604 void vcvtb(
1607 void vcvtb(
|
| D | disasm-aarch32.cc | 4560 void Disassembler::vcvtb( in vcvtb() function in vixl::aarch32::Disassembler
4567 void Disassembler::vcvtb( in vcvtb() function in vixl::aarch32::Disassembler
4574 void Disassembler::vcvtb( in vcvtb() function in vixl::aarch32::Disassembler
23828 vcvtb(CurrentCond(), in DecodeT32()
23856 vcvtb(CurrentCond(), in DecodeT32()
24229 vcvtb(CurrentCond(), in DecodeT32()
24257 vcvtb(CurrentCond(), in DecodeT32()
66585 vcvtb(condition, in DecodeA32()
66619 vcvtb(condition, in DecodeA32()
67054 vcvtb(condition, in DecodeA32()
[all …]
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| D | assembler-aarch32.cc | 15590 void Assembler::vcvtb( in vcvtb() function in vixl::aarch32::Assembler
15621 Delegate(kVcvtb, &Assembler::vcvtb, cond, dt1, dt2, rd, rm); in vcvtb()
15624 void Assembler::vcvtb( in vcvtb() function in vixl::aarch32::Assembler
15643 Delegate(kVcvtb, &Assembler::vcvtb, cond, dt1, dt2, rd, rm); in vcvtb()
15646 void Assembler::vcvtb( in vcvtb() function in vixl::aarch32::Assembler
15665 Delegate(kVcvtb, &Assembler::vcvtb, cond, dt1, dt2, rd, rm); in vcvtb()
|
| D | macro-assembler-aarch32.h | 6572 vcvtb(cond, dt1, dt2, rd, rm); in Vcvtb()
6586 vcvtb(cond, dt1, dt2, rd, rm); in Vcvtb()
6600 vcvtb(cond, dt1, dt2, rd, rm); in Vcvtb()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrVFP.td | 668 /* FIXME */ IIC_fpCVTSH, "vcvtb", ".f32.f16\t$Sd, $Sm",
673 /* FIXME */ IIC_fpCVTHS, "vcvtb", ".f16.f32\t$Sd, $Sm",
689 NoItinerary, "vcvtb", ".f64.f16\t$Dd, $Sm",
701 NoItinerary, "vcvtb", ".f16.f64\t$Sd, $Dm",
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrVFP.td | 405 /* FIXME */ IIC_fpCVTSH, "vcvtb", ".f32.f16\t$Sd, $Sm",
412 /* FIXME */ IIC_fpCVTHS, "vcvtb", ".f16.f32\t$Sd, $Sm",
|