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Searched refs:vldmia (Results 1 – 25 of 48) sorted by relevance

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/external/llvm/test/MC/ARM/
Dpr22395-2.s9 vldmia r0, {d16-d31}
10 @ CHECK: vldmia r0, {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31}
14 vldmia r0, {d16-d31}
15 @ CHECK: vldmia r0, {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31}
19 vldmia r0, {d16-d31}
20 @ CHECK: vldmia r0, {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31}
24 vldmia r0, {d16-d31}
25 @ CHECK: vldmia r0, {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31}
29 vldmia r0, {d16-d31}
30 @ CHECK: vldmia r0, {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31}
[all …]
Dpr22395.s9 vldmia r0, {d16-d31}
11 @ CHECK: vldmia r0, {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31}
Dsimple-fp-encoding.s288 @ CHECK: vldmia r1, {d2, d3, d4, d5, d6, d7} @ encoding: [0x0c,0x2b,0x91,0xec]
289 @ CHECK: vldmia r1, {s2, s3, s4, s5, s6, s7} @ encoding: [0x06,0x1a,0x91,0xec]
290 vldmia r1, {d2,d3-d6,d7}
291 vldmia r1, {s2,s3-s6,s7}
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dvbsl-constant.ll62 ;CHECK: vldmia
63 ;CHECK: vldmia
76 ;CHECK: vldmia
77 ;CHECK: vldmia
90 ;CHECK: vldmia
91 ;CHECK: vldmia
104 ;CHECK: vldmia
105 ;CHECK: vldmia
106 ;CHECK: vldmia
Dneon_ld2.ll1 ; RUN: llc < %s -march=arm -mattr=+neon | grep vldmia | count 4
Difcvt10.ll3 ; Make sure if-converter is not predicating vldmia and ldmia. These are
/external/llvm/test/CodeGen/ARM/
Dswift-vldm.ll9 ; CHECK: vldmia r{{[0-9]+}}, {d2, d3, d4}
10 ; CHECK-NOT: vldmia r{{[0-9]+}}, {d1, d2, d3, d4}
25 ; don't form a "vldmia rX, {d1, d2, d3, d4}".
Dvector-spilling.ll5 ; This test will generate spills/fills using vldmia instructions that access 24 bytes of memory.
10 ; CHECK: vldmia
Dvldm-liveness.ll16 ; I believe the change will be tested as long as the vldmia is not the first of
23 ; CHECK: vldmia r0, {s0, s1}
Difcvt10.ll3 ; Make sure if-converter is not predicating vldmia and ldmia. These are
Dvldm-sched-a9.ll5 ; This test used to test vector spilling using vstmia/vldmia instructions, but
10 ; CHECK: vldmia
D2013-04-18-load-overlap-PR14824.ll7 ; CHECK-NOT: vldmia
/external/boringssl/ios-arm/crypto/fipsmodule/
Dbsaes-armv7.S1122 vldmia sp, {q6}
1138 vldmia r4, {q6}
1170 vldmia r9, {q14} @ reload IV
1224 vldmia r9, {q14} @ reload IV
1247 vldmia r9,{q14} @ reload IV
1268 vldmia r9, {q14} @ reload IV
1286 vldmia r9, {q14} @ reload IV
1302 vldmia r9, {q14} @ reload IV
1315 vldmia r9, {q14} @ reload IV
1391 vldmia sp, {q4} @ load round0 key
[all …]
Dghash-armv4.S397 vldmia r1,{d26,d27} @ load twisted H
418 vldmia r1,{d26,d27} @ load twisted H
/external/boringssl/linux-arm/crypto/fipsmodule/
Dbsaes-armv7.S1115 vldmia sp, {q6}
1131 vldmia r4, {q6}
1163 vldmia r9, {q14} @ reload IV
1217 vldmia r9, {q14} @ reload IV
1240 vldmia r9,{q14} @ reload IV
1261 vldmia r9, {q14} @ reload IV
1279 vldmia r9, {q14} @ reload IV
1295 vldmia r9, {q14} @ reload IV
1308 vldmia r9, {q14} @ reload IV
1382 vldmia sp, {q4} @ load round0 key
[all …]
Dghash-armv4.S388 vldmia r1,{d26,d27} @ load twisted H
407 vldmia r1,{d26,d27} @ load twisted H
/external/valgrind/none/tests/arm/
Dvfp.stdout.exp905 vldmia rN!, qD1; vldmia rN!, qD2 :: Result 0x00000aa0 0x00000bb1 0x00000cc2 0x00000dd3
906 vldmia rN!, qD1; vldmia rN!, qD2 :: Result 0x00000aa0 0x00000bb1 0x00000cc2 0x00000dd3
907 vldmia rN!, qD1; vldmia rN!, qD2 :: Result 0x00000aa0 0x00000bb1 0x00000cc2 0x00000dd3
908 vldmia rN!, qD1; vldmia rN!, qD2 :: Result 0x00000aa0 0x00000bb1 0x00000cc2 0x00000dd3
909 vldmia rN!, qD1; vldmia rN!, qD2 :: Result 0x00000aa0 0x00000bb1 0x00000cc2 0x00000dd3
910 vldmia rN!, qD1; vldmia rN!, qD2 :: Result 0x00000aa0 0x00000bb1 0x00000cc2 0x00000dd3
911 vldmia rN!, qD1; vldmia rN!, qD2 :: Result 0x00000aa0 0x00000bb1 0x00000cc2 0x00000dd3
912 vldmia rN!, qD1; vldmia rN!, qD2 :: Result 0x00000aa0 0x00000bb1 0x00000cc2 0x00000dd3
913 vldmia rN!, qD1; vldmia rN!, qD2 :: Result 0x00000aa0 0x00000bb1 0x00000cc2 0x00000dd3
914 vldmia rN!, qD1; vldmia rN!, qD2 :: Result 0x00000aa0 0x00000bb1 0x00000cc2 0x00000dd3
[all …]
/external/compiler-rt/lib/builtins/arm/
Drestore_vfp_d8_d15_regs.S30 vldmia sp!, {d8-d15} // pop registers d8-d15 off stack
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dsimple-fp-encoding.s225 @ CHECK: vldmia r1, {d2, d3, d4, d5, d6, d7} @ encoding: [0x0c,0x2b,0x91,0xec]
226 @ CHECK: vldmia r1, {s2, s3, s4, s5, s6, s7} @ encoding: [0x06,0x1a,0x91,0xec]
227 vldmia r1, {d2,d3-d6,d7}
228 vldmia r1, {s2,s3-s6,s7}
/external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/
Dbuildvector-crash.ll16 ; CHECK: vldmia
/external/libavc/common/arm/
Dih264_inter_pred_luma_copy_a9q.s119 vldmia sp!, {d8-d15} @ Restore neon registers that were saved
151 vldmia sp!, {d8-d15} @ Restore neon registers that were saved
181 vldmia sp!, {d8-d15} @ Restore neon registers that were saved
Dih264_inter_pred_chroma_a9q.s250 vldmia sp!, {d8-d15} @ Restore neon registers that were saved
Dih264_inter_pred_filters_luma_horz_a9q.s245 vldmia sp!, {d8-d15} @ Restore neon registers that were saved
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dfp-encoding.txt198 # CHECK: vldmia r1, {d2, d3, d4, d5, d6, d7}
199 # CHECK: vldmia r1, {s2, s3, s4, s5, s6, s7}
/external/llvm/test/MC/Disassembler/ARM/
Dfp-encoding.txt206 # CHECK: vldmia r1, {d2, d3, d4, d5, d6, d7}
207 # CHECK: vldmia r1, {s2, s3, s4, s5, s6, s7}

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