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Searched refs:vst2 (Results 1 – 25 of 47) sorted by relevance

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/external/libhevc/common/arm/
Dihevc_intra_pred_chroma_ver.s129 vst2.8 {d20,d21}, [r2]!
130 vst2.8 {d20,d21}, [r5]!
131 vst2.8 {d20,d21}, [r8]!
132 vst2.8 {d20,d21}, [r10]!
134 vst2.8 {d22,d23}, [r2], r11
135 vst2.8 {d22,d23}, [r5], r11
136 vst2.8 {d22,d23}, [r8], r11
137 vst2.8 {d22,d23}, [r10], r11
142 vst2.8 {d20,d21}, [r2]!
143 vst2.8 {d20,d21}, [r5]!
[all …]
Dihevc_intra_pred_chroma_dc.s204 vst2.8 {d16,d17}, [r2]!
207 vst2.8 {d16,d17}, [r5]!
208 vst2.8 {d16,d17}, [r8]!
210 vst2.8 {d16,d17}, [r10]!
213 vst2.8 {d16,d17}, [r2], r6
214 vst2.8 {d16,d17}, [r5], r6
215 vst2.8 {d16,d17}, [r8], r6
216 vst2.8 {d16,d17}, [r10], r6
219 vst2.8 {d16,d17}, [r2]!
220 vst2.8 {d16,d17}, [r5]!
[all …]
Dihevc_intra_pred_chroma_mode2.s178 vst2.8 {d16,d17},[r6],r5
179 vst2.8 {d18,d19},[r7],r5
181 vst2.8 {d20,d21},[r9],r5
182 vst2.8 {d22,d23},[r14],r5
183 vst2.8 {d24,d25},[r6],r5
185 vst2.8 {d26,d27},[r7],r5
186 vst2.8 {d28,d29},[r9],r5
187 vst2.8 {d30,d31},[r14],r5
241 vst2.8 {d16,d17},[r6],r5
242 vst2.8 {d18,d19},[r7],r5
[all …]
/external/llvm/test/MC/ARM/
Dneon-vst-encoding.s34 vst2.8 {d16, d17}, [r0:64]
35 vst2.16 {d16, d17}, [r0:128]
36 vst2.32 {d16, d17}, [r0]
37 vst2.8 {d16, d17, d18, d19}, [r0:64]
38 vst2.16 {d16, d17, d18, d19}, [r0:128]
39 vst2.32 {d16, d17, d18, d19}, [r0:256]
40 vst2.8 {d16, d17}, [r0:64]!
41 vst2.16 {q15}, [r0:128]!
42 vst2.32 {d14, d15}, [r0]!
43 vst2.8 {d16, d17, d18, d19}, [r0:64]!
[all …]
Dneont2-vst-encoding.s22 @ CHECK: vst2.8 {d16, d17}, [r0:64] @ encoding: [0x40,0xf9,0x1f,0x08]
23 vst2.8 {d16, d17}, [r0:64]
24 @ CHECK: vst2.16 {d16, d17}, [r0:128] @ encoding: [0x40,0xf9,0x6f,0x08]
25 vst2.16 {d16, d17}, [r0:128]
26 @ CHECK: vst2.32 {d16, d17}, [r0] @ encoding: [0x40,0xf9,0x8f,0x08]
27 vst2.32 {d16, d17}, [r0]
28 @ CHECK: vst2.8 {d16, d17, d18, d19}, [r0:64] @ encoding: [0x40,0xf9,0x1f,0x03]
29 vst2.8 {d16, d17, d18, d19}, [r0:64]
30 @ CHECK: vst2.16 {d16, d17, d18, d19}, [r0:128] @ encoding: [0x40,0xf9,0x6f,0x03]
31 vst2.16 {d16, d17, d18, d19}, [r0:128]
[all …]
Dneon-vld-vst-align.s6313 vst2.8 {d0, d1}, [r4]
6314 vst2.8 {d0, d1}, [r4:16]
6315 vst2.8 {d0, d1}, [r4:32]
6316 vst2.8 {d0, d1}, [r4:64]
6317 vst2.8 {d0, d1}, [r4:128]
6318 vst2.8 {d0, d1}, [r4:256]
6320 @ CHECK: vst2.8 {d0, d1}, [r4] @ encoding: [0x04,0xf9,0x0f,0x08]
6322 @ CHECK-ERRORS: vst2.8 {d0, d1}, [r4:16]
6325 @ CHECK-ERRORS: vst2.8 {d0, d1}, [r4:32]
6327 @ CHECK: vst2.8 {d0, d1}, [r4:64] @ encoding: [0x04,0xf9,0x1f,0x08]
[all …]
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dvst2.ll6 ;CHECK: vst2.8 {d16, d17}, [r0, :64]
8 call void @llvm.arm.neon.vst2.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 8)
15 ;CHECK: vst2.8 {d16, d17}, [r1], r2
18 call void @llvm.arm.neon.vst2.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 4)
27 ;CHECK: vst2.16 {d16, d17}, [r0, :128]
30 call void @llvm.arm.neon.vst2.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 32)
36 ;CHECK: vst2.32
39 call void @llvm.arm.neon.vst2.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1)
45 ;CHECK: vst2.32
48 call void @llvm.arm.neon.vst2.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, i32 1)
[all …]
D2010-06-11-vmovdrr-bitcast.ll15 …tail call void @llvm.arm.neon.vst2.v8i8(i8* %b, <8 x i8> %tmp16.i, <8 x i8> %tmp20.i, i32 1) nounw…
19 declare void @llvm.arm.neon.vst2.v8i8(i8*, <8 x i8>, <8 x i8>, i32) nounwind
Dvstlane.ll111 ;CHECK: vst2.8 {d16[1], d17[1]}, [r0, :16]
120 ;CHECK: vst2.16 {d16[1], d17[1]}, [r0, :32]
130 ;CHECK: vst2.16 {d16[1], d17[1]}, [r1], r2
142 ;CHECK: vst2.32
151 ;CHECK: vst2.32
161 ;CHECK: vst2.16 {d17[1], d19[1]}, [r0]
171 ;CHECK: vst2.32 {d17[0], d19[0]}, [r0, :64]
180 ;CHECK: vst2.32
Dreg_sequence.ll114 ; CHECK-NEXT: vst2.32
121 tail call void @llvm.arm.neon.vst2.v4i32(i8* %tmp8, <4 x i32> %tmp6, <4 x i32> %tmp7, i32 1)
129 ; CHECK: vst2.32 {d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}}
133 tail call void @llvm.arm.neon.vst2.v4i32(i8* %tmp8, <4 x i32> %tmp102, <4 x i32> %tmp101, i32 1)
173 ; CHECK: vst2.32
184 tail call void @llvm.arm.neon.vst2.v4i32(i8* %2, <4 x i32> %tmp57, <4 x i32> %tmp60, i32 1)
346 declare void @llvm.arm.neon.vst2.v4i32(i8*, <4 x i32>, <4 x i32>, i32) nounwind
/external/llvm/test/CodeGen/ARM/
Dvst2.ll6 ;CHECK: vst2.8 {d16, d17}, [r0:64]
8 call void @llvm.arm.neon.vst2.p0i8.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 8)
15 ;CHECK: vst2.8 {d16, d17}, [r1], r2
18 call void @llvm.arm.neon.vst2.p0i8.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 4)
27 ;CHECK: vst2.16 {d16, d17}, [r0:128]
30 call void @llvm.arm.neon.vst2.p0i8.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 32)
36 ;CHECK: vst2.32
39 call void @llvm.arm.neon.vst2.p0i8.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1)
45 ;CHECK: vst2.32
48 call void @llvm.arm.neon.vst2.p0i8.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, i32 1)
[all …]
D2010-06-11-vmovdrr-bitcast.ll15 …tail call void @llvm.arm.neon.vst2.p0i8.v8i8(i8* %b, <8 x i8> %tmp16.i, <8 x i8> %tmp20.i, i32 1) …
19 declare void @llvm.arm.neon.vst2.p0i8.v8i8(i8*, <8 x i8>, <8 x i8>, i32) nounwind
Dvld-vst-upgrade.ll86 ; CHECK: vst2.32 {d16, d17}, [r0]
88 call void @llvm.arm.neon.vst2.v2i32(i8* %ptr, <2 x i32> %A, <2 x i32> %B, i32 1)
92 declare void @llvm.arm.neon.vst2.v2i32(i8*, <2 x i32>, <2 x i32>, i32) nounwind
115 ; CHECK: vst2.32 {d16[1], d17[1]}, [r0]
Darm-interleaved-accesses.ll44 ; NEON: vst2.8 {d16, d17}, [r0]
46 ; NONEON-NOT: vst2
124 ; NEON: vst2.32 {d16, d17}, [r0]
126 ; NONEON-NOT: vst2
205 ; NEON: vst2.32 {d16, d17, d18, d19}, [r0]
207 ; NONEON-NOT: vst2
257 ; NEON: vst2.32
259 ; NONEON-NOT: vst2
Dvstlane.ll111 ;CHECK: vst2.8 {d16[1], d17[1]}, [r0:16]
120 ;CHECK: vst2.16 {d16[1], d17[1]}, [r0:32]
130 ;CHECK: vst2.16 {d16[1], d17[1]}, [r1], r2
142 ;CHECK: vst2.32
151 ;CHECK: vst2.32
161 ;CHECK: vst2.16 {d17[1], d19[1]}, [r0]
171 ;CHECK: vst2.32 {d17[0], d19[0]}, [r0:64]
180 ;CHECK: vst2.32
Dcoalesce-subregs.ll6 ; The vld2 and vst2 are not aligned wrt each other, the second Q loaded is the
9 ; setting up the vst2 data.
13 ; CHECK: vst2
21 …tail call void @llvm.arm.neon.vst2.p0i8.v4f32(i8* %1, <4 x float> %vld221, <4 x float> undef, i32 …
36 …tail call void @llvm.arm.neon.vst2.p0i8.v4f32(i8* %1, <4 x float> %vld221, <4 x float> %vld2215, i…
58 …tail call void @llvm.arm.neon.vst2.p0i8.v4f32(i8* %1, <4 x float> %qq0.0.1.0, <4 x float> %vld2215…
68 declare void @llvm.arm.neon.vst2.p0i8.v4f32(i8*, <4 x float>, <4 x float>, i32) nounwind
Dreg_sequence.ll116 ; CHECK-NEXT: vst2.32
123 tail call void @llvm.arm.neon.vst2.p0i8.v4i32(i8* %tmp8, <4 x i32> %tmp6, <4 x i32> %tmp7, i32 1)
130 ; CHECK: vst2.32 {d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}}
134 …tail call void @llvm.arm.neon.vst2.p0i8.v4i32(i8* %tmp8, <4 x i32> %tmp102, <4 x i32> %tmp101, i32…
174 ; CHECK: vst2.32
185 tail call void @llvm.arm.neon.vst2.p0i8.v4i32(i8* %2, <4 x i32> %tmp57, <4 x i32> %tmp60, i32 1)
346 declare void @llvm.arm.neon.vst2.p0i8.v4i32(i8*, <4 x i32>, <4 x i32>, i32) nounwind
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dneon-vst-encoding.s21 @ CHECK: vst2.8 {d16, d17}, [r0, :64] @ encoding: [0x1f,0x08,0x40,0xf4]
22 vst2.8 {d16, d17}, [r0, :64]
23 @ CHECK: vst2.16 {d16, d17}, [r0, :128] @ encoding: [0x6f,0x08,0x40,0xf4]
24 vst2.16 {d16, d17}, [r0, :128]
25 @ CHECK: vst2.32 {d16, d17}, [r0] @ encoding: [0x8f,0x08,0x40,0xf4]
26 vst2.32 {d16, d17}, [r0]
27 @ CHECK: vst2.8 {d16, d17, d18, d19}, [r0, :64] @ encoding: [0x1f,0x03,0x40,0xf4]
28 vst2.8 {d16, d17, d18, d19}, [r0, :64]
29 @ CHECK: vst2.16 {d16, d17, d18, d19}, [r0, :128] @ encoding: [0x6f,0x03,0x40,0xf4]
30 vst2.16 {d16, d17, d18, d19}, [r0, :128]
[all …]
Dneont2-vst-encoding.s23 @ CHECK: vst2.8 {d16, d17}, [r0, :64] @ encoding: [0x1f,0x08,0x40,0xf9]
24 vst2.8 {d16, d17}, [r0, :64]
25 @ CHECK: vst2.16 {d16, d17}, [r0, :128] @ encoding: [0x6f,0x08,0x40,0xf9]
26 vst2.16 {d16, d17}, [r0, :128]
27 @ CHECK: vst2.32 {d16, d17}, [r0] @ encoding: [0x8f,0x08,0x40,0xf9]
28 vst2.32 {d16, d17}, [r0]
29 @ CHECK: vst2.8 {d16, d17, d18, d19}, [r0, :64] @ encoding: [0x1f,0x03,0x40,0xf9]
30 vst2.8 {d16, d17, d18, d19}, [r0, :64]
31 @ CHECK: vst2.16 {d16, d17, d18, d19}, [r0, :128] @ encoding: [0x6f,0x03,0x40,0xf9]
32 vst2.16 {d16, d17, d18, d19}, [r0, :128]
[all …]
/external/libavc/encoder/arm/
Dih264e_fmt_conv.s144 vst2.8 {d0, d1}, [r3]!
162 vst2.8 {d0, d1}, [r3]!
300 vst2.8 {d1, d3}, [r0]! @// Store the 16 elements of row1 Y
301 vst2.8 {d5, d7}, [r6]! @// Store the 16 elements of row2 Y
303 vst2.8 {d0, d2}, [r1]! @// Store the 8 elements of row1/2 U
327 vst2.8 {d1, d3}, [r0]! @// Store the 16 elements of row1 Y
328 vst2.8 {d5, d7}, [r6]! @// Store the 16 elements of row2 Y
330 vst2.8 {d0, d2}, [r1]! @// Store the 8 elements of row1/2 U
/external/libhevc/decoder/arm/
Dihevcd_itrans_recon_dc_chroma.s127 vst2.8 {d2,d3},[r11],r3
128 vst2.8 {d4,d5},[r11],r3
129 vst2.8 {d6,d7},[r11],r3
130 vst2.8 {d8,d9},[r11],r3
132 vst2.8 {d10,d11},[r11],r3
133 vst2.8 {d12,d13},[r11],r3
134 vst2.8 {d14,d15},[r11],r3
135 vst2.8 {d16,d17},[r11]
/external/libmpeg2/common/arm/
Dimpeg2_format_conv.s197 vst2.8 {d0, d1}, [r3]!
215 vst2.8 {d0, d1}, [r3]!
359 vst2.8 {d0, d1}, [r3]!
377 vst2.8 {d0, d1}, [r3]!
/external/libvpx/libvpx/vpx_dsp/arm/
Dloopfilter_8_neon.asm164 vst2.8 {d4[0], d5[0]}, [r3], r1
165 vst2.8 {d4[1], d5[1]}, [r3], r1
166 vst2.8 {d4[2], d5[2]}, [r3], r1
167 vst2.8 {d4[3], d5[3]}, [r3], r1
168 vst2.8 {d4[4], d5[4]}, [r3], r1
169 vst2.8 {d4[5], d5[5]}, [r3], r1
170 vst2.8 {d4[6], d5[6]}, [r3], r1
171 vst2.8 {d4[7], d5[7]}, [r3]
/external/llvm/test/MC/Disassembler/ARM/
Dneont2.txt1551 # CHECK: vst2.8 {d16, d17}, [r0:64]
1553 # CHECK: vst2.16 {d16, d17}, [r0:128]
1555 # CHECK: vst2.32 {d16, d17}, [r0]
1557 # CHECK: vst2.8 {d16, d17, d18, d19}, [r0:64]
1559 # CHECK: vst2.16 {d16, d17, d18, d19}, [r0:128]
1561 # CHECK: vst2.32 {d16, d17, d18, d19}, [r0:256]
1600 # CHECK: vst2.8 {d16[1], d17[1]}, [r0:16]
1602 # CHECK: vst2.16 {d16[1], d17[1]}, [r0:32]
1604 # CHECK: vst2.32 {d16[1], d17[1]}, [r0]
1606 # CHECK: vst2.16 {d17[1], d19[1]}, [r0]
[all …]
Dneon.txt1811 # CHECK: vst2.8 {d16, d17}, [r0:64]
1813 # CHECK: vst2.16 {d16, d17}, [r0:128]
1815 # CHECK: vst2.32 {d16, d17}, [r0]
1817 # CHECK: vst2.8 {d16, d17, d18, d19}, [r0:64]
1819 # CHECK: vst2.16 {d16, d17, d18, d19}, [r0:128]
1821 # CHECK: vst2.32 {d16, d17, d18, d19}, [r0:256]
1860 # CHECK: vst2.8 {d16[1], d17[1]}, [r0:16]
1862 # CHECK: vst2.16 {d16[1], d17[1]}, [r0:32]
1864 # CHECK: vst2.32 {d16[1], d17[1]}, [r0]
1866 # CHECK: vst2.16 {d17[1], d19[1]}, [r0]
[all …]

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