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Searched refs:PPCInstrInfo (Results 1 – 25 of 28) sorted by relevance

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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCInstrInfo.cpp43 PPCInstrInfo::PPCInstrInfo(PPCTargetMachine &tm) in PPCInstrInfo() function in PPCInstrInfo
49 ScheduleHazardRecognizer *PPCInstrInfo::CreateTargetHazardRecognizer( in CreateTargetHazardRecognizer()
59 unsigned PPCInstrInfo::isLoadFromStackSlot(const MachineInstr *MI, in isLoadFromStackSlot()
77 unsigned PPCInstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot()
98 PPCInstrInfo::commuteInstruction(MachineInstr *MI, bool NewMI) const { in commuteInstruction()
162 void PPCInstrInfo::insertNoop(MachineBasicBlock &MBB, in insertNoop()
170 bool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, in AnalyzeBranch()
248 unsigned PPCInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const { in RemoveBranch()
276 PPCInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, in InsertBranch()
302 void PPCInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg()
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DPPC.td56 include "PPCInstrInfo.td"
98 def PPCInstrInfo : InstrInfo {
109 let InstructionSet = PPCInstrInfo;
DPPCTargetMachine.h35 PPCInstrInfo InstrInfo;
47 virtual const PPCInstrInfo *getInstrInfo() const { return &InstrInfo; } in getInstrInfo()
DPPCInstrInfo.h67 class PPCInstrInfo : public PPCGenInstrInfo {
80 explicit PPCInstrInfo(PPCTargetMachine &TM);
DPPCBranchSelector.cpp56 const PPCInstrInfo *TII = in runOnMachineFunction()
57 static_cast<const PPCInstrInfo*>(Fn.getTarget().getInstrInfo()); in runOnMachineFunction()
DPPCFrameLowering.cpp256 const PPCInstrInfo &TII = in emitPrologue()
257 *static_cast<const PPCInstrInfo*>(MF.getTarget().getInstrInfo()); in emitPrologue()
507 const PPCInstrInfo &TII = in emitEpilogue()
508 *static_cast<const PPCInstrInfo*>(MF.getTarget().getInstrInfo()); in emitEpilogue()
DREADME_ALTIVEC.txt3 Implement PPCInstrInfo::isLoadFromStackSlot/isStoreToStackSlot for vector
DPPCInstrFormats.td32 /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to
DREADME.txt412 logical op, it will invoke PPCInstrInfo::convertToThreeAddress. At this point
/external/llvm/lib/Target/PowerPC/
DPPCInstrInfo.cpp65 void PPCInstrInfo::anchor() {} in anchor()
67 PPCInstrInfo::PPCInstrInfo(PPCSubtarget &STI) in PPCInstrInfo() function in PPCInstrInfo
74 PPCInstrInfo::CreateTargetHazardRecognizer(const TargetSubtargetInfo *STI, in CreateTargetHazardRecognizer()
91 PPCInstrInfo::CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II, in CreateTargetPostRAHazardRecognizer()
111 unsigned PPCInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency()
141 int PPCInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency()
199 bool PPCInstrInfo::isAssociativeAndCommutative(const MachineInstr &Inst) const { in isAssociativeAndCommutative()
233 bool PPCInstrInfo::getMachineCombinerPatterns( in getMachineCombinerPatterns()
249 bool PPCInstrInfo::isCoalescableExtInstr(const MachineInstr &MI, in isCoalescableExtInstr()
263 unsigned PPCInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot()
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DPPCSubtarget.h145 PPCInstrInfo InstrInfo;
178 const PPCInstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
DPPCInstrInfo.h67 class PPCInstrInfo : public PPCGenInstrInfo {
99 explicit PPCInstrInfo(PPCSubtarget &STI);
DPPCBranchSelector.cpp72 const PPCInstrInfo *TII = in runOnMachineFunction()
73 static_cast<const PPCInstrInfo *>(Fn.getSubtarget().getInstrInfo()); in runOnMachineFunction()
DPPCFrameLowering.cpp697 const PPCInstrInfo &TII = in emitPrologue()
698 *static_cast<const PPCInstrInfo *>(Subtarget.getInstrInfo()); in emitPrologue()
1104 const PPCInstrInfo &TII = in emitEpilogue()
1105 *static_cast<const PPCInstrInfo *>(Subtarget.getInstrInfo()); in emitEpilogue()
1343 const PPCInstrInfo &TII = in createTailCallBranchInstr()
1344 *static_cast<const PPCInstrInfo *>(Subtarget.getInstrInfo()); in createTailCallBranchInstr()
1723 const PPCInstrInfo &TII = in spillCalleeSavedRegisters()
1724 *static_cast<const PPCInstrInfo *>(Subtarget.getInstrInfo()); in spillCalleeSavedRegisters()
1785 const PPCInstrInfo &TII = *MF->getSubtarget<PPCSubtarget>().getInstrInfo(); in restoreCRs()
1866 const PPCInstrInfo &TII = in restoreCalleeSavedRegisters()
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DCMakeLists.txt22 PPCInstrInfo.cpp
DPPCMIPeephole.cpp44 const PPCInstrInfo *TII;
DPPCTLSDynamicCall.cpp49 const PPCInstrInfo *TII;
DPPC.td277 include "PPCInstrInfo.td"
422 def PPCInstrInfo : InstrInfo {
447 let InstructionSet = PPCInstrInfo;
DREADME_P9.txt204 . Define DAG Node in PPCInstrInfo.td:
249 . Define DAG Node in PPCInstrInfo.td:
500 . Need define ix16addr in PPCInstrInfo.td
501 ix16addr: 16-byte aligned, see "def memrix16" in PPCInstrInfo.td
DPPCVSXFMAMutate.cpp67 const PPCInstrInfo *TII;
DREADME_ALTIVEC.txt3 Implement PPCInstrInfo::isLoadFromStackSlot/isStoreToStackSlot for vector
DPPCVSXSwapRemoval.cpp103 const PPCInstrInfo *TII;
DPPCInstrFormats.td34 /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to
90 /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DSPUNodes.td142 // Constraints: (taken from PPCInstrInfo.td)
/external/llvm/docs/
DExtendingLLVM.rst157 #. ``lib/Target/PowerPC/PPCInstrInfo.td``:
163 See the patterns for ``rotl`` in ``PPCInstrInfo.td``.

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