Searched refs:VLdStD (Results 1 – 4 of 4) sorted by relevance
1048 i->ARM64in.VLdStD.isLoad = isLoad; in ARM64Instr_VLdStD()1049 i->ARM64in.VLdStD.dD = dD; in ARM64Instr_VLdStD()1050 i->ARM64in.VLdStD.rN = rN; in ARM64Instr_VLdStD()1051 i->ARM64in.VLdStD.uimm12 = uimm12; in ARM64Instr_VLdStD()1620 if (i->ARM64in.VLdStD.isLoad) { in ppARM64Instr()1622 ppHRegARM64(i->ARM64in.VLdStD.dD); in ppARM64Instr()1623 vex_printf(", %u(", i->ARM64in.VLdStD.uimm12); in ppARM64Instr()1624 ppHRegARM64(i->ARM64in.VLdStD.rN); in ppARM64Instr()1628 vex_printf("%u(", i->ARM64in.VLdStD.uimm12); in ppARM64Instr()1629 ppHRegARM64(i->ARM64in.VLdStD.rN); in ppARM64Instr()[all …]
1252 i->ARMin.VLdStD.isLoad = isLoad; in ARMInstr_VLdStD()1253 i->ARMin.VLdStD.dD = dD; in ARMInstr_VLdStD()1254 i->ARMin.VLdStD.amode = am; in ARMInstr_VLdStD()1755 if (i->ARMin.VLdStD.isLoad) { in ppARMInstr()1757 ppHRegARM(i->ARMin.VLdStD.dD); in ppARMInstr()1759 ppARMAModeV(i->ARMin.VLdStD.amode); in ppARMInstr()1762 ppARMAModeV(i->ARMin.VLdStD.amode); in ppARMInstr()1764 ppHRegARM(i->ARMin.VLdStD.dD); in ppARMInstr()2225 addRegUsage_ARMAModeV(u, i->ARMin.VLdStD.amode); in getRegUsage_ARMInstr()2226 if (i->ARMin.VLdStD.isLoad) { in getRegUsage_ARMInstr()[all …]
771 } VLdStD; member
728 } VLdStD; member