| /art/compiler/utils/ |
| D | assembler_thumb_test.cc | 335 __ StoreToOffset(kStoreWord, R2, R4, 12); in TEST_F() local
336 __ StoreToOffset(kStoreWord, R2, R4, 0xfff); in TEST_F() local
337 __ StoreToOffset(kStoreWord, R2, R4, 0x1000); in TEST_F() local
338 __ StoreToOffset(kStoreWord, R2, R4, 0x1000a4); in TEST_F() local
339 __ StoreToOffset(kStoreWord, R2, R4, 0x101000); in TEST_F() local
340 __ StoreToOffset(kStoreWord, R4, R4, 0x101000); in TEST_F() local
341 __ StoreToOffset(kStoreHalfword, R2, R4, 12); in TEST_F() local
342 __ StoreToOffset(kStoreHalfword, R2, R4, 0xfff); in TEST_F() local
343 __ StoreToOffset(kStoreHalfword, R2, R4, 0x1000); in TEST_F() local
344 __ StoreToOffset(kStoreHalfword, R2, R4, 0x1000a4); in TEST_F() local
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| /art/compiler/utils/mips/ |
| D | assembler_mips_test.cc | 1572 TEST_F(AssemblerMIPSTest, StoreToOffset) { in TEST_F() argument
1573 __ StoreToOffset(mips::kStoreByte, mips::A3, mips::A1, -0x8000); in TEST_F() local
1574 __ StoreToOffset(mips::kStoreByte, mips::A3, mips::A1, +0); in TEST_F() local
1575 __ StoreToOffset(mips::kStoreByte, mips::A3, mips::A1, +0x7FF8); in TEST_F() local
1576 __ StoreToOffset(mips::kStoreByte, mips::A3, mips::A1, +0x7FFB); in TEST_F() local
1577 __ StoreToOffset(mips::kStoreByte, mips::A3, mips::A1, +0x7FFC); in TEST_F() local
1578 __ StoreToOffset(mips::kStoreByte, mips::A3, mips::A1, +0x7FFF); in TEST_F() local
1579 __ StoreToOffset(mips::kStoreByte, mips::A3, mips::A1, -0xFFF0); in TEST_F() local
1580 __ StoreToOffset(mips::kStoreByte, mips::A3, mips::A1, -0x8008); in TEST_F() local
1581 __ StoreToOffset(mips::kStoreByte, mips::A3, mips::A1, -0x8001); in TEST_F() local
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| D | assembler_mips.cc | 4733 void MipsAssembler::StoreToOffset(StoreOperandType type, in StoreToOffset() function in art::mips::MipsAssembler
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64_test.cc | 2071 TEST_F(AssemblerMIPS64Test, StoreToOffset) { in TEST_F() argument
2072 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A0, 0); in TEST_F() local
2073 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 0); in TEST_F() local
2074 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 1); in TEST_F() local
2075 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 256); in TEST_F() local
2076 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 1000); in TEST_F() local
2077 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 0x7FFF); in TEST_F() local
2078 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 0x8000); in TEST_F() local
2079 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 0x8001); in TEST_F() local
2080 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 0x10000); in TEST_F() local
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| D | assembler_mips64.cc | 3570 void Mips64Assembler::StoreToOffset(StoreOperandType type, in StoreToOffset() function in art::mips64::Mips64Assembler
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| /art/compiler/optimizing/ |
| D | code_generator_mips64.cc | 1059 __ StoreToOffset(store_type, in Exchange() local
1063 __ StoreToOffset(store_type, TMP, SP, index1 + stack_offset); in Exchange() local
1121 __ StoreToOffset(kStoreDoubleword, reg, SP, ofs); in GenerateFrameEntry() local
1139 __ StoreToOffset(kStoreDoubleword, kMethodRegisterArgument, SP, kCurrentMethodStackOffset); in GenerateFrameEntry() local
1144 __ StoreToOffset(kStoreWord, ZERO, SP, GetStackOffsetOfShouldDeoptimizeFlag()); in GenerateFrameEntry() local
1333 __ StoreToOffset(store_type, in MoveLocation() local
1362 __ StoreToOffset(store_type, gpr, SP, destination.GetStackIndex()); in MoveLocation() local
1369 __ StoreToOffset(kStoreWord, TMP, SP, destination.GetStackIndex()); in MoveLocation() local
1372 __ StoreToOffset(kStoreDoubleword, TMP, SP, destination.GetStackIndex()); in MoveLocation() local
1440 __ StoreToOffset(store_type, reg_loc.AsRegister<GpuRegister>(), SP, mem_loc.GetStackIndex()); in SwapLocations() local
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| D | code_generator_mips.cc | 1173 __ StoreToOffset(kStoreWord, TMP, SP, offset); in EmitSwap() local
1185 __ StoreToOffset(kStoreWord, TMP, SP, offset_l); in EmitSwap() local
1188 __ StoreToOffset(kStoreWord, TMP, SP, offset_h); in EmitSwap() local
1239 __ StoreToOffset(kStoreWord, in Exchange() local
1243 __ StoreToOffset(kStoreWord, TMP, SP, index1 + stack_offset); in Exchange() local
1324 __ StoreToOffset(kStoreWord, reg, SP, ofs); in GenerateFrameEntry() local
1341 __ StoreToOffset(kStoreWord, kMethodRegisterArgument, SP, kCurrentMethodStackOffset); in GenerateFrameEntry() local
1346 __ StoreToOffset(kStoreWord, ZERO, SP, GetStackOffsetOfShouldDeoptimizeFlag()); in GenerateFrameEntry() local
1488 __ StoreToOffset(kStoreDoubleword, source.AsRegisterPairLow<Register>(), SP, dst_offset); in MoveLocation() local
1495 __ StoreToOffset(kStoreWord, TMP, SP, dst_offset); in MoveLocation() local
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| D | intrinsics_mips64.cc | 2023 __ StoreToOffset(kStoreHalfword, TMP, dstPtr, 0); in VisitStringGetCharsNoCheck() local
2597 __ StoreToOffset(kStoreWord, in, out, info.value_offset); in VisitIntegerValueOf() local
2620 __ StoreToOffset(kStoreWord, ZERO, TR, offset); in VisitThreadInterrupted() local
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| D | intrinsics_mips.cc | 2716 __ StoreToOffset(kStoreHalfword, TMP, dstPtr, 0); in VisitStringGetCharsNoCheck() local
3214 __ StoreToOffset(kStoreWord, in, out, info.value_offset); in VisitIntegerValueOf() local
3237 __ StoreToOffset(kStoreWord, ZERO, TR, offset); in VisitThreadInterrupted() local
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| /art/compiler/utils/arm/ |
| D | assembler_arm_vixl.cc | 247 void ArmVIXLAssembler::StoreToOffset(StoreOperandType type, in StoreToOffset() function in art::arm::ArmVIXLAssembler
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| /art/compiler/utils/arm64/ |
| D | jni_macro_assembler_arm64.cc | 113 void Arm64JNIMacroAssembler::StoreToOffset(XRegister source, XRegister base, int32_t offset) { in StoreToOffset() function in art::arm64::Arm64JNIMacroAssembler
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