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Searched refs:LoadFromOffset (Results 1 – 19 of 19) sorted by relevance

/art/compiler/utils/
Dassembler_thumb_test.cc302 __ LoadFromOffset(kLoadWord, R2, R4, 12); in TEST_F() local
303 __ LoadFromOffset(kLoadWord, R2, R4, 0xfff); in TEST_F() local
304 __ LoadFromOffset(kLoadWord, R2, R4, 0x1000); in TEST_F() local
305 __ LoadFromOffset(kLoadWord, R2, R4, 0x1000a4); in TEST_F() local
306 __ LoadFromOffset(kLoadWord, R2, R4, 0x101000); in TEST_F() local
307 __ LoadFromOffset(kLoadWord, R4, R4, 0x101000); in TEST_F() local
308 __ LoadFromOffset(kLoadUnsignedHalfword, R2, R4, 12); in TEST_F() local
309 __ LoadFromOffset(kLoadUnsignedHalfword, R2, R4, 0xfff); in TEST_F() local
310 __ LoadFromOffset(kLoadUnsignedHalfword, R2, R4, 0x1000); in TEST_F() local
311 __ LoadFromOffset(kLoadUnsignedHalfword, R2, R4, 0x1000a4); in TEST_F() local
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/art/compiler/utils/mips/
Dassembler_mips_test.cc902 TEST_F(AssemblerMIPSTest, LoadFromOffset) { in TEST_F() argument
903 __ LoadFromOffset(mips::kLoadSignedByte, mips::A3, mips::A1, -0x8000); in TEST_F() local
904 __ LoadFromOffset(mips::kLoadSignedByte, mips::A3, mips::A1, +0); in TEST_F() local
905 __ LoadFromOffset(mips::kLoadSignedByte, mips::A3, mips::A1, +0x7FF8); in TEST_F() local
906 __ LoadFromOffset(mips::kLoadSignedByte, mips::A3, mips::A1, +0x7FFB); in TEST_F() local
907 __ LoadFromOffset(mips::kLoadSignedByte, mips::A3, mips::A1, +0x7FFC); in TEST_F() local
908 __ LoadFromOffset(mips::kLoadSignedByte, mips::A3, mips::A1, +0x7FFF); in TEST_F() local
909 __ LoadFromOffset(mips::kLoadSignedByte, mips::A3, mips::A1, -0xFFF0); in TEST_F() local
910 __ LoadFromOffset(mips::kLoadSignedByte, mips::A3, mips::A1, -0x8008); in TEST_F() local
911 __ LoadFromOffset(mips::kLoadSignedByte, mips::A3, mips::A1, -0x8001); in TEST_F() local
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Dassembler_mips.cc4690 void MipsAssembler::LoadFromOffset(LoadOperandType type, in LoadFromOffset() function in art::mips::MipsAssembler
4694 LoadFromOffset<>(type, reg, base, offset); in LoadFromOffset()
4716 LoadFromOffset(kLoadWord, dst.AsCoreRegister(), src_register, src_offset); in EmitLoad()
4719 LoadFromOffset(kLoadDoubleword, dst.AsRegisterPairLow(), src_register, src_offset); in EmitLoad()
4813 LoadFromOffset(kLoadWord, reg, SP, stack_offset); in RemoveFrame()
4817 LoadFromOffset(kLoadWord, RA, SP, stack_offset); in RemoveFrame()
4924 LoadFromOffset(kLoadWord, scratch.AsCoreRegister(), SP, in_off.Int32Value()); in StoreSpanning()
4939 LoadFromOffset(kLoadWord, dest.AsCoreRegister(), SP, src.Int32Value()); in LoadRef()
4946 LoadFromOffset(kLoadWord, dest.AsCoreRegister(), in LoadRef()
4956 LoadFromOffset(kLoadWord, dest.AsCoreRegister(), in LoadRawPtr()
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Dassembler_mips.h910 void LoadFromOffset(LoadOperandType type,
1092 void LoadFromOffset(LoadOperandType type, Register reg, Register base, int32_t offset);
/art/compiler/utils/mips64/
Dassembler_mips64_test.cc1537 TEST_F(AssemblerMIPS64Test, LoadFromOffset) { in TEST_F() argument
1538 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A0, 0); in TEST_F() local
1539 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0); in TEST_F() local
1540 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 1); in TEST_F() local
1541 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 256); in TEST_F() local
1542 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 1000); in TEST_F() local
1543 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0x7FFF); in TEST_F() local
1544 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0x8000); in TEST_F() local
1545 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0x8001); in TEST_F() local
1546 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0x10000); in TEST_F() local
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Dassembler_mips64.cc3529 void Mips64Assembler::LoadFromOffset(LoadOperandType type, in LoadFromOffset() function in art::mips64::Mips64Assembler
3533 LoadFromOffset<>(type, reg, base, offset); in LoadFromOffset()
3550 LoadFromOffset(kLoadWord, dst.AsGpuRegister(), src_register, src_offset); in EmitLoad()
3553 LoadFromOffset(kLoadDoubleword, dst.AsGpuRegister(), src_register, src_offset); in EmitLoad()
3646 LoadFromOffset(kLoadDoubleword, reg, SP, stack_offset); in RemoveFrame()
3650 LoadFromOffset(kLoadDoubleword, RA, SP, stack_offset); in RemoveFrame()
3742 LoadFromOffset(kLoadDoubleword, scratch.AsGpuRegister(), SP, in_off.Int32Value()); in StoreSpanning()
3757 LoadFromOffset(kLoadUnsignedWord, dest.AsGpuRegister(), SP, src.Int32Value()); in LoadRef()
3764 LoadFromOffset(kLoadUnsignedWord, dest.AsGpuRegister(), in LoadRef()
3775 LoadFromOffset(kLoadDoubleword, dest.AsGpuRegister(), in LoadRawPtr()
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Dassembler_mips64.h1120 void LoadFromOffset(LoadOperandType type,
1304 void LoadFromOffset(LoadOperandType type, GpuRegister reg, GpuRegister base, int32_t offset);
/art/compiler/trampolines/
Dtrampoline_compiler.cc145 __ LoadFromOffset(kLoadWord, T9, A0, offset.Int32Value()); in CreateTrampoline() local
148 __ LoadFromOffset(kLoadWord, T9, A0, JNIEnvExt::SelfOffset(4).Int32Value()); in CreateTrampoline() local
149 __ LoadFromOffset(kLoadWord, T9, T9, offset.Int32Value()); in CreateTrampoline() local
152 __ LoadFromOffset(kLoadWord, T9, S1, offset.Int32Value()); in CreateTrampoline() local
177 __ LoadFromOffset(kLoadDoubleword, T9, A0, offset.Int32Value()); in CreateTrampoline() local
180 __ LoadFromOffset(kLoadDoubleword, T9, A0, JNIEnvExt::SelfOffset(8).Int32Value()); in CreateTrampoline() local
181 __ LoadFromOffset(kLoadDoubleword, T9, T9, offset.Int32Value()); in CreateTrampoline() local
184 __ LoadFromOffset(kLoadDoubleword, T9, S1, offset.Int32Value()); in CreateTrampoline() local
/art/compiler/utils/arm/
Djni_macro_assembler_arm_vixl.cc252 asm_.LoadFromOffset(kLoadWord, scratch.AsVIXLRegister(), sp, in_off.Int32Value()); in StoreSpanning()
262 asm_.LoadFromOffset(kLoadWord, scratch.AsVIXLRegister(), sp, src.Int32Value()); in CopyRef()
274 asm_.LoadFromOffset(kLoadWord, in LoadRef()
321 asm_.LoadFromOffset(kLoadWord, dst.AsVIXLRegister(), tr, offs.Int32Value()); in LoadRawPtrFromThread()
331 asm_.LoadFromOffset(kLoadWord, scratch.AsVIXLRegister(), tr, thr_offs.Int32Value()); in CopyRawPtrFromThread()
418 asm_.LoadFromOffset(kLoadWord, temp.AsVIXLRegister(), sp, src.Int32Value()); in Copy()
421 asm_.LoadFromOffset(kLoadWord, temp.AsVIXLRegister(), sp, src.Int32Value()); in Copy()
423 asm_.LoadFromOffset(kLoadWord, temp.AsVIXLRegister(), sp, src.Int32Value() + 4); in Copy()
485 asm_.LoadFromOffset(kLoadWord, in CreateHandleScopeEntry()
528 asm_.LoadFromOffset(kLoadWord, scratch.AsVIXLRegister(), sp, handle_scope_offset.Int32Value()); in CreateHandleScopeEntry()
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Dassembler_arm_vixl.h210 void LoadFromOffset(LoadOperandType type,
Dassembler_arm_vixl.cc305 void ArmVIXLAssembler::LoadFromOffset(LoadOperandType type, in LoadFromOffset() function in art::arm::ArmVIXLAssembler
/art/compiler/utils/arm64/
Djni_macro_assembler_arm64.cc190 LoadFromOffset(scratch.AsXRegister(), SP, in_off.Int32Value()); in StoreSpanning()
240 void Arm64JNIMacroAssembler::LoadFromOffset(XRegister dest, XRegister base, int32_t offset) { in LoadFromOffset() function in art::arm64::Arm64JNIMacroAssembler
327 LoadFromOffset(dst.AsXRegister(), TR, offs.Int32Value()); in LoadRawPtrFromThread()
365 LoadFromOffset(scratch.AsXRegister(), TR, tr_offs.Int32Value()); in CopyRawPtrFromThread()
374 LoadFromOffset(scratch.AsXRegister(), SP, fr_offs.Int32Value()); in CopyRawPtrToThread()
398 LoadFromOffset(scratch.AsXRegister(), SP, src.Int32Value()); in Copy()
420 LoadFromOffset(scratch.AsXRegister(), base.AsXRegister(), src_offset.Int32Value()); in Copy()
442 LoadFromOffset(scratch.AsXRegister(), SP, src.Int32Value()); in Copy()
483 LoadFromOffset(scratch.AsXRegister(), src.AsXRegister(), src_offset.Int32Value()); in Copy()
539 LoadFromOffset(scratch.AsXRegister(), base.AsXRegister(), offs.Int32Value()); in Call()
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Djni_macro_assembler_arm64.h222 void LoadFromOffset(XRegister dest, XRegister base, int32_t offset);
/art/compiler/optimizing/
Dcode_generator_mips64.cc1051 __ LoadFromOffset(load_type, in Exchange() local
1055 __ LoadFromOffset(load_type, in Exchange() local
1094 __ LoadFromOffset( in GenerateFrameEntry() local
1160 __ LoadFromOffset(kLoadDoubleword, reg, SP, ofs); in GenerateFrameExit() local
1229 __ LoadFromOffset(load_type, in MoveLocation() local
1368 __ LoadFromOffset(kLoadWord, TMP, SP, source.GetStackIndex()); in MoveLocation() local
1371 __ LoadFromOffset(kLoadDoubleword, TMP, SP, source.GetStackIndex()); in MoveLocation() local
1427 __ LoadFromOffset(load_type, TMP, SP, mem_loc.GetStackIndex()); in SwapLocations() local
1485 __ LoadFromOffset(kLoadDoubleword, in MarkGCCard() local
1715 __ LoadFromOffset(kLoadDoubleword, GpuRegister(reg_id), SP, stack_index); in RestoreCoreRegister() local
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Dcode_generator_mips.cc1172 __ LoadFromOffset(kLoadWord, reg, SP, offset); in EmitSwap() local
1184 __ LoadFromOffset(kLoadWord, reg_l, SP, offset_l); in EmitSwap() local
1187 __ LoadFromOffset(kLoadWord, reg_h, SP, offset_h); in EmitSwap() local
1231 __ LoadFromOffset(kLoadWord, in Exchange() local
1235 __ LoadFromOffset(kLoadWord, in Exchange() local
1293 __ LoadFromOffset(kLoadWord, in GenerateFrameEntry() local
1364 __ LoadFromOffset(kLoadWord, reg, SP, ofs); in GenerateFrameExit() local
1425 __ LoadFromOffset(kLoadWord, destination.AsRegister<Register>(), SP, source.GetStackIndex()); in MoveLocation() local
1442 __ LoadFromOffset(kLoadDoubleword, r, SP, off); in MoveLocation() local
1494 __ LoadFromOffset(kLoadWord, TMP, SP, source.GetStackIndex()); in MoveLocation() local
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Dcode_generator_arm_vixl.cc942 arm_codegen->GetAssembler()->LoadFromOffset(kLoadWord, temp_, obj_, monitor_offset); in EmitNativeCode()
1084 arm_codegen->GetAssembler()->LoadFromOffset(kLoadWord, temp1_, obj_, monitor_offset); in EmitNativeCode()
2724 GetAssembler()->LoadFromOffset(kLoadWord, in Move32()
2750 GetAssembler()->LoadFromOffset(kLoadWord, temp, sp, source.GetStackIndex()); in Move32()
2820 GetAssembler()->LoadFromOffset(kLoadWord, kMethodRegister, sp, kArmWordSize); in HandleGoto()
3041 GetAssembler()->LoadFromOffset(kLoadWord, in VisitShouldDeoptimizeFlag()
3633 GetAssembler()->LoadFromOffset(kLoadWord, in VisitInvokeInterface()
3640 GetAssembler()->LoadFromOffset(kLoadWord, temp, temp, method_offset); in VisitInvokeInterface()
3644 GetAssembler()->LoadFromOffset(kLoadWord, lr, temp, entry_point); in VisitInvokeInterface()
3983 GetAssembler()->LoadFromOffset(kLoadWord, in VisitTypeConversion()
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Dintrinsics_mips64.cc1102 __ LoadFromOffset(kLoadUnsignedWord, in VisitThreadCurrentThread() local
2013 __ LoadFromOffset(kLoadWord, TMP, srcObj, count_offset); in VisitStringGetCharsNoCheck() local
2022 __ LoadFromOffset(kLoadUnsignedByte, TMP, srcPtr, value_offset); in VisitStringGetCharsNoCheck() local
2123 __ LoadFromOffset(kLoadWord, AT, input, length_offset); in CheckPosition() local
2128 __ LoadFromOffset(kLoadWord, AT, input, length_offset); in CheckPosition() local
2146 __ LoadFromOffset(kLoadWord, AT, input, length_offset); in CheckPosition() local
2616 __ LoadFromOffset(kLoadWord, out, TR, offset); in VisitThreadInterrupted() local
Dintrinsics_mips.cc1505 __ LoadFromOffset(kLoadWord, in VisitThreadCurrentThread() local
2706 __ LoadFromOffset(kLoadWord, TMP, srcObj, count_offset); in VisitStringGetCharsNoCheck() local
2715 __ LoadFromOffset(kLoadUnsignedByte, TMP, srcPtr, value_offset); in VisitStringGetCharsNoCheck() local
3021 __ LoadFromOffset(kLoadWord, AT, input, length_offset); in CheckPosition() local
3026 __ LoadFromOffset(kLoadWord, AT, input, length_offset); in CheckPosition() local
3044 __ LoadFromOffset(kLoadWord, AT, input, length_offset); in CheckPosition() local
3233 __ LoadFromOffset(kLoadWord, out, TR, offset); in VisitThreadInterrupted() local
/art/compiler/linker/arm/
Drelative_patcher_thumb2.cc366 assembler.LoadFromOffset( in CompileThunk()