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Searched refs:SDValue (Results 1 – 25 of 195) sorted by relevance

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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DLegalizeTypes.h83 DenseMap<SDValue, SDValue> PromotedIntegers;
87 DenseMap<SDValue, std::pair<SDValue, SDValue> > ExpandedIntegers;
91 DenseMap<SDValue, SDValue> SoftenedFloats;
95 DenseMap<SDValue, std::pair<SDValue, SDValue> > ExpandedFloats;
99 DenseMap<SDValue, SDValue> ScalarizedVectors;
103 DenseMap<SDValue, std::pair<SDValue, SDValue> > SplitVectors;
107 DenseMap<SDValue, SDValue> WidenedVectors;
111 DenseMap<SDValue, SDValue> ReplacedValues;
135 ReplacedValues[SDValue(Old, i)] = SDValue(New, i); in NoteDeletion()
140 void AnalyzeNewValue(SDValue &Val);
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/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeTypes.h97 SmallDenseMap<SDValue, SDValue, 8> PromotedIntegers;
101 SmallDenseMap<SDValue, std::pair<SDValue, SDValue>, 8> ExpandedIntegers;
105 SmallDenseMap<SDValue, SDValue, 8> SoftenedFloats;
109 SmallDenseMap<SDValue, SDValue, 8> PromotedFloats;
113 SmallDenseMap<SDValue, std::pair<SDValue, SDValue>, 8> ExpandedFloats;
117 SmallDenseMap<SDValue, SDValue, 8> ScalarizedVectors;
121 SmallDenseMap<SDValue, std::pair<SDValue, SDValue>, 8> SplitVectors;
125 SmallDenseMap<SDValue, SDValue, 8> WidenedVectors;
129 SmallDenseMap<SDValue, SDValue, 8> ReplacedValues;
152 ReplacedValues[SDValue(Old, i)] = SDValue(New, i); in NoteDeletion()
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/external/llvm/lib/Target/Mips/
DMipsSEISelDAGToDAG.h34 unsigned getMSACtrlReg(const SDValue RegIdx) const;
42 void selectAddESubE(unsigned MOp, SDValue InFlag, SDValue CmpLHS,
45 bool selectAddrFrameIndex(SDValue Addr, SDValue &Base, SDValue &Offset) const;
46 bool selectAddrFrameIndexOffset(SDValue Addr, SDValue &Base, SDValue &Offset,
49 bool selectAddrRegImm(SDValue Addr, SDValue &Base,
50 SDValue &Offset) const override;
52 bool selectAddrDefault(SDValue Addr, SDValue &Base,
53 SDValue &Offset) const override;
55 bool selectIntAddr(SDValue Addr, SDValue &Base,
56 SDValue &Offset) const override;
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DMipsISelDAGToDAG.h57 virtual bool selectAddrRegImm(SDValue Addr, SDValue &Base,
58 SDValue &Offset) const;
61 virtual bool selectAddrDefault(SDValue Addr, SDValue &Base,
62 SDValue &Offset) const;
65 virtual bool selectIntAddr(SDValue Addr, SDValue &Base,
66 SDValue &Offset) const;
68 virtual bool selectIntAddr11MM(SDValue Addr, SDValue &Base,
69 SDValue &Offset) const;
71 virtual bool selectIntAddr12MM(SDValue Addr, SDValue &Base,
72 SDValue &Offset) const;
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DMipsISelDAGToDAG.cpp69 bool MipsDAGToDAGISel::selectAddrRegImm(SDValue Addr, SDValue &Base, in selectAddrRegImm()
70 SDValue &Offset) const { in selectAddrRegImm()
75 bool MipsDAGToDAGISel::selectAddrDefault(SDValue Addr, SDValue &Base, in selectAddrDefault()
76 SDValue &Offset) const { in selectAddrDefault()
81 bool MipsDAGToDAGISel::selectIntAddr(SDValue Addr, SDValue &Base, in selectIntAddr()
82 SDValue &Offset) const { in selectIntAddr()
87 bool MipsDAGToDAGISel::selectIntAddr11MM(SDValue Addr, SDValue &Base, in selectIntAddr11MM()
88 SDValue &Offset) const { in selectIntAddr11MM()
93 bool MipsDAGToDAGISel::selectIntAddr12MM(SDValue Addr, SDValue &Base, in selectIntAddr12MM()
94 SDValue &Offset) const { in selectIntAddr12MM()
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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DSelectionDAG.h146 SDValue Root;
249 const SDValue &getRoot() const { return Root; }
253 SDValue getEntryNode() const {
254 return SDValue(const_cast<SDNode *>(&EntryNode), 0);
259 const SDValue &setRoot(SDValue N) {
325 SDValue getConstant(uint64_t Val, EVT VT, bool isTarget = false);
326 SDValue getConstant(const APInt &Val, EVT VT, bool isTarget = false);
327 SDValue getConstant(const ConstantInt &Val, EVT VT, bool isTarget = false);
328 SDValue getIntPtrConstant(uint64_t Val, bool isTarget = false);
329 SDValue getTargetConstant(uint64_t Val, EVT VT) {
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/external/llvm/include/llvm/CodeGen/
DSelectionDAG.h192 SDValue Root;
287 void createOperands(SDNode *Node, ArrayRef<SDValue> Vals) {
376 const SDValue &getRoot() const { return Root; }
379 SDValue getEntryNode() const {
380 return SDValue(const_cast<SDNode *>(&EntryNode), 0);
385 const SDValue &setRoot(SDValue N) {
477 SDValue getConstant(uint64_t Val, const SDLoc &DL, EVT VT,
479 SDValue getConstant(const APInt &Val, const SDLoc &DL, EVT VT,
481 SDValue getConstant(const ConstantInt &Val, const SDLoc &DL, EVT VT,
483 SDValue getIntPtrConstant(uint64_t Val, const SDLoc &DL,
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DSelectionDAGTargetInfo.h49 virtual SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, in EmitTargetCodeForMemcpy()
50 SDValue Chain, SDValue Op1, in EmitTargetCodeForMemcpy()
51 SDValue Op2, SDValue Op3, in EmitTargetCodeForMemcpy()
56 return SDValue(); in EmitTargetCodeForMemcpy()
65 virtual SDValue EmitTargetCodeForMemmove( in EmitTargetCodeForMemmove()
66 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, in EmitTargetCodeForMemmove()
67 SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, in EmitTargetCodeForMemmove()
69 return SDValue(); in EmitTargetCodeForMemmove()
78 virtual SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl, in EmitTargetCodeForMemset()
79 SDValue Chain, SDValue Op1, in EmitTargetCodeForMemset()
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCISelLowering.h233 SDValue get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG);
254 virtual bool getPreIndexedAddressParts(SDNode *N, SDValue &Base,
255 SDValue &Offset,
262 bool SelectAddressRegReg(SDValue N, SDValue &Base, SDValue &Index,
268 bool SelectAddressRegImm(SDValue N, SDValue &Disp, SDValue &Base,
273 bool SelectAddressRegRegOnly(SDValue N, SDValue &Base, SDValue &Index,
279 bool SelectAddressRegImmShift(SDValue N, SDValue &Disp, SDValue &Base,
285 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
290 virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
293 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
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/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.h31 SDValue LowerConstantInitializer(const Constant* Init, const GlobalValue *GV,
32 const SDValue &InitPtr,
33 SDValue Chain,
35 SDValue LowerEXTRACT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const;
36 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
37 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
40 SDValue MergeVectorStore(const SDValue &Op, SelectionDAG &DAG) const;
44 SDValue LowerFREM(SDValue Op, SelectionDAG &DAG) const;
45 SDValue LowerFCEIL(SDValue Op, SelectionDAG &DAG) const;
46 SDValue LowerFTRUNC(SDValue Op, SelectionDAG &DAG) const;
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DR600ISelLowering.h34 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
35 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
37 SmallVectorImpl<SDValue> &Results,
39 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
43 SmallVectorImpl<SDValue> &InVals) const override;
57 SDValue LowerImplicitParameter(SelectionDAG &DAG, EVT VT, const SDLoc &DL,
62 SDValue OptimizeSwizzle(SDValue BuildVector, SDValue Swz[], SelectionDAG &DAG,
64 SDValue vectorToVerticalVector(SelectionDAG &DAG, SDValue Vector) const;
66 SDValue lowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
67 SDValue LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
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DAMDGPUISelDAGToDAG.cpp46 SDValue Cond = N->getOperand(1); in isCBranchSCC()
71 bool FoldOperand(SDValue &Src, SDValue &Sel, SDValue &Neg, SDValue &Abs,
73 bool FoldOperands(unsigned, const R600InstrInfo *, std::vector<SDValue> &);
74 bool FoldDotOperands(unsigned, const R600InstrInfo *, std::vector<SDValue> &);
82 bool SelectGlobalValueConstantOffset(SDValue Addr, SDValue& IntPtr);
83 bool SelectGlobalValueVariableOffset(SDValue Addr, SDValue &BaseReg,
84 SDValue& Offset);
85 bool SelectADDRVTX_READ(SDValue Addr, SDValue &Base, SDValue &Offset);
86 bool SelectADDRIndirect(SDValue Addr, SDValue &Base, SDValue &Offset);
87 bool isDSOffsetLegal(const SDValue &Base, unsigned Offset,
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DSIISelLowering.h24 SDValue LowerParameterPtr(SelectionDAG &DAG, const SDLoc &SL, SDValue Chain,
26 SDValue LowerParameter(SelectionDAG &DAG, EVT VT, EVT MemVT, const SDLoc &SL,
27 SDValue Chain, unsigned Offset, bool Signed) const;
28 SDValue LowerGlobalAddress(AMDGPUMachineFunction *MFI, SDValue Op,
30 SDValue lowerImplicitZextParam(SelectionDAG &DAG, SDValue Op,
33 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
34 SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG) const;
35 SDValue LowerINTRINSIC_VOID(SDValue Op, SelectionDAG &DAG) const;
36 SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
37 SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const;
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/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86ISelLowering.h486 bool isZeroNode(SDValue Elt);
517 virtual SDValue getPICJumpTableRelocBase(SDValue Table,
558 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
563 virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
567 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
579 virtual bool IsDesirableToPromoteOp(SDValue Op, EVT &PVT) const;
596 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
605 virtual unsigned ComputeNumSignBitsForTargetNode(SDValue Op,
611 SDValue getReturnAddressFrameIndex(SelectionDAG &DAG) const;
628 virtual void LowerAsmOperandForConstraint(SDValue Op,
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/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.h449 SDValue get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG);
519 bool getPreIndexedAddressParts(SDNode *N, SDValue &Base,
520 SDValue &Offset,
527 bool SelectAddressRegReg(SDValue N, SDValue &Base, SDValue &Index,
534 bool SelectAddressRegImm(SDValue N, SDValue &Disp, SDValue &Base,
539 bool SelectAddressRegRegOnly(SDValue N, SDValue &Base, SDValue &Index,
546 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
551 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
554 SDValue expandVSXLoadForLE(SDNode *N, DAGCombinerInfo &DCI) const;
555 SDValue expandVSXStoreForLE(SDNode *N, DAGCombinerInfo &DCI) const;
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/external/llvm/lib/Target/XCore/
DXCoreISelLowering.h100 bool isZExtFree(SDValue Val, EVT VT2) const override;
109 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
114 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
147 SDValue LowerCCCArguments(SDValue Chain, CallingConv::ID CallConv,
151 SmallVectorImpl<SDValue> &InVals) const;
152 SDValue LowerCCCCallTo(SDValue Chain, SDValue Callee,
156 const SmallVectorImpl<SDValue> &OutVals,
159 SmallVectorImpl<SDValue> &InVals) const;
160 SDValue getReturnAddressFrameIndex(SelectionDAG &DAG) const;
161 SDValue getGlobalAddressWrapper(SDValue GA, const GlobalValue *GV,
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/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.h411 void LowerAsmOperandForConstraint(SDValue Op,
413 std::vector<SDValue> &Ops,
458 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
461 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
465 SmallVectorImpl<SDValue> &InVals) const override;
466 SDValue LowerCall(CallLoweringInfo &CLI,
467 SmallVectorImpl<SDValue> &InVals) const override;
473 SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
475 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL,
477 SDValue prepareVolatileOrAtomicLoad(SDValue Chain, const SDLoc &DL,
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DSystemZSelectionDAGInfo.h27 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &DL,
28 SDValue Chain, SDValue Dst, SDValue Src,
29 SDValue Size, unsigned Align, bool IsVolatile,
34 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &DL,
35 SDValue Chain, SDValue Dst, SDValue Byte,
36 SDValue Size, unsigned Align, bool IsVolatile,
39 std::pair<SDValue, SDValue>
40 EmitTargetCodeForMemcmp(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain,
41 SDValue Src1, SDValue Src2, SDValue Size,
45 std::pair<SDValue, SDValue>
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/external/llvm/lib/Target/ARM/
DARMISelLowering.h236 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
241 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
262 SDValue PerformCMOVCombine(SDNode *N, SelectionDAG &DAG) const;
263 SDValue PerformBRCONDCombine(SDNode *N, SelectionDAG &DAG) const;
264 SDValue PerformCMOVToBFICombine(SDNode *N, SelectionDAG &DAG) const;
265 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
283 bool isZExtFree(SDValue Val, EVT VT2) const override;
285 bool isVectorLoadExtDesirable(SDValue ExtVal) const override;
311 bool getPreIndexedAddressParts(SDNode *N, SDValue &Base, SDValue &Offset,
318 bool getPostIndexedAddressParts(SDNode *N, SDNode *Op, SDValue &Base,
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/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.h235 void computeKnownBitsForTargetNode(const SDValue Op, APInt &KnownZero,
248 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
252 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
277 SDValue ReconstructShuffle(SDValue Op, SelectionDAG &DAG) const;
296 bool isZExtFree(SDValue Val, EVT VT2) const override;
428 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
432 SmallVectorImpl<SDValue> &InVals) const override;
434 SDValue LowerCall(CallLoweringInfo & /*CLI*/,
435 SmallVectorImpl<SDValue> &InVals) const override;
437 SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
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/external/swiftshader/third_party/LLVM/lib/Target/XCore/
DXCoreISelLowering.h87 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
92 virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
111 SDValue LowerCCCArguments(SDValue Chain,
116 SmallVectorImpl<SDValue> &InVals) const;
117 SDValue LowerCCCCallTo(SDValue Chain, SDValue Callee,
121 const SmallVectorImpl<SDValue> &OutVals,
124 SmallVectorImpl<SDValue> &InVals) const;
125 SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
129 SmallVectorImpl<SDValue> &InVals) const;
130 SDValue getReturnAddressFrameIndex(SelectionDAG &DAG) const;
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/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.h108 bool IsEligibleForTailCallOptimization(SDValue Callee,
111 const SmallVectorImpl<SDValue> &OutVals,
123 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
125 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
126 SDValue LowerEXTRACT_VECTOR(SDValue Op, SelectionDAG &DAG) const;
127 SDValue LowerINSERT_VECTOR(SDValue Op, SelectionDAG &DAG) const;
128 SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;
129 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
130 SDValue LowerINLINEASM(SDValue Op, SelectionDAG &DAG) const;
131 SDValue LowerPREFETCH(SDValue Op, SelectionDAG &DAG) const;
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/external/llvm/lib/Target/Lanai/
DLanaiISelLowering.h73 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
79 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
80 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
81 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
82 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
83 SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
84 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
85 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
86 SDValue LowerMUL(SDValue Op, SelectionDAG &DAG) const;
87 SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const;
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMISelLowering.h242 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
247 virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
262 SDValue PerformCMOVCombine(SDNode *N, SelectionDAG &DAG) const;
263 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
292 virtual bool getPreIndexedAddressParts(SDNode *N, SDValue &Base,
293 SDValue &Offset,
301 SDValue &Base, SDValue &Offset,
305 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
330 virtual void LowerAsmOperandForConstraint(SDValue Op,
332 std::vector<SDValue> &Ops,
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/external/llvm/lib/Target/MSP430/
DMSP430ISelLowering.h80 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
86 SDValue LowerShifts(SDValue Op, SelectionDAG &DAG) const;
87 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
88 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
89 SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const;
90 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
91 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const;
92 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
93 SDValue LowerSIGN_EXTEND(SDValue Op, SelectionDAG &DAG) const;
94 SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const;
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