/external/llvm/lib/Target/AMDGPU/ |
D | SIMachineScheduler.cpp | 179 NodeNum2Index[SU->NodeNum] = SUnits.size(); in addUnit() 180 SUnits.push_back(SU); in addUnit() 273 for (SUnit* SU : SUnits) { in fastSchedule() 391 for (SUnit* SU : SUnits) { in schedule() 409 assert(SUnits.size() == ScheduledSUnits.size() && in schedule() 411 for (SUnit* SU : SUnits) { in schedule() 421 for (SUnit* SU : SUnits) { in undoSchedule() 428 HasLowLatencyNonWaitedParent.assign(SUnits.size(), 0); in undoSchedule() 491 HasLowLatencyNonWaitedParent.assign(SUnits.size(), 0); in nodeScheduled() 506 for (SUnit* SU : SUnits) { in finalizeUnits() [all …]
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D | SIMachineScheduler.h | 56 std::vector<SUnit*> SUnits; variable 96 DAG(DAG), BC(BC), SUnits(), TopReadySUs(), ScheduledSUnits(), in SIScheduleBlock() 130 int getCost() { return SUnits.size(); } in getCost()
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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
D | LatencyPriorityQueue.h | 34 std::vector<SUnit> *SUnits; variable 53 SUnits = &sunits; in initNodes() 54 NumNodesSolelyBlocking.resize(SUnits->size(), 0); in initNodes() 58 NumNodesSolelyBlocking.resize(SUnits->size(), 0); in addNode() 65 SUnits = 0; in releaseState() 69 assert(NodeNum < (*SUnits).size()); in getLatency() 70 return (*SUnits)[NodeNum].getHeight(); in getLatency()
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D | ScheduleDAG.h | 439 virtual void initNodes(std::vector<SUnit> &SUnits) = 0; 496 std::vector<SUnit> SUnits; // The scheduling units. 651 return G->SUnits.begin(); 654 return G->SUnits.end(); 666 std::vector<SUnit> &SUnits; 688 explicit ScheduleDAGTopologicalSort(std::vector<SUnit> &SUnits);
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/external/llvm/include/llvm/CodeGen/ |
D | LatencyPriorityQueue.h | 34 std::vector<SUnit> *SUnits; variable 53 SUnits = &sunits; in initNodes() 54 NumNodesSolelyBlocking.resize(SUnits->size(), 0); in initNodes() 58 NumNodesSolelyBlocking.resize(SUnits->size(), 0); in addNode() 65 SUnits = nullptr; in releaseState() 69 assert(NodeNum < (*SUnits).size()); in getLatency() 70 return (*SUnits)[NodeNum].getHeight(); in getLatency()
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D | ScheduleDAGInstrs.h | 343 const SUnit *Addr = SUnits.empty() ? nullptr : &SUnits[0]; in newSUnit() 345 SUnits.emplace_back(MI, (unsigned)SUnits.size()); in newSUnit() 346 assert((Addr == nullptr || Addr == &SUnits[0]) && in newSUnit() 348 SUnits.back().OrigNode = &SUnits.back(); in newSUnit() 349 return &SUnits.back(); in newSUnit()
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D | ResourcePriorityQueue.h | 40 std::vector<SUnit> *SUnits; variable 85 NumNodesSolelyBlocking.resize(SUnits->size(), 0); in addNode() 91 SUnits = nullptr; in releaseState() 95 assert(NodeNum < (*SUnits).size()); in getLatency() 96 return (*SUnits)[NodeNum].getHeight(); in getLatency()
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D | ScheduleDAG.h | 530 virtual void initNodes(std::vector<SUnit> &SUnits) = 0; 583 std::vector<SUnit> SUnits; // The scheduling units. 696 return G->SUnits.begin(); 699 return G->SUnits.end(); 711 std::vector<SUnit> &SUnits; 734 ScheduleDAGTopologicalSort(std::vector<SUnit> &SUnits, SUnit *ExitSU);
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/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
D | ScheduleDAG.cpp | 71 SUnits.clear(); in Run() 356 for (unsigned i = 0, e = SUnits.size(); i != e; ++i) { in VerifySchedule() 357 if (!SUnits[i].isScheduled) { in VerifySchedule() 358 if (SUnits[i].NumPreds == 0 && SUnits[i].NumSuccs == 0) { in VerifySchedule() 364 SUnits[i].dump(this); in VerifySchedule() 368 if (SUnits[i].isScheduled && in VerifySchedule() 369 (isBottomUp ? SUnits[i].getHeight() : SUnits[i].getDepth()) > in VerifySchedule() 373 SUnits[i].dump(this); in VerifySchedule() 379 if (SUnits[i].NumSuccsLeft != 0) { in VerifySchedule() 382 SUnits[i].dump(this); in VerifySchedule() [all …]
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D | ScheduleDAGInstrs.h | 152 const SUnit *Addr = SUnits.empty() ? 0 : &SUnits[0]; in NewSUnit() 154 SUnits.push_back(SUnit(MI, (unsigned)SUnits.size())); in NewSUnit() 155 assert((Addr == 0 || Addr == &SUnits[0]) && in NewSUnit() 157 SUnits.back().OrigNode = &SUnits.back(); in NewSUnit() 158 return &SUnits.back(); in NewSUnit()
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D | PostRASchedulerList.cpp | 188 : ScheduleDAGInstrs(MF, MLI, MDT), Topo(SUnits), AA(AA), in SchedulePostRATDList() 312 AntiDepBreak->BreakAntiDependencies(SUnits, Begin, InsertPos, in Schedule() 322 SUnits.clear(); in Schedule() 333 DEBUG(for (unsigned su = 0, e = SUnits.size(); su != e; ++su) in Schedule() 334 SUnits[su].dumpAll(this)); in Schedule() 336 AvailableQueue.initNodes(SUnits); in Schedule() 606 for (unsigned i = 0, e = SUnits.size(); i != e; ++i) { in ListScheduleTopDown() 608 bool available = SUnits[i].Preds.empty(); in ListScheduleTopDown() 610 AvailableQueue.push(&SUnits[i]); in ListScheduleTopDown() 611 SUnits[i].isAvailable = true; in ListScheduleTopDown() [all …]
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D | CriticalAntiDepBreaker.cpp | 419 BreakAntiDependencies(const std::vector<SUnit>& SUnits, in BreakAntiDependencies() argument 426 if (SUnits.empty()) return 0; in BreakAntiDependencies() 434 for (unsigned i = 0, e = SUnits.size(); i != e; ++i) { in BreakAntiDependencies() 435 const SUnit *SU = &SUnits[i]; in BreakAntiDependencies()
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/external/llvm/lib/CodeGen/ |
D | ScheduleDAG.cpp | 51 SUnits.clear(); in clearDAG() 385 for (unsigned i = 0, e = SUnits.size(); i != e; ++i) { in VerifyScheduledDAG() 386 if (!SUnits[i].isScheduled) { in VerifyScheduledDAG() 387 if (SUnits[i].NumPreds == 0 && SUnits[i].NumSuccs == 0) { in VerifyScheduledDAG() 393 SUnits[i].dump(this); in VerifyScheduledDAG() 397 if (SUnits[i].isScheduled && in VerifyScheduledDAG() 398 (isBottomUp ? SUnits[i].getHeight() : SUnits[i].getDepth()) > in VerifyScheduledDAG() 402 SUnits[i].dump(this); in VerifyScheduledDAG() 408 if (SUnits[i].NumSuccsLeft != 0) { in VerifyScheduledDAG() 411 SUnits[i].dump(this); in VerifyScheduledDAG() [all …]
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D | PostRASchedulerList.cpp | 397 AntiDepBreak->BreakAntiDependencies(SUnits, RegionBegin, RegionEnd, in schedule() 418 for (const SUnit &SU : SUnits) { in schedule() 424 AvailableQueue.initNodes(SUnits); in schedule() 541 for (unsigned i = 0, e = SUnits.size(); i != e; ++i) { in ListScheduleTopDown() 543 if (!SUnits[i].NumPredsLeft && !SUnits[i].isAvailable) { in ListScheduleTopDown() 544 AvailableQueue.push(&SUnits[i]); in ListScheduleTopDown() 545 SUnits[i].isAvailable = true; in ListScheduleTopDown() 556 Sequence.reserve(SUnits.size()); in ListScheduleTopDown()
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D | MachinePipeliner.cpp | 236 std::vector<SUnit> &SUnits; member in __anone7df25700111::SwingSchedulerDAG::Circuits 246 : SUnits(SUs), Stack(), Blocked(SUs.size()), B(SUs.size()), in Circuits() 252 B.assign(SUnits.size(), SmallPtrSet<SUnit *, 4>()); in reset() 265 Topo(SUnits, &ExitSU) {} in SwingSchedulerDAG() 827 for (unsigned su = 0, e = SUnits.size(); su != e; ++su) in schedule() 828 SUnits[su].dumpAll(this); in schedule() 998 for (auto &SU : SUnits) { in addLoopCarriedDependences() 1080 for (SUnit &I : SUnits) { in updatePhiDependences() 1162 for (SUnit &I : SUnits) { in changeDependences() 1371 static void swapAntiDependences(std::vector<SUnit> &SUnits) { in swapAntiDependences() argument [all …]
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D | CriticalAntiDepBreaker.cpp | 423 BreakAntiDependencies(const std::vector<SUnit>& SUnits, in BreakAntiDependencies() argument 430 if (SUnits.empty()) return 0; in BreakAntiDependencies() 440 for (unsigned i = 0, e = SUnits.size(); i != e; ++i) { in BreakAntiDependencies() 441 const SUnit *SU = &SUnits[i]; in BreakAntiDependencies()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | ScheduleDAGList.cpp | 95 AvailableQueue->initNodes(SUnits); in Schedule() 165 for (unsigned i = 0, e = SUnits.size(); i != e; ++i) { in ListScheduleTopDown() 167 if (SUnits[i].Preds.empty()) { in ListScheduleTopDown() 168 AvailableQueue->push(&SUnits[i]); in ListScheduleTopDown() 169 SUnits[i].isAvailable = true; in ListScheduleTopDown() 176 Sequence.reserve(SUnits.size()); in ListScheduleTopDown()
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D | ScheduleDAGSDNodes.cpp | 63 if (!SUnits.empty()) in NewSUnit() 64 Addr = &SUnits[0]; in NewSUnit() 66 SUnits.push_back(SUnit(N, (unsigned)SUnits.size())); in NewSUnit() 67 assert((Addr == 0 || Addr == &SUnits[0]) && in NewSUnit() 69 SUnits.back().OrigNode = &SUnits.back(); in NewSUnit() 70 SUnit *SU = &SUnits.back(); in NewSUnit() 282 SUnits.reserve(NumNodes * 2); in BuildSchedUnits() 375 SUnit *SrcSU = &SUnits[SrcN->getNodeId()]; in BuildSchedUnits() 388 for (unsigned su = 0, e = SUnits.size(); su != e; ++su) { in AddSchedEdges() 389 SUnit *SU = &SUnits[su]; in AddSchedEdges() [all …]
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D | ScheduleDAGRRList.cpp | 171 Topo(SUnits) { in ScheduleDAGRRList() 252 unsigned NumSUnits = SUnits.size(); in CreateNewSUnit() 263 unsigned NumSUnits = SUnits.size(); in CreateClone() 338 DEBUG(for (unsigned su = 0, e = SUnits.size(); su != e; ++su) in Schedule() 339 SUnits[su].dumpAll(this)); in Schedule() 342 AvailableQueue->initNodes(SUnits); in Schedule() 826 LoadSU = &SUnits[LoadNode->getNodeId()]; in CopyAndMoveSuccessors() 1270 if (!SUnits.empty()) { in ListScheduleBottomUp() 1271 SUnit *RootSU = &SUnits[DAG->getRoot().getNode()->getNodeId()]; in ListScheduleBottomUp() 1279 Sequence.reserve(SUnits.size()); in ListScheduleBottomUp() [all …]
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D | ScheduleDAGFast.cpp | 121 DEBUG(for (unsigned su = 0, e = SUnits.size(); su != e; ++su) in Schedule() 122 SUnits[su].dumpAll(this)); in Schedule() 268 LoadSU = &SUnits[LoadNode->getNodeId()]; in CopyAndMoveSuccessors() 528 if (!SUnits.empty()) { in ListScheduleBottomUp() 529 SUnit *RootSU = &SUnits[DAG->getRoot().getNode()->getNodeId()]; in ListScheduleBottomUp() 539 Sequence.reserve(SUnits.size()); in ListScheduleBottomUp()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | ScheduleDAGVLIW.cpp | 103 AvailableQueue->initNodes(SUnits); in Schedule() 176 for (unsigned i = 0, e = SUnits.size(); i != e; ++i) { in listScheduleTopDown() 178 if (SUnits[i].Preds.empty()) { in listScheduleTopDown() 179 AvailableQueue->push(&SUnits[i]); in listScheduleTopDown() 180 SUnits[i].isAvailable = true; in listScheduleTopDown() 187 Sequence.reserve(SUnits.size()); in listScheduleTopDown()
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D | ScheduleDAGSDNodes.cpp | 71 if (!SUnits.empty()) in newSUnit() 72 Addr = &SUnits[0]; in newSUnit() 74 SUnits.emplace_back(N, (unsigned)SUnits.size()); in newSUnit() 75 assert((Addr == nullptr || Addr == &SUnits[0]) && in newSUnit() 77 SUnits.back().OrigNode = &SUnits.back(); in newSUnit() 78 SUnit *SU = &SUnits.back(); in newSUnit() 320 SUnits.reserve(NumNodes * 2); in BuildSchedUnits() 413 SUnit *SrcSU = &SUnits[SrcN->getNodeId()]; in BuildSchedUnits() 426 for (unsigned su = 0, e = SUnits.size(); su != e; ++su) { in AddSchedEdges() 427 SUnit *SU = &SUnits[su]; in AddSchedEdges() [all …]
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D | ScheduleDAGRRList.cpp | 167 Topo(SUnits, nullptr) { in ScheduleDAGRRList() 244 unsigned NumSUnits = SUnits.size(); in CreateNewSUnit() 255 unsigned NumSUnits = SUnits.size(); in CreateClone() 339 DEBUG(for (SUnit &SU : SUnits) in Schedule() 343 AvailableQueue->initNodes(SUnits); in Schedule() 558 SUnit *Def = &SUnits[N->getNodeId()]; in ReleasePredecessors() 997 LoadSU = &SUnits[LoadNode->getNodeId()]; in CopyAndMoveSuccessors() 1492 if (!SUnits.empty()) { in ListScheduleBottomUp() 1493 SUnit *RootSU = &SUnits[DAG->getRoot().getNode()->getNodeId()]; in ListScheduleBottomUp() 1501 Sequence.reserve(SUnits.size()); in ListScheduleBottomUp() [all …]
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D | ScheduleDAGFast.cpp | 127 DEBUG(for (unsigned su = 0, e = SUnits.size(); su != e; ++su) in Schedule() 128 SUnits[su].dumpAll(this)); in Schedule() 273 LoadSU = &SUnits[LoadNode->getNodeId()]; in CopyAndMoveSuccessors() 539 if (!SUnits.empty()) { in ListScheduleBottomUp() 540 SUnit *RootSU = &SUnits[DAG->getRoot().getNode()->getNodeId()]; in ListScheduleBottomUp() 550 Sequence.reserve(SUnits.size()); in ListScheduleBottomUp()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonMachineScheduler.cpp | 28 for (unsigned su = 0, e = SUnits.size(); su != e; ++su) { in postprocessDAG() 30 if (SUnits[su].getInstr()->isCall()) in postprocessDAG() 31 LastSequentialCall = &(SUnits[su]); in postprocessDAG() 33 else if (SUnits[su].getInstr()->isCompare() && LastSequentialCall) in postprocessDAG() 34 SUnits[su].addPred(SDep(LastSequentialCall, SDep::Barrier)); in postprocessDAG() 167 for (unsigned su = 0, e = SUnits.size(); su != e; ++su) in schedule() 168 if (SUnits[su].getHeight() > maxH) in schedule() 169 maxH = SUnits[su].getHeight(); in schedule() 172 for (unsigned su = 0, e = SUnits.size(); su != e; ++su) in schedule() 173 if (SUnits[su].getDepth() > maxD) in schedule() [all …]
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