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/external/libcxx/test/std/utilities/meta/meta.trans/meta.trans.other/
Daligned_storage.pass.cpp21 typedef std::aligned_storage<10, 1 >::type T1; in main() typedef
23 static_assert(std::is_same<std::aligned_storage_t<10, 1>, T1>::value, "" ); in main()
25 static_assert(std::alignment_of<T1>::value == 1, ""); in main()
26 static_assert(sizeof(T1) == 10, ""); in main()
29 typedef std::aligned_storage<10, 2 >::type T1; in main() typedef
31 static_assert(std::is_same<std::aligned_storage_t<10, 2>, T1>::value, "" ); in main()
33 static_assert(std::alignment_of<T1>::value == 2, ""); in main()
34 static_assert(sizeof(T1) == 10, ""); in main()
37 typedef std::aligned_storage<10, 4 >::type T1; in main() typedef
39 static_assert(std::is_same<std::aligned_storage_t<10, 4>, T1>::value, "" ); in main()
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Daligned_union.pass.cpp23 typedef std::aligned_union<10, char >::type T1; in main() typedef
25 static_assert(std::is_same<std::aligned_union_t<10, char>, T1>::value, "" ); in main()
27 static_assert(std::alignment_of<T1>::value == 1, ""); in main()
28 static_assert(sizeof(T1) == 10, ""); in main()
31 typedef std::aligned_union<10, short >::type T1; in main() typedef
33 static_assert(std::is_same<std::aligned_union_t<10, short>, T1>::value, "" ); in main()
35 static_assert(std::alignment_of<T1>::value == 2, ""); in main()
36 static_assert(sizeof(T1) == 10, ""); in main()
39 typedef std::aligned_union<10, int >::type T1; in main() typedef
41 static_assert(std::is_same<std::aligned_union_t<10, int>, T1>::value, "" ); in main()
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Dcommon_type.pass.cpp74 template <class T1, class T2>
76 static_assert(std::is_same<Decay<T1>, T1>::value, "must be same");
79 decltype(false ? std::declval<T1>() : std::declval<T2>())
83 template <class T1, class T2>
84 using TernaryOp = typename TernaryOpImp<T1, T2>::type;
125 using T1 = S<int> const; in test_bullet_three_one() typedef
127 test_bullet_three_one_imp<T1, T2, S<int> >(); in test_bullet_three_one()
131 using T1 = ::S<long> const; in test_bullet_three_one() typedef
133 static_assert(no_common_type<T1, T2>::value, ""); in test_bullet_three_one()
134 static_assert(no_common_type<T2, T1>::value, ""); in test_bullet_three_one()
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/external/boringssl/src/crypto/fipsmodule/modes/asm/
Dghash-x86_64.pl420 ($T1,$T2,$T3)=("%xmm3","%xmm4","%xmm5");
428 pshufd \$0b01001110,$Xi,$T1
430 pxor $Xi,$T1 #
436 pshufd \$0b01001110,$Xi,$T1
437 pxor $Xi,$T1 #
443 pclmulqdq \$0x00,$HK,$T1 #######
444 pxor $Xi,$T1 #
445 pxor $Xhi,$T1 #
447 movdqa $T1,$T2 #
448 psrldq \$8,$T1
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Daesni-gcm-x86_64.pl76 ($Ii,$T1,$T2,$Hkey,
94 vpaddb $T2,$T1,$inout1
99 vpxor $rndkey,$T1,$inout0
108 vpaddb $T2,$inout5,$T1 # next counter value
113 vmovdqu $T1,($ivp) # save next counter value
141 vpclmulqdq \$0x00,$Hkey,$Z3,$T1
154 vpxor $Z1,$T1,$Z0
157 vpclmulqdq \$0x10,$Hkey,$Ii,$T1
178 vpxor $T1,$Z2,$Z2
179 vpclmulqdq \$0x00,$Z1,$Ii,$T1
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Dghash-x86.pl606 ($T1,$T2,$T3)=("xmm3","xmm4","xmm5");
615 &pshufd ($T1,$Xi,0b01001110);
617 &pxor ($T1,$Xi); #
623 &pclmulqdq ($T1,$HK,0x00); #######
624 &xorps ($T1,$Xi); #
625 &xorps ($T1,$Xhi); #
627 &movdqa ($T2,$T1); #
628 &psrldq ($T1,8);
630 &pxor ($Xhi,$T1);
642 &movdqa ($T1,$Xi); #
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/external/libcxx/test/std/utilities/tuple/tuple.tuple/tuple.rel/
Deq.pass.cpp29 typedef std::tuple<> T1; in main() typedef
31 const T1 t1; in main()
37 typedef std::tuple<int> T1; in main() typedef
39 const T1 t1(1); in main()
45 typedef std::tuple<int> T1; in main() typedef
47 const T1 t1(1); in main()
53 typedef std::tuple<int, double> T1; in main() typedef
55 const T1 t1(1, 2); in main()
61 typedef std::tuple<int, double> T1; in main() typedef
63 const T1 t1(1, 2); in main()
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Dlt.pass.cpp41 typedef std::tuple<> T1; in main() typedef
43 const T1 t1; in main()
51 typedef std::tuple<long> T1; in main() typedef
53 const T1 t1(1); in main()
61 typedef std::tuple<long> T1; in main() typedef
63 const T1 t1(1); in main()
71 typedef std::tuple<long> T1; in main() typedef
73 const T1 t1(1); in main()
81 typedef std::tuple<long, int> T1; in main() typedef
83 const T1 t1(1, 2); in main()
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/external/clang/test/Parser/
Dcxx-template-argument.cpp57 template<class T1, typename T2> struct Known { }; // expected-note 3 {{template is declared here}}
58 template<class T1, typename T2> struct X;
59 template<class T1, typename T2> struct ABC; // expected-note {{template is declared here}}
62 template<class T1, typename T2> struct foo :
63 UnknownBase<T1,T2> // expected-error {{unknown template name 'UnknownBase'}}
66 template<class T1, typename T2> struct foo2 :
67 UnknownBase<T1,T2>, // expected-error {{unknown template name 'UnknownBase'}}
68 Known<T1> // expected-error {{too few template arguments for class template 'Known'}}
71 template<class T1, typename T2> struct foo3 :
72 UnknownBase<T1,T2,ABC<T2,T1> > // expected-error {{unknown template name 'UnknownBase'}}
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/external/vixl/test/aarch32/config/
Dcond-rd-rn-rm-t32.json36 "Qadd16", // QADD16{<c>}{<q>} {<Rd>}, <Rn>, <Rm> ; T1
37 "Qadd8", // QADD8{<c>}{<q>} {<Rd>}, <Rn>, <Rm> ; T1
38 "Qasx", // QASX{<c>}{<q>} {<Rd>}, <Rn>, <Rm> ; T1
39 "Qsax", // QSAX{<c>}{<q>} {<Rd>}, <Rn>, <Rm> ; T1
40 "Qsub16", // QSUB16{<c>}{<q>} {<Rd>}, <Rn>, <Rm> ; T1
41 "Qsub8", // QSUB8{<c>}{<q>} {<Rd>}, <Rn>, <Rm> ; T1
42 "Sdiv", // SDIV{<c>}{<q>} {<Rd>}, <Rn>, <Rm> ; T1
43 "Shadd16", // SHADD16{<c>}{<q>} {<Rd>}, <Rn>, <Rm> ; T1
44 "Shadd8", // SHADD8{<c>}{<q>} {<Rd>}, <Rn>, <Rm> ; T1
45 "Shasx", // SHASX{<c>}{<q>} {<Rd>}, <Rn>, <Rm> ; T1
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Dcond-rd-rn-operand-rm-t32.json45 "Adc", // ADC<c>{<q>} {<Rdn>}, <Rdn>, <Rm> ; T1
48 "Adcs", // ADCS{<q>} {<Rdn>}, <Rdn>, <Rm> ; T1
51 "Add", // ADD<c>{<q>} <Rd>, <Rn>, <Rm> ; T1
54 // ADD{<c>}{<q>} {<Rdm>}, SP, <Rdm> ; T1
59 "Adds", // ADDS{<q>} {<Rd>}, <Rn>, <Rm> ; T1
63 "And", // AND<c>{<q>} {<Rdn>}, <Rdn>, <Rm> ; T1
66 "Ands", // ANDS{<q>} {<Rdn>}, <Rdn>, <Rm> ; T1
69 "Bic", // BIC<c>{<q>} {<Rdn>}, <Rdn>, <Rm> ; T1
72 "Bics", // BICS{<q>} {<Rdn>}, <Rdn>, <Rm> ; T1
75 "Eor", // EOR<c>{<q>} {<Rdn>}, <Rdn>, <Rm> ; T1
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/external/llvm/test/CodeGen/Mips/
Dfmadd1.ll26 ; 32-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f14
27 ; 32-DAG: add.s $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
29 ; 32-DAG: add.s $f0, $[[T1]], $[[T2]]
32 ; 32R2: madd.s $[[T1:f[0-9]+]], $[[T0]], $f12, $f14
34 ; 32R2: add.s $f0, $[[T1]], $[[T2]]
37 ; 32R6-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f14
38 ; 32R6-DAG: add.s $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
40 ; 32R6-DAG: add.s $f0, $[[T1]], $[[T2]]
43 ; 64-DAG: mtc1 $zero, $[[T1:f[0-9]+]]
44 ; 64-DAG: add.s $f0, $[[T0]], $[[T1]]
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Dfcmp.ll51 ; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
52 ; 32-CMP-DAG: andi $2, $[[T1]], 1
55 ; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
56 ; 64-CMP-DAG: andi $2, $[[T1]], 1
59 ; MM32R3-DAG: li16 $[[T1:[0-9]+]], 1
61 ; MM32R3-DAG: movf $[[T1]], $[[T0]], $fcc0
65 ; MMR6-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
66 ; MMR6-DAG: andi16 $2, $[[T1]], 1
85 ; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
86 ; 32-CMP-DAG: andi $2, $[[T1]], 1
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/external/llvm/test/CodeGen/Mips/llvm-ir/
Dadd.ll47 ; MMR6: sll $[[T1:[0-9]+]], $[[T0]], 31
48 ; MMR6: sra $2, $[[T1]], 31
109 ; GP32: addu $[[T1:[0-9]+]], $[[T0]], $6
110 ; GP32: addu $2, $4, $[[T1]]
116 ; MM32: addu $[[T1:[0-9]+]], $[[T0]], $6
117 ; MM32: addu $2, $4, $[[T1]]
130 ; GP32: addu $[[T1:[0-9]+]], $7, $[[T0]]
131 ; GP32: sltu $[[T2:[0-9]+]], $[[T1]], $[[T0]]
144 ; GP32: move $5, $[[T1]]
148 ; GP64: daddu $[[T1:[0-9]+]], $[[T0]], $6
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Dselect-int.ll50 ; SEL: seleqz $[[T1:[0-9]+]], $6, $[[T0]]
52 ; SEL: or $2, $[[T2]], $[[T1]]
55 ; MM32R3: movn $[[T1:[0-9]+]], $5, $[[T0]]
56 ; MM32R3: move $2, $[[T1]]
59 ; MMR6: seleqz $[[T1:[0-9]+]], $6, $[[T0]]
61 ; MMR6: or $2, $[[T2]], $[[T1]]
85 ; SEL: seleqz $[[T1:[0-9]+]], $6, $[[T0]]
87 ; SEL: or $2, $[[T2]], $[[T1]]
90 ; MM32R3: movn $[[T1:[0-9]+]], $5, $[[T0]]
91 ; MM32R3: move $2, $[[T1]]
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/external/llvm/unittests/Support/
DTimerTest.cpp36 Timer T1("T1"); in TEST() local
38 EXPECT_TRUE(T1.isInitialized()); in TEST()
40 T1.startTimer(); in TEST()
41 T1.stopTimer(); in TEST()
42 auto TR1 = T1.getTotalTime(); in TEST()
44 T1.startTimer(); in TEST()
46 T1.stopTimer(); in TEST()
47 auto TR2 = T1.getTotalTime(); in TEST()
53 Timer T1("T1"); in TEST() local
55 EXPECT_FALSE(T1.hasTriggered()); in TEST()
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/external/arm-neon-tests/
Dref_vtbX.c39 #define DECL_VTBX(T1, W, N, X) \ in exec_vtbX() argument
40 VECT_ARRAY_TYPE(T1, W, N, X) VECT_ARRAY_VAR(table_vector, T1, W, N, X) in exec_vtbX()
44 #define TEST_VTBL1(T1, T2, T3, W, N) \ in exec_vtbX() argument
45 VECT_VAR(table_vector, T1, W, N) = \ in exec_vtbX()
46 vld1##_##T2##W((T1##W##_t *)lookup_table); \ in exec_vtbX()
48 VECT_VAR(vector_res, T1, W, N) = \ in exec_vtbX()
49 vtbl1_##T2##W(VECT_VAR(table_vector, T1, W, N), \ in exec_vtbX()
51 vst1_##T2##W(VECT_VAR(result, T1, W, N), \ in exec_vtbX()
52 VECT_VAR(vector_res, T1, W, N)); in exec_vtbX()
54 #define TEST_VTBLX(T1, T2, T3, W, N, X) \ in exec_vtbX() argument
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Dref_vcvt.c41 #define TEST_VCVT(Q, T1, T2, W, N, TS1, TS2) \ in exec_vcvt() argument
42 VECT_VAR(vector_res, T1, W, N) = \ in exec_vcvt()
44 vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), \ in exec_vcvt()
45 VECT_VAR(vector_res, T1, W, N)); \ in exec_vcvt()
46 DUMP(TEST_MSG, T1, W, N, PRIx##W); in exec_vcvt()
48 #define TEST_VCVT_FP(Q, T1, T2, W, N, TS1, TS2) \ in exec_vcvt() argument
49 VECT_VAR(vector_res, T1, W, N) = \ in exec_vcvt()
51 vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), \ in exec_vcvt()
52 VECT_VAR(vector_res, T1, W, N)); \ in exec_vcvt()
53 DUMP_FP(TEST_MSG, T1, W, N, PRIx##W); in exec_vcvt()
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/external/llvm/test/CodeGen/PowerPC/
D2010-02-12-saveCR.ll9 ; CHECK: mfcr [[T1:r[0-9]+]] ; cr2
12 ; CHECK: rotlwi [[T1]], [[T1]], 8
14 ; CHECK: stwx [[T1]], r1, [[T2]]
28 ; CHECK: lis [[T1:r[0-9]+]], 1
29 ; CHECK: ori [[T1]], [[T1]], 34536
30 ; CHECK: lwzx [[T1]], r1, [[T1]]
31 ; CHECK: rotlwi [[T1]], [[T1]], 20
32 ; CHECK: mtcrf 16, [[T1]]
33 ; CHECK: lis [[T1]], 1
34 ; CHECK: ori [[T1]], [[T1]], 34540
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/external/swiftshader/third_party/LLVM/include/llvm/Support/
DFormat.h96 template <typename T1, typename T2>
98 T1 Val1;
101 format_object2(const char *fmt, const T1 &val1, const T2 &val2) in format_object2()
114 template <typename T1, typename T2, typename T3>
116 T1 Val1;
120 format_object3(const char *fmt, const T1 &val1, const T2 &val2,const T3 &val3) in format_object3()
133 template <typename T1, typename T2, typename T3, typename T4>
135 T1 Val1;
140 format_object4(const char *fmt, const T1 &val1, const T2 &val2, in format_object4()
154 template <typename T1, typename T2, typename T3, typename T4, typename T5>
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/external/tensorflow/tensorflow/core/kernels/
Dcwise_ops_gpu_common.cu.h121 #define DEFINE_UNARY2(F, T0, T1) \
123 DEFINE_UNARY1(F, T1)
124 #define DEFINE_UNARY3(F, T0, T1, T2) \
125 DEFINE_UNARY2(F, T0, T1); \
127 #define DEFINE_UNARY4(F, T0, T1, T2, T3) \
128 DEFINE_UNARY2(F, T0, T1); \
130 #define DEFINE_UNARY5(F, T0, T1, T2, T3, T4) \
131 DEFINE_UNARY2(F, T0, T1); \
133 #define DEFINE_UNARY6(F, T0, T1, T2, T3, T4, T5) \
134 DEFINE_UNARY2(F, T0, T1); \
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Dconv_ops_fused.cc102 template <class T1>
107 T1* resize_cache;
115 const T1* input_batch_start;
124 template <class T1>
127 PerCacheLineParameters(const PerCacheLineParameters<T1>& other) in PerCacheLineParameters()
133 T1* cache_line_start;
134 const T1* input_top_row_start;
135 const T1* input_bottom_row_start;
136 T1 y_lerp;
140 template <class T1>
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Dcwise_ops_sycl_common.h113 #define DEFINE_UNARY2(F, T0, T1) \
115 DEFINE_UNARY1(F, T1)
116 #define DEFINE_UNARY3(F, T0, T1, T2) \
117 DEFINE_UNARY2(F, T0, T1); \
119 #define DEFINE_UNARY4(F, T0, T1, T2, T3) \
120 DEFINE_UNARY2(F, T0, T1); \
122 #define DEFINE_UNARY5(F, T0, T1, T2, T3, T4) \
123 DEFINE_UNARY2(F, T0, T1); \
132 #define DEFINE_BINARY2(F, T0, T1) \
134 DEFINE_BINARY1(F, T1)
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/external/libmojo/mojo/public/java/bindings/src/org/chromium/mojo/bindings/
DCallbacks.java30 interface Callback1<T1> {
34 public void call(T1 arg1); in call()
43 interface Callback2<T1, T2> {
47 public void call(T1 arg1, T2 arg2); in call()
57 interface Callback3<T1, T2, T3> {
61 public void call(T1 arg1, T2 arg2, T3 arg3); in call()
72 interface Callback4<T1, T2, T3, T4> {
76 public void call(T1 arg1, T2 arg2, T3 arg3, T4 arg4); in call()
88 interface Callback5<T1, T2, T3, T4, T5> {
92 public void call(T1 arg1, T2 arg2, T3 arg3, T4 arg4, T5 arg5); in call()
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/external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/
Dvector-icmp.ll27 ; MIPS32: lw [[T1:.*]],
32 ; MIPS32: xor [[T5:.*]],a1,[[T1]]
65 ; MIPS32: lw [[T1:.*]],
70 ; MIPS32: xor [[T5:.*]],a1,[[T1]]
92 ; MIPS32: lw [[T1:.*]],
97 ; MIPS32: xor [[T5:.*]],a1,[[T1]]
117 ; MIPS32: lw [[T1:.*]],
121 ; MIPS32: slt v1,[[T1]],[[T5:.*]]
138 ; MIPS32: lw [[T1:.*]],
143 ; MIPS32: slt [[T1]],[[T1]],[[T5:.*]]
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