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Searched refs:PSR_F_BIT (Results 1 – 25 of 28) sorted by relevance

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/arch/arm/include/asm/
Dptrace.h50 #define PSR_F_BIT 0x00000040 macro
121 (!((regs)->ARM_cpsr & PSR_F_BIT))
129 regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT); in valid_user_regs()
/arch/arm/kernel/
Dfiq.c106 : "r" (&regs->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | FIQ_MODE)); in set_fiq_regs()
124 : "r" (&regs->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | FIQ_MODE)); in get_fiq_regs()
Dhead-nommu.S37 msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode
Dsetup.c341 "I" (PSR_F_BIT | PSR_I_BIT | IRQ_MODE), in cpu_init()
343 "I" (PSR_F_BIT | PSR_I_BIT | ABT_MODE), in cpu_init()
345 "I" (PSR_F_BIT | PSR_I_BIT | UND_MODE), in cpu_init()
347 "I" (PSR_F_BIT | PSR_I_BIT | SVC_MODE) in cpu_init()
Dhead.S79 msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode
113 msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
/arch/arm/mm/
Dproc-arm9tdmi.S39 mov r0, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
Dproc-xsc3.S94 mov r0, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
114 mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
390 mov r0, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
Dproc-arm7tdmi.S39 mov r0, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
Dproc-arm926.S65 mov ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
109 orr ip, r3, #PSR_F_BIT @ is disabled
Dproc-arm720.S58 mov ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
Dproc-sa110.S48 mov ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
Dproc-arm740.S40 mov ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
Dproc-sa1100.S59 mov ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
Dproc-xscale.S128 mov r0, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
150 mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
Dproc-arm940.S41 mov ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
Dproc-arm920.S73 mov ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
Dproc-arm922.S75 mov ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
Dproc-arm1022.S72 mov ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
Dproc-arm1020e.S83 mov ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
Dproc-arm1026.S72 mov ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
Dproc-arm1020.S83 mov ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
Dproc-arm6_7.S187 mov r0, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
/arch/arm/plat-s3c24xx/
Dsleep.S117 mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE
/arch/arm/mach-pxa/
Dsleep.S105 mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE @ set SVC, irqs off
332 mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE @ set SVC, irqs off
/arch/arm/mach-sa1100/
Dsleep.S180 mov r0, #PSR_F_BIT | PSR_I_BIT | SVC_MODE

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