| /arch/powerpc/boot/dts/ |
| D | mpc866ads.dts | 106 brg-frequency = <0>;
121 brg@9f0 {
122 compatible = "fsl,mpc866-brg",
123 "fsl,cpm1-brg",
124 "fsl,cpm-brg";
148 fsl,cpm-brg = <1>;
159 fsl,cpm-brg = <2>;
|
| D | ep88xc.dts | 160 brg@9f0 {
161 compatible = "fsl,mpc885-brg",
162 "fsl,cpm1-brg",
163 "fsl,cpm-brg";
185 fsl,cpm-brg = <1>;
198 fsl,cpm-brg = <2>;
|
| D | ep8248e.dts | 128 brg@119f0 {
129 compatible = "fsl,mpc8248-brg",
130 "fsl,cpm2-brg",
131 "fsl,cpm-brg";
143 fsl,cpm-brg = <7>;
156 fsl,cpm-brg = <1>;
|
| D | mgsuvd.dts | 121 brg@9f0 {
122 compatible = "fsl,mpc852-brg",
123 "fsl,cpm1-brg",
124 "fsl,cpm-brg";
145 fsl,cpm-brg = <1>;
|
| D | adder875-redboot.dts | 150 brg@9f0 {
151 compatible = "fsl,mpc875-brg",
152 "fsl,cpm1-brg",
153 "fsl,cpm-brg";
175 fsl,cpm-brg = <1>;
|
| D | adder875-uboot.dts | 149 brg@9f0 {
150 compatible = "fsl,mpc875-brg",
151 "fsl,cpm1-brg",
152 "fsl,cpm-brg";
174 fsl,cpm-brg = <1>;
|
| D | mgcoge.dts | 132 brg@119f0 {
133 compatible = "fsl,mpc8247-brg",
134 "fsl,cpm2-brg",
135 "fsl,cpm-brg";
147 fsl,cpm-brg = <2>;
|
| D | mpc885ads.dts | 166 brg@9f0 {
167 compatible = "fsl,mpc885-brg",
168 "fsl,cpm1-brg",
169 "fsl,cpm-brg";
191 fsl,cpm-brg = <1>;
202 fsl,cpm-brg = <2>;
|
| D | pq2fads.dts | 138 brg@119f0 {
139 compatible = "fsl,mpc8280-brg",
140 "fsl,cpm2-brg",
141 "fsl,cpm-brg";
152 fsl,cpm-brg = <1>;
163 fsl,cpm-brg = <2>;
|
| D | mpc8272ads.dts | 140 brg@119f0 {
141 compatible = "fsl,mpc8272-brg",
142 "fsl,cpm2-brg",
143 "fsl,cpm-brg";
154 fsl,cpm-brg = <1>;
165 fsl,cpm-brg = <4>;
|
| D | prpmc2800.dts | 135 BRG0: brg@b200 {
136 compatible = "marvell,mv64360-brg";
143 BRG1: brg@b208 {
144 compatible = "marvell,mv64360-brg";
170 brg = <&BRG0>;
185 brg = <&BRG1>;
|
| D | ksi8560.dts | 216 brg@919f0 {
217 compatible = "fsl,mpc8560-brg",
218 "fsl,cpm2-brg",
219 "fsl,cpm-brg";
239 fsl,cpm-brg = <1>;
251 fsl,cpm-brg = <2>;
|
| D | stx_gp3_8560.dts | 216 brg@919f0 {
217 compatible = "fsl,mpc8560-brg",
218 "fsl,cpm2-brg",
219 "fsl,cpm-brg";
239 fsl,cpm-brg = <2>;
|
| D | c2k.dts | 147 BRG0: brg@b200 {
148 compatible = "marvell,mv64360-brg";
155 BRG1: brg@b208 {
156 compatible = "marvell,mv64360-brg";
182 brg = <&BRG0>;
197 brg = <&BRG1>;
|
| D | tqm8560.dts | 230 brg@919f0 {
231 compatible = "fsl,mpc8560-brg",
232 "fsl,cpm2-brg",
233 "fsl,cpm-brg";
253 fsl,cpm-brg = <1>;
265 fsl,cpm-brg = <2>;
|
| D | tqm8555.dts | 259 brg@919f0 {
260 compatible = "fsl,mpc8555-brg",
261 "fsl,cpm2-brg",
262 "fsl,cpm-brg";
|
| D | tqm8541.dts | 259 brg@919f0 {
260 compatible = "fsl,mpc8541-brg",
261 "fsl,cpm2-brg",
262 "fsl,cpm-brg";
|
| D | mpc8560ads.dts | 219 brg@919f0 {
220 compatible = "fsl,mpc8560-brg",
221 "fsl,cpm2-brg",
222 "fsl,cpm-brg";
242 fsl,cpm-brg = <1>;
254 fsl,cpm-brg = <2>;
|
| D | sbc8560.dts | 242 brg@919f0 {
243 compatible = "fsl,mpc8560-brg",
244 "fsl,cpm2-brg",
245 "fsl,cpm-brg";
|
| D | mpc8555cds.dts | 249 brg@919f0 {
250 compatible = "fsl,mpc8555-brg",
251 "fsl,cpm2-brg",
252 "fsl,cpm-brg";
|
| D | mpc8541cds.dts | 249 brg@919f0 {
250 compatible = "fsl,mpc8541-brg",
251 "fsl,cpm2-brg",
252 "fsl,cpm-brg";
|
| /arch/powerpc/sysdev/ |
| D | mv64x60_dev.c | 99 struct device_node *sdma, *brg; in mv64x60_mpsc_device_setup() local
127 brg = of_find_node_by_phandle(*ph); in mv64x60_mpsc_device_setup()
128 if (!brg) in mv64x60_mpsc_device_setup()
131 err = of_address_to_resource(brg, 0, &r[2]); in mv64x60_mpsc_device_setup()
132 of_node_put(brg); in mv64x60_mpsc_device_setup()
150 prop = of_get_property(brg, "current-speed", NULL); in mv64x60_mpsc_device_setup()
175 prop = of_get_property(brg, "bcr", NULL); in mv64x60_mpsc_device_setup()
181 prop = of_get_property(brg, "clock-src", NULL); in mv64x60_mpsc_device_setup()
185 prop = of_get_property(brg, "clock-frequency", NULL); in mv64x60_mpsc_device_setup()
|
| D | cpm2.c | 118 void __cpm2_setbrg(uint brg, uint rate, uint clk, int div16, int src) in __cpm2_setbrg() argument
125 if (brg < 4) { in __cpm2_setbrg()
129 brg -= 4; in __cpm2_setbrg()
131 bp += brg; in __cpm2_setbrg()
|
| /arch/m68knommu/platform/68360/ |
| D | commproc.c | 289 m360_cpm_setbrg(uint brg, uint rate) in m360_cpm_setbrg() argument
297 bp += brg; in m360_cpm_setbrg()
|
| /arch/powerpc/sysdev/qe_lib/ |
| D | qe.c | 195 int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier) in qe_setbrg() argument
200 if ((brg < QE_BRG1) || (brg > QE_BRG16)) in qe_setbrg()
219 out_be32(&qe_immr->brg.brgc[brg - QE_BRG1], tempval); in qe_setbrg()
|