/arch/powerpc/sysdev/ |
D | ipic.c | 40 .prio = IPIC_SIPRR_C, 47 .prio = IPIC_SIPRR_C, 54 .prio = IPIC_SIPRR_C, 61 .prio = IPIC_SIPRR_C, 68 .prio = IPIC_SIPRR_C, 75 .prio = IPIC_SIPRR_C, 82 .prio = IPIC_SIPRR_C, 89 .prio = IPIC_SIPRR_C, 96 .prio = IPIC_SIPRR_D, 103 .prio = IPIC_SIPRR_D, [all …]
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D | ipic.h | 53 u8 prio; /* priority register offset from base */ member
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D | mpic.c | 1438 void mpic_cpu_set_priority(int prio) in mpic_cpu_set_priority() argument 1442 prio &= MPIC_CPU_TASKPRI_MASK; in mpic_cpu_set_priority() 1443 mpic_cpu_write(MPIC_INFO(CPU_CURRENT_TASK_PRI), prio); in mpic_cpu_set_priority()
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/arch/arm/mach-ns9xxx/ |
D | irq.c | 28 int prio = irq2prio(irq); in ns9xxx_mask_irq() local 29 u32 ic = __raw_readl(SYS_IC(prio / 4)); in ns9xxx_mask_irq() 30 ic &= ~(1 << (7 + 8 * (3 - (prio & 3)))); in ns9xxx_mask_irq() 31 __raw_writel(ic, SYS_IC(prio / 4)); in ns9xxx_mask_irq() 48 int prio = irq2prio(irq); in ns9xxx_unmask_irq() local 49 u32 ic = __raw_readl(SYS_IC(prio / 4)); in ns9xxx_unmask_irq() 50 ic |= 1 << (7 + 8 * (3 - (prio & 3))); in ns9xxx_unmask_irq() 51 __raw_writel(ic, SYS_IC(prio / 4)); in ns9xxx_unmask_irq()
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/arch/powerpc/boot/dts/ |
D | virtex440-ml507.dts | 63 xlnx,dcu-rd-ld-cache-plb-prio = <0>; 64 xlnx,dcu-rd-noncache-plb-prio = <0>; 65 xlnx,dcu-rd-touch-plb-prio = <0>; 66 xlnx,dcu-rd-urgent-plb-prio = <0>; 67 xlnx,dcu-wr-flush-plb-prio = <0>; 68 xlnx,dcu-wr-store-plb-prio = <0>; 69 xlnx,dcu-wr-urgent-plb-prio = <0>; 71 xlnx,dma0-plb-prio = <0>; 77 xlnx,dma1-plb-prio = <0>; 83 xlnx,dma2-plb-prio = <0>; [all …]
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/arch/arm/mach-pxa/ |
D | dma.c | 30 pxa_dma_prio prio; member 38 int pxa_request_dma (char *name, pxa_dma_prio prio, in pxa_request_dma() argument 54 if ((dma_channels[i].prio == prio) && in pxa_request_dma() 61 } while (!found && prio--); in pxa_request_dma() 131 dma_channels[i].prio = min((i & 0xf) >> 2, DMA_PRIO_LOW); in pxa_init_dma()
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/arch/powerpc/platforms/cell/spufs/ |
D | sched.c | 85 #define SCALE_PRIO(x, prio) \ argument 86 max(x * (MAX_PRIO - prio) / (MAX_USER_PRIO / 2), MIN_SPU_TIMESLICE) 98 if (ctx->prio < NORMAL_PRIO) in spu_set_timeslice() 99 ctx->time_slice = SCALE_PRIO(DEF_SPU_TIMESLICE * 4, ctx->prio); in spu_set_timeslice() 101 ctx->time_slice = SCALE_PRIO(DEF_SPU_TIMESLICE, ctx->prio); in spu_set_timeslice() 128 if (rt_prio(current->prio)) in __spu_update_sched_info() 129 ctx->prio = current->prio; in __spu_update_sched_info() 131 ctx->prio = current->static_prio; in __spu_update_sched_info() 508 list_add_tail(&ctx->rq, &spu_prio->runq[ctx->prio]); in __spu_add_to_rq() 509 set_bit(ctx->prio, spu_prio->bitmap); in __spu_add_to_rq() [all …]
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D | spufs.h | 129 int prio; member
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D | file.c | 2640 ctx->prio, in spufs_show_ctx()
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/arch/ia64/kernel/ |
D | sys_ia64.c | 83 long prio; in ia64_getpriority() local 85 prio = sys_getpriority(which, who); in ia64_getpriority() 86 if (prio >= 0) { in ia64_getpriority() 88 prio = 20 - prio; in ia64_getpriority() 90 return prio; in ia64_getpriority()
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/arch/blackfin/kernel/ |
D | ipipe.c | 170 int prio = desc->ic_prio; in __ipipe_enable_irqdesc() local 174 atomic_inc_return(&__ipipe_irq_lvdepth[prio]) == 1) in __ipipe_enable_irqdesc() 175 __set_bit(prio, &__ipipe_irq_lvmask); in __ipipe_enable_irqdesc() 182 int prio = desc->ic_prio; in __ipipe_disable_irqdesc() local 185 atomic_dec_and_test(&__ipipe_irq_lvdepth[prio])) in __ipipe_disable_irqdesc() 186 __clear_bit(prio, &__ipipe_irq_lvmask); in __ipipe_disable_irqdesc()
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/arch/arm/plat-mxc/ |
D | irq.c | 54 void imx_irq_set_priority(unsigned char irq, unsigned char prio) in imx_irq_set_priority() argument 64 temp |= prio & mask; in imx_irq_set_priority()
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D | dma-mx1-mx2.c | 768 int imx_dma_request_by_prio(const char *name, enum imx_dma_prio prio) in imx_dma_request_by_prio() argument 773 switch (prio) { in imx_dma_request_by_prio()
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/arch/powerpc/platforms/cell/ |
D | interrupt.c | 70 return IIC_IRQ_TYPE_IPI | (bits.prio >> 4); in iic_pending_to_hwnum() 86 out_be64(&iic->regs->prio, iic->eoi_stack[--iic->eoi_ptr]); in iic_eoi() 157 iic->eoi_stack[++iic->eoi_ptr] = pending.prio; in iic_get_irq() 164 out_be64(&__get_cpu_var(iic).regs->prio, 0xff); in iic_setup_cpu() 361 out_be64(&iic->regs->prio, 0); in init_one_iic()
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/arch/arm/mach-pxa/include/mach/ |
D | dma.h | 40 pxa_dma_prio prio,
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/arch/arm/plat-mxc/include/mach/ |
D | irqs.h | 48 extern void imx_irq_set_priority(unsigned char irq, unsigned char prio);
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D | dma-mx1-mx2.h | 89 int imx_dma_request_by_prio(const char *name, enum imx_dma_prio prio);
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/arch/arm/mach-imx/include/mach/ |
D | imx-dma.h | 95 imx_dmach_t imx_dma_request_by_prio(const char *name, imx_dma_prio prio);
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/arch/powerpc/include/asm/ |
D | cell-regs.h | 172 u8 prio; member 182 u64 prio; member
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D | mpic.h | 451 extern void mpic_cpu_set_priority(int prio);
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/arch/blackfin/mach-common/ |
D | ints-priority.c | 1206 int ient, prio; local 1214 for (prio = 0; prio <= IVG13-IVG7; prio++) { 1215 if (ivg7_13[prio].ifirst <= ivg && 1216 ivg7_13[prio].istop > ivg) 1217 return IVG7 + prio;
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/arch/arm/mach-imx/ |
D | dma.c | 425 imx_dmach_t imx_dma_request_by_prio(const char *name, imx_dma_prio prio) in imx_dma_request_by_prio() argument 430 switch (prio) { in imx_dma_request_by_prio()
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/arch/s390/include/asm/ |
D | fcx.h | 268 u32 prio:8; member
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/arch/cris/arch-v32/drivers/ |
D | cryptocop.c | 160 cryptocop_queue_priority prio; member 165 cryptocop_queue_priority prio; member 225 static int cryptocop_job_queue_insert(cryptocop_queue_priority prio, struct cryptocop_operation *op… 1835 static int cryptocop_job_queue_insert(cryptocop_queue_priority prio, struct cryptocop_operation *op… in cryptocop_job_queue_insert() argument 1841 DEBUG(printk("cryptocop_job_queue_insert(%d, 0x%p)\n", prio, operation)); in cryptocop_job_queue_insert() 1855 list_add_tail(&pj->node, &cryptocop_job_queues[prio].jobs); in cryptocop_job_queue_insert() 2037 cryptocop_job_queues[i].prio = (cryptocop_queue_priority)i; in cryptocop_job_queue_init()
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