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Searched refs:prio (Results 1 – 24 of 24) sorted by relevance

/arch/powerpc/sysdev/
Dipic.c40 .prio = IPIC_SIPRR_C,
47 .prio = IPIC_SIPRR_C,
54 .prio = IPIC_SIPRR_C,
61 .prio = IPIC_SIPRR_C,
68 .prio = IPIC_SIPRR_C,
75 .prio = IPIC_SIPRR_C,
82 .prio = IPIC_SIPRR_C,
89 .prio = IPIC_SIPRR_C,
96 .prio = IPIC_SIPRR_D,
103 .prio = IPIC_SIPRR_D,
[all …]
Dipic.h53 u8 prio; /* priority register offset from base */ member
Dmpic.c1438 void mpic_cpu_set_priority(int prio) in mpic_cpu_set_priority() argument
1442 prio &= MPIC_CPU_TASKPRI_MASK; in mpic_cpu_set_priority()
1443 mpic_cpu_write(MPIC_INFO(CPU_CURRENT_TASK_PRI), prio); in mpic_cpu_set_priority()
/arch/arm/mach-ns9xxx/
Dirq.c28 int prio = irq2prio(irq); in ns9xxx_mask_irq() local
29 u32 ic = __raw_readl(SYS_IC(prio / 4)); in ns9xxx_mask_irq()
30 ic &= ~(1 << (7 + 8 * (3 - (prio & 3)))); in ns9xxx_mask_irq()
31 __raw_writel(ic, SYS_IC(prio / 4)); in ns9xxx_mask_irq()
48 int prio = irq2prio(irq); in ns9xxx_unmask_irq() local
49 u32 ic = __raw_readl(SYS_IC(prio / 4)); in ns9xxx_unmask_irq()
50 ic |= 1 << (7 + 8 * (3 - (prio & 3))); in ns9xxx_unmask_irq()
51 __raw_writel(ic, SYS_IC(prio / 4)); in ns9xxx_unmask_irq()
/arch/powerpc/boot/dts/
Dvirtex440-ml507.dts63 xlnx,dcu-rd-ld-cache-plb-prio = <0>;
64 xlnx,dcu-rd-noncache-plb-prio = <0>;
65 xlnx,dcu-rd-touch-plb-prio = <0>;
66 xlnx,dcu-rd-urgent-plb-prio = <0>;
67 xlnx,dcu-wr-flush-plb-prio = <0>;
68 xlnx,dcu-wr-store-plb-prio = <0>;
69 xlnx,dcu-wr-urgent-plb-prio = <0>;
71 xlnx,dma0-plb-prio = <0>;
77 xlnx,dma1-plb-prio = <0>;
83 xlnx,dma2-plb-prio = <0>;
[all …]
/arch/arm/mach-pxa/
Ddma.c30 pxa_dma_prio prio; member
38 int pxa_request_dma (char *name, pxa_dma_prio prio, in pxa_request_dma() argument
54 if ((dma_channels[i].prio == prio) && in pxa_request_dma()
61 } while (!found && prio--); in pxa_request_dma()
131 dma_channels[i].prio = min((i & 0xf) >> 2, DMA_PRIO_LOW); in pxa_init_dma()
/arch/powerpc/platforms/cell/spufs/
Dsched.c85 #define SCALE_PRIO(x, prio) \ argument
86 max(x * (MAX_PRIO - prio) / (MAX_USER_PRIO / 2), MIN_SPU_TIMESLICE)
98 if (ctx->prio < NORMAL_PRIO) in spu_set_timeslice()
99 ctx->time_slice = SCALE_PRIO(DEF_SPU_TIMESLICE * 4, ctx->prio); in spu_set_timeslice()
101 ctx->time_slice = SCALE_PRIO(DEF_SPU_TIMESLICE, ctx->prio); in spu_set_timeslice()
128 if (rt_prio(current->prio)) in __spu_update_sched_info()
129 ctx->prio = current->prio; in __spu_update_sched_info()
131 ctx->prio = current->static_prio; in __spu_update_sched_info()
508 list_add_tail(&ctx->rq, &spu_prio->runq[ctx->prio]); in __spu_add_to_rq()
509 set_bit(ctx->prio, spu_prio->bitmap); in __spu_add_to_rq()
[all …]
Dspufs.h129 int prio; member
Dfile.c2640 ctx->prio, in spufs_show_ctx()
/arch/ia64/kernel/
Dsys_ia64.c83 long prio; in ia64_getpriority() local
85 prio = sys_getpriority(which, who); in ia64_getpriority()
86 if (prio >= 0) { in ia64_getpriority()
88 prio = 20 - prio; in ia64_getpriority()
90 return prio; in ia64_getpriority()
/arch/blackfin/kernel/
Dipipe.c170 int prio = desc->ic_prio; in __ipipe_enable_irqdesc() local
174 atomic_inc_return(&__ipipe_irq_lvdepth[prio]) == 1) in __ipipe_enable_irqdesc()
175 __set_bit(prio, &__ipipe_irq_lvmask); in __ipipe_enable_irqdesc()
182 int prio = desc->ic_prio; in __ipipe_disable_irqdesc() local
185 atomic_dec_and_test(&__ipipe_irq_lvdepth[prio])) in __ipipe_disable_irqdesc()
186 __clear_bit(prio, &__ipipe_irq_lvmask); in __ipipe_disable_irqdesc()
/arch/arm/plat-mxc/
Dirq.c54 void imx_irq_set_priority(unsigned char irq, unsigned char prio) in imx_irq_set_priority() argument
64 temp |= prio & mask; in imx_irq_set_priority()
Ddma-mx1-mx2.c768 int imx_dma_request_by_prio(const char *name, enum imx_dma_prio prio) in imx_dma_request_by_prio() argument
773 switch (prio) { in imx_dma_request_by_prio()
/arch/powerpc/platforms/cell/
Dinterrupt.c70 return IIC_IRQ_TYPE_IPI | (bits.prio >> 4); in iic_pending_to_hwnum()
86 out_be64(&iic->regs->prio, iic->eoi_stack[--iic->eoi_ptr]); in iic_eoi()
157 iic->eoi_stack[++iic->eoi_ptr] = pending.prio; in iic_get_irq()
164 out_be64(&__get_cpu_var(iic).regs->prio, 0xff); in iic_setup_cpu()
361 out_be64(&iic->regs->prio, 0); in init_one_iic()
/arch/arm/mach-pxa/include/mach/
Ddma.h40 pxa_dma_prio prio,
/arch/arm/plat-mxc/include/mach/
Dirqs.h48 extern void imx_irq_set_priority(unsigned char irq, unsigned char prio);
Ddma-mx1-mx2.h89 int imx_dma_request_by_prio(const char *name, enum imx_dma_prio prio);
/arch/arm/mach-imx/include/mach/
Dimx-dma.h95 imx_dmach_t imx_dma_request_by_prio(const char *name, imx_dma_prio prio);
/arch/powerpc/include/asm/
Dcell-regs.h172 u8 prio; member
182 u64 prio; member
Dmpic.h451 extern void mpic_cpu_set_priority(int prio);
/arch/blackfin/mach-common/
Dints-priority.c1206 int ient, prio; local
1214 for (prio = 0; prio <= IVG13-IVG7; prio++) {
1215 if (ivg7_13[prio].ifirst <= ivg &&
1216 ivg7_13[prio].istop > ivg)
1217 return IVG7 + prio;
/arch/arm/mach-imx/
Ddma.c425 imx_dmach_t imx_dma_request_by_prio(const char *name, imx_dma_prio prio) in imx_dma_request_by_prio() argument
430 switch (prio) { in imx_dma_request_by_prio()
/arch/s390/include/asm/
Dfcx.h268 u32 prio:8; member
/arch/cris/arch-v32/drivers/
Dcryptocop.c160 cryptocop_queue_priority prio; member
165 cryptocop_queue_priority prio; member
225 static int cryptocop_job_queue_insert(cryptocop_queue_priority prio, struct cryptocop_operation *op…
1835 static int cryptocop_job_queue_insert(cryptocop_queue_priority prio, struct cryptocop_operation *op… in cryptocop_job_queue_insert() argument
1841 DEBUG(printk("cryptocop_job_queue_insert(%d, 0x%p)\n", prio, operation)); in cryptocop_job_queue_insert()
1855 list_add_tail(&pj->node, &cryptocop_job_queues[prio].jobs); in cryptocop_job_queue_insert()
2037 cryptocop_job_queues[i].prio = (cryptocop_queue_priority)i; in cryptocop_job_queue_init()