Home
last modified time | relevance | path

Searched refs:regbase (Results 1 – 13 of 13) sorted by relevance

/arch/mips/rb532/
Dgpio.c42 void __iomem *regbase; member
92 return rb532_get_bit(offset, gpch->regbase + GPIOD); in rb532_gpio_get()
104 rb532_set_bit(value, offset, gpch->regbase + GPIOD); in rb532_gpio_set()
117 rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC); in rb532_gpio_direction_input()
119 rb532_set_bit(0, offset, gpch->regbase + GPIOCFG); in rb532_gpio_direction_input()
134 rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC); in rb532_gpio_direction_output()
137 rb532_set_bit(value, offset, gpch->regbase + GPIOD); in rb532_gpio_direction_output()
139 rb532_set_bit(1, offset, gpch->regbase + GPIOCFG); in rb532_gpio_direction_output()
162 rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOILEVEL); in rb532_gpio_set_ilevel()
171 rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOISTAT); in rb532_gpio_set_istat()
[all …]
/arch/arm/mach-w90x900/
Dgpio.c50 void __iomem *regbase; /* Base of group register*/ member
57 void __iomem *pio = nuc900_gpio->regbase + GPIO_IN; in nuc900_gpio_get()
69 void __iomem *pio = nuc900_gpio->regbase + GPIO_OUT; in nuc900_gpio_set()
90 void __iomem *pio = nuc900_gpio->regbase + GPIO_DIR; in nuc900_dir_input()
108 void __iomem *outreg = nuc900_gpio->regbase + GPIO_OUT; in nuc900_dir_output()
109 void __iomem *pio = nuc900_gpio->regbase + GPIO_DIR; in nuc900_dir_output()
151 gpio_chip->regbase = GPIO_BASE + i * GROUPINERV; in nuc900_init_gpio()
/arch/arm/mach-at91/
Dgpio.c41 void __iomem *regbase; /* PIO bank virtual address */ member
95 return gpio_chip[pin].regbase; in pin_to_controller()
453 void __iomem *pio = gpio_chip[i].regbase; in at91_gpio_suspend()
475 void __iomem *pio = gpio_chip[i].regbase; in at91_gpio_resume()
509 void __iomem *pio = at91_gpio->regbase; in gpio_irq_mask()
519 void __iomem *pio = at91_gpio->regbase; in gpio_irq_unmask()
541 void __iomem *pio = at91_gpio->regbase; in alt_gpio_irq_type()
594 void __iomem *pio = at91_gpio->regbase; in gpio_irq_handler()
609 pio = at91_gpio->regbase; in gpio_irq_handler()
756 __raw_writel(~0, this->regbase + PIO_IDR); in at91_gpio_irq_setup()
[all …]
Dat91sam9263.c288 .regbase = AT91SAM9263_BASE_PIOA,
291 .regbase = AT91SAM9263_BASE_PIOB,
294 .regbase = AT91SAM9263_BASE_PIOC,
297 .regbase = AT91SAM9263_BASE_PIOD,
300 .regbase = AT91SAM9263_BASE_PIOE,
Dat91sam9rl.c248 .regbase = AT91SAM9RL_BASE_PIOA,
251 .regbase = AT91SAM9RL_BASE_PIOB,
254 .regbase = AT91SAM9RL_BASE_PIOC,
257 .regbase = AT91SAM9RL_BASE_PIOD,
Dat91sam9g45.c337 .regbase = AT91SAM9G45_BASE_PIOA,
340 .regbase = AT91SAM9G45_BASE_PIOB,
343 .regbase = AT91SAM9G45_BASE_PIOC,
346 .regbase = AT91SAM9G45_BASE_PIOD,
349 .regbase = AT91SAM9G45_BASE_PIOE,
Dat91rm9200.c285 .regbase = AT91RM9200_BASE_PIOA,
288 .regbase = AT91RM9200_BASE_PIOB,
291 .regbase = AT91RM9200_BASE_PIOC,
294 .regbase = AT91RM9200_BASE_PIOD,
Dat91sam9261.c257 .regbase = AT91SAM9261_BASE_PIOA,
260 .regbase = AT91SAM9261_BASE_PIOB,
263 .regbase = AT91SAM9261_BASE_PIOC,
Dat91sam9260.c297 .regbase = AT91SAM9260_BASE_PIOA,
300 .regbase = AT91SAM9260_BASE_PIOB,
303 .regbase = AT91SAM9260_BASE_PIOC,
Dgeneric.h81 unsigned long regbase; /* offset from system peripheral base */ member
/arch/parisc/include/asm/
Dgrfioctl.h89 gaddr_t fbbase, regbase;/* framebuffer and register base addr */ member
/arch/mips/include/asm/mach-au1x00/
Dau1xxx_ide.h60 u32 regbase; member
/arch/sparc/kernel/
Dpci_schizo.c130 unsigned long regbase = pbm->pbm_regs; in __schizo_check_stc_error_pbm() local
135 err_base = regbase + SCHIZO_STC_ERR; in __schizo_check_stc_error_pbm()
136 tag_base = regbase + SCHIZO_STC_TAG; in __schizo_check_stc_error_pbm()
137 line_base = regbase + SCHIZO_STC_LINE; in __schizo_check_stc_error_pbm()