Searched refs:link_nr (Results 1 – 12 of 12) sorted by relevance
| /drivers/gpu/drm/nouveau/ |
| D | nouveau_dp.c | 77 nv_encoder->dp.link_nr = dpcd[2] & DP_MAX_LANE_COUNT_MASK; in nouveau_dp_detect()
80 nv_encoder->dp.link_nr, nv_encoder->dp.link_bw, dpcd[0]); in nouveau_dp_detect()
82 nv_encoder->dcb->dpconf.link_nr, in nouveau_dp_detect()
85 if (nv_encoder->dcb->dpconf.link_nr < nv_encoder->dp.link_nr) in nouveau_dp_detect()
86 nv_encoder->dp.link_nr = nv_encoder->dcb->dpconf.link_nr; in nouveau_dp_detect()
91 nv_encoder->dp.link_nr, nv_encoder->dp.link_bw); in nouveau_dp_detect()
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| D | nouveau_encoder.h | 58 int link_nr; member
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| D | nouveau_bios.c | 1483 entry->dpconf.link_nr = 4; in parse_dcb20_entry()
1486 entry->dpconf.link_nr = 2; in parse_dcb20_entry()
1489 entry->dpconf.link_nr = 1; in parse_dcb20_entry()
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| D | nouveau_connector.c | 835 max_clock = nv_encoder->dp.link_nr; in nouveau_connector_mode_valid()
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| /drivers/gpu/drm/nouveau/core/engine/disp/ |
| D | dport.c | 52 int link_nr; member
74 DBG("%d lanes at %d KB/s\n", dp->link_nr, dp->link_bw); in dp_set_link_config()
78 sink[1] = dp->link_nr; in dp_set_link_config()
100 dp->link_nr, dp->link_bw / 27000, in dp_set_link_config()
124 for (i = 0; i < dp->link_nr; i++) { in dp_link_train_commit()
172 for (i = 0; i < dp->link_nr; i++) { in dp_link_train_cr()
204 for (i = 0; i < dp->link_nr && eq_done; i++) { in dp_link_train_eq()
313 dp->link_nr = dp->dpcd[2] & DPCD_RC02_MAX_LANE_COUNT; in nouveau_dp_train()
314 while ((dp->link_nr >> 1) * link_bw[0] > datarate) in nouveau_dp_train()
315 dp->link_nr >>= 1; in nouveau_dp_train()
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| D | sornv94.c | 69 int head, int link_nr, int link_bw, bool enh_frame) in nv94_sor_dp_lnk_ctl() argument
79 dpctrl |= ((1 << link_nr) - 1) << 16; in nv94_sor_dp_lnk_ctl()
85 for (i = 0; i < link_nr; i++) in nv94_sor_dp_lnk_ctl()
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| D | sornvd0.c | 66 int head, int link_nr, int link_bw, bool enh_frame) in nvd0_sor_dp_lnk_ctl() argument
77 dpctrl |= ((1 << link_nr) - 1) << 16; in nvd0_sor_dp_lnk_ctl()
81 for (i = 0; i < link_nr; i++) in nvd0_sor_dp_lnk_ctl()
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| D | nvd0.c | 764 u32 datarate, link_nr, link_bw, bits; in nvd0_disp_intr_unk2_2_tu() local
772 if (dpctrl > 0x00030000) link_nr = 4; in nvd0_disp_intr_unk2_2_tu()
773 else if (dpctrl > 0x00010000) link_nr = 2; in nvd0_disp_intr_unk2_2_tu()
774 else link_nr = 1; in nvd0_disp_intr_unk2_2_tu()
781 do_div(ratio, link_nr * link_bw); in nvd0_disp_intr_unk2_2_tu()
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| D | dport.h | 66 int link_nr, int link_bw, bool enh_frame);
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| D | nv50.c | 1012 u32 link_nr, link_bw, bits, r; in nv50_disp_intr_unk20_2_dp() local
1015 if (dpctrl > 0x00030000) link_nr = 4; in nv50_disp_intr_unk20_2_dp()
1016 else if (dpctrl > 0x00010000) link_nr = 2; in nv50_disp_intr_unk20_2_dp()
1017 else link_nr = 1; in nv50_disp_intr_unk20_2_dp()
1028 link_data_rate = (pclk * bits / 8) / link_nr; in nv50_disp_intr_unk20_2_dp()
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| /drivers/gpu/drm/nouveau/core/subdev/i2c/ |
| D | anx9805.c | 34 anx9805_train(struct nouveau_i2c_port *port, int link_nr, int link_bw, bool enh) in anx9805_train() argument
41 nv_wri2cr(mast, chan->addr, 0xa1, link_nr | (enh ? 0x80 : 0x00)); in anx9805_train()
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| /drivers/gpu/drm/nouveau/core/include/subdev/bios/ |
| D | dcb.h | 49 int link_nr; member
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