| /drivers/gpu/drm/nouveau/core/subdev/bar/ |
| D | nvc0.c | 37 struct nouveau_gpuobj *pgd; member
54 nvc0_vm_flush_engine(nv_subdev(bar), priv->bar[0].pgd->addr, 5); in nvc0_bar_kmap()
71 nvc0_vm_flush_engine(nv_subdev(bar), priv->bar[1].pgd->addr, 5); in nvc0_bar_umap()
82 nvc0_vm_flush_engine(nv_subdev(bar), priv->bar[i].pgd->addr, 5); in nvc0_bar_unmap()
111 &priv->bar[0].pgd); in nvc0_bar_ctor()
127 ret = nouveau_vm_ref(vm, &priv->bar[0].vm, priv->bar[0].pgd); in nvc0_bar_ctor()
132 nv_wo32(mem, 0x0200, lower_32_bits(priv->bar[0].pgd->addr)); in nvc0_bar_ctor()
133 nv_wo32(mem, 0x0204, upper_32_bits(priv->bar[0].pgd->addr)); in nvc0_bar_ctor()
145 &priv->bar[1].pgd); in nvc0_bar_ctor()
153 ret = nouveau_vm_ref(vm, &priv->bar[1].vm, priv->bar[1].pgd); in nvc0_bar_ctor()
[all …]
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| D | nv50.c | 37 struct nouveau_gpuobj *pgd; member
138 0, &priv->pgd); in nv50_bar_ctor()
157 ret = nouveau_vm_ref(vm, &priv->bar3_vm, priv->pgd); in nv50_bar_ctor()
182 ret = nouveau_vm_ref(vm, &priv->bar1_vm, priv->pgd); in nv50_bar_ctor()
216 nouveau_vm_ref(NULL, &priv->bar1_vm, priv->pgd); in nv50_bar_dtor()
220 nouveau_vm_ref(NULL, &priv->bar3_vm, priv->pgd); in nv50_bar_dtor()
222 nouveau_gpuobj_ref(NULL, &priv->pgd); in nv50_bar_dtor()
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| /drivers/gpu/drm/nouveau/core/subdev/vm/ |
| D | base.c | 393 nouveau_vm_link(struct nouveau_vm *vm, struct nouveau_gpuobj *pgd) in nouveau_vm_link() argument
399 if (!pgd) in nouveau_vm_link()
406 nouveau_gpuobj_ref(pgd, &vpgd->obj); in nouveau_vm_link()
410 vmm->map_pgt(pgd, i, vm->pgt[i - vm->fpde].obj); in nouveau_vm_link()
420 struct nouveau_gpuobj *pgd = NULL; in nouveau_vm_unlink() local
428 pgd = vpgd->obj; in nouveau_vm_unlink()
436 nouveau_gpuobj_ref(NULL, &pgd); in nouveau_vm_unlink()
455 struct nouveau_gpuobj *pgd) in nouveau_vm_ref() argument
462 ret = nouveau_vm_link(vm, pgd); in nouveau_vm_ref()
473 nouveau_vm_unlink(vm, pgd); in nouveau_vm_ref()
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| D | nvc0.c | 80 nvc0_vm_map_pgt(struct nouveau_gpuobj *pgd, u32 index, in nvc0_vm_map_pgt() argument
90 nv_wo32(pgd, (index * 8) + 0, pde[0]); in nvc0_vm_map_pgt()
91 nv_wo32(pgd, (index * 8) + 4, pde[1]); in nvc0_vm_map_pgt()
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| D | nv50.c | 38 nv50_vm_map_pgt(struct nouveau_gpuobj *pgd, u32 pde, in nv50_vm_map_pgt() argument
62 nv_wo32(pgd, (pde * 8) + 0, lower_32_bits(phys)); in nv50_vm_map_pgt()
63 nv_wo32(pgd, (pde * 8) + 4, upper_32_bits(phys)); in nv50_vm_map_pgt()
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| /drivers/gpu/drm/nouveau/core/engine/fifo/ |
| D | nvc0.c | 55 struct nouveau_gpuobj *pgd; member
306 &base->pgd); in nvc0_fifo_context_ctor()
310 nv_wo32(base, 0x0200, lower_32_bits(base->pgd->addr)); in nvc0_fifo_context_ctor()
311 nv_wo32(base, 0x0204, upper_32_bits(base->pgd->addr)); in nvc0_fifo_context_ctor()
315 ret = nouveau_vm_ref(nouveau_client(parent)->vm, &base->vm, base->pgd); in nvc0_fifo_context_ctor()
326 nouveau_vm_ref(NULL, &base->vm, base->pgd); in nvc0_fifo_context_dtor()
327 nouveau_gpuobj_ref(NULL, &base->pgd); in nvc0_fifo_context_dtor()
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| D | nve0.c | 75 struct nouveau_gpuobj *pgd; member
340 &base->pgd); in nve0_fifo_context_ctor()
344 nv_wo32(base, 0x0200, lower_32_bits(base->pgd->addr)); in nve0_fifo_context_ctor()
345 nv_wo32(base, 0x0204, upper_32_bits(base->pgd->addr)); in nve0_fifo_context_ctor()
349 ret = nouveau_vm_ref(nouveau_client(parent)->vm, &base->vm, base->pgd); in nve0_fifo_context_ctor()
360 nouveau_vm_ref(NULL, &base->vm, base->pgd); in nve0_fifo_context_dtor()
361 nouveau_gpuobj_ref(NULL, &base->pgd); in nve0_fifo_context_dtor()
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| D | nv50.c | 397 &base->pgd); in nv50_fifo_context_ctor()
401 ret = nouveau_vm_ref(nouveau_client(parent)->vm, &base->vm, base->pgd); in nv50_fifo_context_ctor()
412 nouveau_vm_ref(NULL, &base->vm, base->pgd); in nv50_fifo_context_dtor()
413 nouveau_gpuobj_ref(NULL, &base->pgd); in nv50_fifo_context_dtor()
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| D | nv50.h | 15 struct nouveau_gpuobj *pgd; member
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| D | nv84.c | 347 0, &base->pgd); in nv84_fifo_context_ctor()
351 ret = nouveau_vm_ref(nouveau_client(parent)->vm, &base->vm, base->pgd); in nv84_fifo_context_ctor()
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| /drivers/gpu/drm/nouveau/core/include/subdev/ |
| D | vm.h | 80 void (*map_pgt)(struct nouveau_gpuobj *pgd, u32 pde,
129 struct nouveau_gpuobj *pgd);
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| /drivers/iommu/ |
| D | intel-iommu.c | 377 struct dma_pte *pgd; /* virtual address */ member
784 BUG_ON(!domain->pgd); in pfn_to_dma_pte()
786 parent = domain->pgd; in pfn_to_dma_pte()
833 parent = domain->pgd; in dma_pfn_level_pte()
945 free_pgtable_page(domain->pgd); in dma_pte_free_pagetable()
946 domain->pgd = NULL; in dma_pte_free_pagetable()
1511 domain->pgd = (struct dma_pte *)alloc_pgtable_page(domain->nid); in domain_init()
1512 if (!domain->pgd) in domain_init()
1514 __iommu_flush_cache(iommu, domain->pgd, PAGE_SIZE); in domain_init()
1554 struct dma_pte *pgd; in domain_context_mapping_one() local
[all …]
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| D | omap-iommu.c | 1227 u32 *pgd, *pte; in omap_iommu_iova_to_phys() local
1230 iopgtable_lookup_entry(oiommu, da, &pgd, &pte); in omap_iommu_iova_to_phys()
1240 if (iopgd_is_section(*pgd)) in omap_iommu_iova_to_phys()
1241 ret = omap_iommu_translate(*pgd, da, IOSECTION_MASK); in omap_iommu_iova_to_phys()
1242 else if (iopgd_is_super(*pgd)) in omap_iommu_iova_to_phys()
1243 ret = omap_iommu_translate(*pgd, da, IOSUPER_MASK); in omap_iommu_iova_to_phys()
1245 dev_err(dev, "bogus pgd 0x%x, da 0x%lx", *pgd, da); in omap_iommu_iova_to_phys()
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| D | amd_iommu_v2.c | 461 __pa(pasid_state->mm->pgd)); in mn_invalidate_range_end()
702 __pa(pasid_state->mm->pgd)); in amd_iommu_bind_pasid()
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| D | exynos-iommu.c | 235 unsigned long pgd) in __sysmmu_set_ptbase() argument
238 __raw_writel(pgd, sfrbase + REG_PT_BASE_ADDR); in __sysmmu_set_ptbase()
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| /drivers/staging/tidspbridge/core/ |
| D | tiomap3430.c | 1543 pgd_t *pgd; in user_va2_pa() local
1548 pgd = pgd_offset(mm, address); in user_va2_pa()
1549 if (pgd_none(*pgd) || pgd_bad(*pgd)) in user_va2_pa()
1552 pud = pud_offset(pgd, address); in user_va2_pa()
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| /drivers/lguest/x86/ |
| D | core.c | 102 pages->state.host_cr3 = __pa(current->mm->pgd); in copy_in_guest_info()
|