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Searched refs:read_reg (Results 1 – 25 of 90) sorted by relevance

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/drivers/net/can/sja1000/
Dsja1000.c95 priv->read_reg(priv, SJA1000_SR); in sja1000_write_cmdreg()
101 return (priv->read_reg(priv, SJA1000_MOD) == 0xFF); in sja1000_is_absent()
119 unsigned char status = priv->read_reg(priv, SJA1000_MOD); in set_reset_mode()
135 status = priv->read_reg(priv, SJA1000_MOD); in set_reset_mode()
144 unsigned char status = priv->read_reg(priv, SJA1000_MOD); in set_normal_mode()
168 status = priv->read_reg(priv, SJA1000_MOD); in set_normal_mode()
185 priv->read_reg(priv, SJA1000_ECC); in sja1000_start()
232 bec->txerr = priv->read_reg(priv, SJA1000_TXERR); in sja1000_get_berr_counter()
233 bec->rxerr = priv->read_reg(priv, SJA1000_RXERR); in sja1000_get_berr_counter()
339 fi = priv->read_reg(priv, SJA1000_FI); in sja1000_rx()
[all …]
Dplx_pci.c349 if ((priv->read_reg(priv, REG_CR) & REG_CR_BASICCAN_INITIAL_MASK) == in plx_pci_check_sja1000()
351 (priv->read_reg(priv, SJA1000_SR) == REG_SR_BASICCAN_INITIAL) && in plx_pci_check_sja1000()
352 (priv->read_reg(priv, SJA1000_IR) == REG_IR_BASICCAN_INITIAL)) in plx_pci_check_sja1000()
362 if (priv->read_reg(priv, SJA1000_MOD) == REG_MOD_PELICAN_INITIAL && in plx_pci_check_sja1000()
363 priv->read_reg(priv, SJA1000_SR) == REG_SR_PELICAN_INITIAL && in plx_pci_check_sja1000()
364 priv->read_reg(priv, SJA1000_IR) == REG_IR_PELICAN_INITIAL) in plx_pci_check_sja1000()
561 priv->read_reg = plx_pci_read_reg; in plx_pci_add_card()
Dsja1000_platform.c124 priv->read_reg = sp_read_reg32; in sp_probe()
128 priv->read_reg = sp_read_reg16; in sp_probe()
133 priv->read_reg = sp_read_reg8; in sp_probe()
Dsja1000_isa.c164 priv->read_reg = sja1000_isa_mem_read_reg; in sja1000_isa_probe()
171 priv->read_reg = sja1000_isa_port_read_reg_indirect; in sja1000_isa_probe()
174 priv->read_reg = sja1000_isa_port_read_reg; in sja1000_isa_probe()
239 if (priv->read_reg == sja1000_isa_port_read_reg_indirect) in sja1000_isa_remove()
/drivers/net/ethernet/intel/igb/
De1000_phy.c90 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in igb_get_phy_id()
96 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); in igb_get_phy_id()
448 ret_val = phy->ops.read_reg(hw, I82580_CFG_REG, &phy_data); in igb_copper_link_setup_82580()
462 ret_val = phy->ops.read_reg(hw, I82580_PHY_CTRL_2, &phy_data); in igb_copper_link_setup_82580()
507 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); in igb_copper_link_setup_m88()
556 ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, in igb_copper_link_setup_m88()
616 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); in igb_copper_link_setup_m88_gen2()
727 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CTRL, &data); in igb_copper_link_setup_igp()
757 ret_val = phy->ops.read_reg(hw, in igb_copper_link_setup_igp()
771 ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL, &data); in igb_copper_link_setup_igp()
[all …]
/drivers/media/pci/ivtv/
Divtv-gpio.c113 curout = read_reg(IVTV_REG_GPIO_OUT); in ivtv_reset_ir_gpio()
114 curdir = read_reg(IVTV_REG_GPIO_DIR); in ivtv_reset_ir_gpio()
137 curout = read_reg(IVTV_REG_GPIO_OUT); in ivtv_reset_tuner_gpio()
177 write_reg((read_reg(IVTV_REG_GPIO_OUT) & ~mask) | (data & mask), IVTV_REG_GPIO_OUT); in subdev_s_clock_freq()
187 if (mask == 0 || (read_reg(IVTV_REG_GPIO_IN) & mask)) in subdev_g_tuner()
218 write_reg((read_reg(IVTV_REG_GPIO_OUT) & ~mask) | (data & mask), IVTV_REG_GPIO_OUT); in subdev_s_tuner()
230 write_reg((read_reg(IVTV_REG_GPIO_OUT) & ~mask) | (data & mask), IVTV_REG_GPIO_OUT); in subdev_s_radio()
256 write_reg((read_reg(IVTV_REG_GPIO_OUT) & ~mask) | (data & mask), IVTV_REG_GPIO_OUT); in subdev_s_audio_routing()
271 write_reg((read_reg(IVTV_REG_GPIO_OUT) & ~mask) | in subdev_s_ctrl()
284 read_reg(IVTV_REG_GPIO_DIR), read_reg(IVTV_REG_GPIO_OUT), in subdev_log_status()
[all …]
Divtv-yuv.c864 yi->reg_2834 = read_reg(0x02834); in ivtv_yuv_init()
865 yi->reg_2838 = read_reg(0x02838); in ivtv_yuv_init()
866 yi->reg_283c = read_reg(0x0283c); in ivtv_yuv_init()
867 yi->reg_2840 = read_reg(0x02840); in ivtv_yuv_init()
868 yi->reg_2844 = read_reg(0x02844); in ivtv_yuv_init()
869 yi->reg_2848 = read_reg(0x02848); in ivtv_yuv_init()
870 yi->reg_2854 = read_reg(0x02854); in ivtv_yuv_init()
871 yi->reg_285c = read_reg(0x0285c); in ivtv_yuv_init()
872 yi->reg_2864 = read_reg(0x02864); in ivtv_yuv_init()
873 yi->reg_2870 = read_reg(0x02870); in ivtv_yuv_init()
[all …]
Divtv-irq.c435 write_reg_sync(read_reg(IVTV_REG_DMAXFER) | 0x02, IVTV_REG_DMAXFER); in ivtv_dma_enc_start_xfer()
451 write_reg_sync(read_reg(IVTV_REG_DMAXFER) | 0x01, IVTV_REG_DMAXFER); in ivtv_dma_dec_start_xfer()
554 if (read_reg(IVTV_REG_DMASTATUS) & 0x14) { in ivtv_irq_dma_read()
556 read_reg(IVTV_REG_DMASTATUS), in ivtv_irq_dma_read()
558 write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS); in ivtv_irq_dma_read()
621 write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS); in ivtv_irq_enc_dma_complete()
686 status = read_reg(IVTV_REG_DMASTATUS); in ivtv_irq_dma_err()
841 unsigned int frame = read_reg(IVTV_REG_DEC_LINE_FIELD) & 1; in ivtv_irq_vsync()
938 stat = read_reg(IVTV_REG_IRQSTATUS); in ivtv_irq_handler()
952 (read_reg(IVTV_REG_DEC_LINE_FIELD) & 1)) { in ivtv_irq_handler()
[all …]
/drivers/macintosh/
Dtherm_windtunnel.c138 read_reg( struct i2c_client *cl, int reg, int len ) in read_reg() function
173 temp = read_reg( x.thermostat, 0, 2 ); in poll_temp()
179 casetemp = read_reg(x.fan, 0x0b, 1) << 8; in poll_temp()
180 casetemp |= (read_reg(x.fan, 0x06, 1) & 0x7) << 5; in poll_temp()
215 x.r0 = read_reg( x.fan, 0x00, 1 ); in setup_hardware()
216 x.r1 = read_reg( x.fan, 0x01, 1 ); in setup_hardware()
217 x.r20 = read_reg( x.fan, 0x20, 1 ); in setup_hardware()
218 x.r23 = read_reg( x.fan, 0x23, 1 ); in setup_hardware()
219 x.r25 = read_reg( x.fan, 0x25, 1 ); in setup_hardware()
222 if( (val=read_reg(x.thermostat, 1, 1)) >= 0 ) { in setup_hardware()
[all …]
Dtherm_adt746x.c110 read_reg(struct thermostat* th, int reg) in read_reg() function
133 tmp[1] = read_reg(th, addr); in read_fan_speed()
134 tmp[0] = read_reg(th, addr + 1); in read_fan_speed()
173 manual = read_reg(th, MANUAL_MODE[fan]); in write_fan_speed()
181 manual = read_reg(th, in write_fan_speed()
188 manual = read_reg(th, MANUAL_MODE[fan]); in write_fan_speed()
203 th->temps[i] = read_reg(th, TEMP_REG[i]); in read_sensors()
374 BUILD_SHOW_FUNC_INT(sensor1_temperature, (read_reg(th, TEMP_REG[1])))
375 BUILD_SHOW_FUNC_INT(sensor2_temperature, (read_reg(th, TEMP_REG[2])))
507 rc = read_reg(th, CONFIG_REG); in probe_thermostat()
[all …]
/drivers/gpio/
Dgpio-it8761e.c47 static u8 read_reg(u8 addr, u8 port) in read_reg() function
102 curr_dirs = read_reg(io_reg, port); in it8761e_gpio_direction_in()
148 curr_dirs = read_reg(io_reg, port); in it8761e_gpio_direction_out()
177 id = (read_reg(CHIP_ID_HIGH_BYTE, ports[i]) << 8) + in it8761e_gpio_init()
178 read_reg(CHIP_ID_LOW_BYTE, ports[i]); in it8761e_gpio_init()
195 gpio_ba = (read_reg(GPIO_BA_HIGH_BYTE, port) << 8) + in it8761e_gpio_init()
196 read_reg(GPIO_BA_LOW_BYTE, port); in it8761e_gpio_init()
Dgpio-generic.c142 return bgc->read_reg(bgc->reg_dat) & bgc->pin2mask(bgc, gpio); in bgpio_get()
278 bgc->read_reg = bgpio_read8; in bgpio_setup_accessors()
283 bgc->read_reg = bgpio_read16be; in bgpio_setup_accessors()
286 bgc->read_reg = bgpio_read16; in bgpio_setup_accessors()
292 bgc->read_reg = bgpio_read32be; in bgpio_setup_accessors()
295 bgc->read_reg = bgpio_read32; in bgpio_setup_accessors()
306 bgc->read_reg = bgpio_read64; in bgpio_setup_accessors()
430 bgc->data = bgc->read_reg(bgc->reg_dat); in bgpio_init()
433 bgc->data = bgc->read_reg(bgc->reg_set); in bgpio_init()
435 bgc->dir = bgc->read_reg(bgc->reg_dir); in bgpio_init()
/drivers/block/paride/
Dpt.c256 static inline int read_reg(struct pi_adapter *pi, int reg) in read_reg() function
282 s = read_reg(pi, 7); in pt_wait()
283 e = read_reg(pi, 1); in pt_wait()
284 p = read_reg(pi, 2); in pt_wait()
317 if (read_reg(pi, 2) != 1) { in pt_command()
336 if (read_reg(pi, 7) & STAT_DRQ) { in pt_completion()
337 n = (((read_reg(pi, 4) + 256 * read_reg(pi, 5)) + in pt_completion()
339 p = read_reg(pi, 2) & 3; in pt_completion()
406 s = read_reg(pi, 7); in pt_poll_dsc()
407 e = read_reg(pi, 1); in pt_poll_dsc()
[all …]
Dpg.c267 static inline int read_reg(struct pg *dev, int reg) in read_reg() function
305 s = read_reg(dev, 7); in pg_wait()
306 e = read_reg(dev, 1); in pg_wait()
307 p = read_reg(dev, 2); in pg_wait()
337 if (read_reg(dev, 2) != 1) { in pg_command()
365 while (read_reg(dev, 7) & STAT_DRQ) { in pg_completion()
366 d = (read_reg(dev, 4) + 256 * read_reg(dev, 5)); in pg_completion()
368 p = read_reg(dev, 2) & 3; in pg_completion()
404 got[i] = read_reg(dev, i + 1); in pg_reset()
Dpf.c392 static inline int read_reg(struct pf_unit *pf, int reg) in read_reg() function
412 s = read_reg(pf, 7); in pf_wait()
413 e = read_reg(pf, 1); in pf_wait()
414 p = read_reg(pf, 2); in pf_wait()
446 if (read_reg(pf, 2) != 1) { in pf_command()
464 if ((read_reg(pf, 2) & 2) && (read_reg(pf, 7) & STAT_DRQ)) { in pf_completion()
465 n = (((read_reg(pf, 4) + 256 * read_reg(pf, 5)) + in pf_completion()
552 flg &= (read_reg(pf, i + 1) == expect[i]); in pf_reset()
557 printk("%3x", read_reg(pf, i + 1)); in pf_reset()
Dpcd.c343 static inline int read_reg(struct pcd_unit *cd, int reg) in read_reg() function
363 s = read_reg(cd, 7); in pcd_wait()
364 e = read_reg(cd, 1); in pcd_wait()
365 p = read_reg(cd, 2); in pcd_wait()
397 if (read_reg(cd, 2) != 1) { in pcd_command()
419 while (read_reg(cd, 7) & IDE_DRQ) { in pcd_completion()
420 d = read_reg(cd, 4) + 256 * read_reg(cd, 5); in pcd_completion()
422 p = read_reg(cd, 2) & 3; in pcd_completion()
555 flg &= (read_reg(cd, i + 1) == expect[i]); in pcd_reset()
560 printk("%3x", read_reg(cd, i + 1)); in pcd_reset()
/drivers/mtd/onenand/
Domap2.c83 static inline unsigned short read_reg(struct omap2_onenand *c, int reg) in read_reg() function
135 intr = read_reg(c, ONENAND_REG_INTERRUPT); in omap2_onenand_wait()
139 ctrl = read_reg(c, ONENAND_REG_CTRL_STATUS); in omap2_onenand_wait()
153 syscfg = read_reg(c, ONENAND_REG_SYS_CFG1); in omap2_onenand_wait()
159 syscfg = read_reg(c, ONENAND_REG_SYS_CFG1); in omap2_onenand_wait()
166 ctrl = read_reg(c, ONENAND_REG_CTRL_STATUS); in omap2_onenand_wait()
167 intr = read_reg(c, ONENAND_REG_INTERRUPT); in omap2_onenand_wait()
180 ctrl = read_reg(c, ONENAND_REG_CTRL_STATUS); in omap2_onenand_wait()
190 intr = read_reg(c, in omap2_onenand_wait()
195 intr = read_reg(c, ONENAND_REG_INTERRUPT); in omap2_onenand_wait()
[all …]
/drivers/media/i2c/
Dtw2804.c138 static int read_reg(struct i2c_client *client, u8 reg, u8 channel) in read_reg() function
184 ctrl->val = read_reg(client, TW2804_REG_GAIN, 0); in tw2804_g_volatile_ctrl()
188 ctrl->val = read_reg(client, TW2804_REG_CHROMA_GAIN, 0); in tw2804_g_volatile_ctrl()
192 ctrl->val = read_reg(client, TW2804_REG_BLUE_BALANCE, 0); in tw2804_g_volatile_ctrl()
196 ctrl->val = read_reg(client, TW2804_REG_RED_BALANCE, 0); in tw2804_g_volatile_ctrl()
212 reg = read_reg(client, addr, state->channel); in tw2804_s_ctrl()
223 reg = read_reg(client, addr, state->channel); in tw2804_s_ctrl()
323 reg = read_reg(client, 0x22, dec->channel); in tw2804_s_video_routing()
/drivers/media/radio/
Dradio-tea5777.c232 tea->read_reg = -1; in radio_tea5777_set_freq()
242 if (tea->read_reg != -1) in radio_tea5777_update_read_reg()
256 res = tea->ops->read_reg(tea, &tea->read_reg); in radio_tea5777_update_read_reg()
323 (tea->read_reg & TEA5777_R_FM_STEREO_MASK)) in vidioc_g_tuner()
329 v->signal = (tea->read_reg & TEA5777_R_LEVEL_MASK) >> in vidioc_g_tuner()
333 tea->read_reg = -1; in vidioc_g_tuner()
476 tea->freq = (tea->read_reg & TEA5777_R_FM_PLL_MASK); in vidioc_s_hw_freq_seek()
479 if ((tea->read_reg & TEA5777_R_SFOUND_MASK)) { in vidioc_s_hw_freq_seek()
484 if (tea->read_reg & TEA5777_R_BLIM_MASK) { in vidioc_s_hw_freq_seek()
490 tea->read_reg = -1; in vidioc_s_hw_freq_seek()
Dradio-tea5777.h61 int (*read_reg)(struct radio_tea5777 *tea, u32 *val); member
76 u32 read_reg; member
/drivers/net/can/c_can/
Dc_can.c257 u32 val = priv->read_reg(priv, index); in c_can_read_reg32()
258 val |= ((u32) priv->read_reg(priv, index + 1)) << 16; in c_can_read_reg32()
265 unsigned int cntrl_save = priv->read_reg(priv, in c_can_enable_all_interrupts()
280 while (count && priv->read_reg(priv, in c_can_msg_obj_is_busy()
456 flags = priv->read_reg(priv, C_CAN_IFACE(ARB2_REG, iface)); in c_can_read_msg_object()
457 val = priv->read_reg(priv, C_CAN_IFACE(ARB1_REG, iface)) | in c_can_read_msg_object()
469 data = priv->read_reg(priv, in c_can_read_msg_object()
592 ctrl_save = priv->read_reg(priv, C_CAN_CTRL_REG); in c_can_set_bittiming()
723 reg_err_counter = priv->read_reg(priv, C_CAN_ERR_CNT_REG); in c_can_get_berr_counter()
757 stats->tx_bytes += priv->read_reg(priv, in c_can_do_tx()
[all …]
/drivers/net/ethernet/intel/ixgbe/
Dixgbe_phy.c71 hw->phy.ops.read_reg(hw, in ixgbe_identify_phy_generic()
110 status = hw->phy.ops.read_reg(hw, MDIO_DEVID1, MDIO_MMD_PMAPMD, in ixgbe_get_phy_id()
115 status = hw->phy.ops.read_reg(hw, MDIO_DEVID2, MDIO_MMD_PMAPMD, in ixgbe_get_phy_id()
189 hw->phy.ops.read_reg(hw, MDIO_CTRL1, in ixgbe_reset_phy_generic()
416 hw->phy.ops.read_reg(hw, MDIO_AN_10GBT_CTRL, in ixgbe_setup_phy_link_generic()
431 hw->phy.ops.read_reg(hw, in ixgbe_setup_phy_link_generic()
448 hw->phy.ops.read_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_setup_phy_link_generic()
463 hw->phy.ops.read_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_generic()
475 status = hw->phy.ops.read_reg(hw, MDIO_STAT1, in ixgbe_setup_phy_link_generic()
542 status = hw->phy.ops.read_reg(hw, MDIO_SPEED, MDIO_MMD_PMAPMD, in ixgbe_get_copper_link_capabilities_generic()
[all …]
Dixgbe_82598.c526 hw->phy.ops.read_reg(hw, MDIO_STAT1, MDIO_MMD_AN, &an_reg); in ixgbe_validate_link_ready()
567 hw->phy.ops.read_reg(hw, 0xC79F, MDIO_MMD_PMAPMD, &link_reg); in ixgbe_check_mac_link_82598()
568 hw->phy.ops.read_reg(hw, 0xC79F, MDIO_MMD_PMAPMD, &link_reg); in ixgbe_check_mac_link_82598()
569 hw->phy.ops.read_reg(hw, 0xC00C, MDIO_MMD_PMAPMD, in ixgbe_check_mac_link_82598()
581 hw->phy.ops.read_reg(hw, 0xC79F, in ixgbe_check_mac_link_82598()
584 hw->phy.ops.read_reg(hw, 0xC00C, in ixgbe_check_mac_link_82598()
1038 hw->phy.ops.read_reg(hw, in ixgbe_read_i2c_phy_82598()
1055 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PMA_PMD_SDA_SCL_DATA, in ixgbe_read_i2c_phy_82598()
1118 hw->phy.ops.read_reg(hw, MDIO_PMA_EXTABLE, in ixgbe_get_supported_physical_layer_82598()
1327 .read_reg = &ixgbe_read_phy_reg_generic,
/drivers/media/dvb-frontends/
Dlgdt3305.c165 #define read_reg(state, reg) \ macro
573 gen_ctrl_3 = read_reg(state, LGDT3305_GEN_CTRL_3); in lgdt3305_sleep()
574 gen_ctrl_4 = read_reg(state, LGDT3305_GEN_CTRL_4); in lgdt3305_sleep()
1009 noise = ((read_reg(state, LGDT3305_PT_MSE_1) & 0x07) << 16) | in lgdt3305_read_snr()
1010 (read_reg(state, LGDT3305_PT_MSE_2) << 8) | in lgdt3305_read_snr()
1011 (read_reg(state, LGDT3305_PT_MSE_3) & 0xff); in lgdt3305_read_snr()
1016 noise = ((read_reg(state, LGDT3305_EQ_MSE_1) & 0x0f) << 16) | in lgdt3305_read_snr()
1017 (read_reg(state, LGDT3305_EQ_MSE_2) << 8) | in lgdt3305_read_snr()
1018 (read_reg(state, LGDT3305_EQ_MSE_3) & 0xff); in lgdt3305_read_snr()
1024 noise = (read_reg(state, LGDT3305_CR_MSE_1) << 8) | in lgdt3305_read_snr()
[all …]
/drivers/ide/
Dopti621.c52 static u8 read_reg(int reg) in read_reg() function
102 read_reg(CNTRL_REG); in opti621_set_pio_mode()
105 clk = read_reg(STRAP_REG) & 1; in opti621_set_pio_mode()

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