/drivers/net/ethernet/neterion/ |
D | s2io.c | 1153 writeq(val64, &bar0->tti_data1_mem); in init_tti() 1178 writeq(val64, &bar0->tti_data2_mem); in init_tti() 1183 writeq(val64, &bar0->tti_command_mem); in init_tti() 1228 writeq(val64, &bar0->sw_reset); in init_nic() 1235 writeq(val64, &bar0->sw_reset); in init_nic() 1257 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic() 1259 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic() 1269 writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len); in init_nic() 1290 writeq(val64, &bar0->tx_fifo_partition_0); in init_nic() 1291 writeq(val64, &bar0->tx_fifo_partition_1); in init_nic() [all …]
|
/drivers/net/ethernet/neterion/vxge/ |
D | vxge-traffic.c | 51 writeq(VXGE_HW_INTR_MASK_ALL, &vp_reg->kdfcctl_errors_reg); in vxge_hw_vpath_intr_enable() 107 writeq((u32)vxge_bVALn((VXGE_HW_GENERAL_ERRORS_REG_DBLGEN_FIFO1_OVRFLOW| in vxge_hw_vpath_intr_enable() 183 writeq(VXGE_HW_INTR_MASK_ALL, &vp_reg->kdfcctl_errors_mask); in vxge_hw_vpath_intr_disable() 239 writeq(val64, &vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_TX]); in vxge_hw_vpath_tti_ci_set() 249 writeq(val64, &ring->vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_RX]); in vxge_hw_vpath_dynamic_rti_ci_set() 262 writeq(val64, &fifo->vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_TX]); in vxge_hw_vpath_dynamic_tti_rtimer_set() 278 writeq(val64, &ring->vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_RX]); in vxge_hw_vpath_dynamic_rti_rtimer_set() 388 writeq(val64, &hldev->common_reg->tim_int_status0); in vxge_hw_device_intr_enable() 390 writeq(~val64, &hldev->common_reg->tim_int_mask0); in vxge_hw_device_intr_enable() 427 writeq(VXGE_HW_INTR_MASK_ALL, &hldev->common_reg->tim_int_mask0); in vxge_hw_device_intr_disable() [all …]
|
D | vxge-config.c | 40 writeq(val64, &vp_reg->rxmac_vcfg0); in vxge_hw_vpath_set_zero_rx_frm_len() 173 writeq(*data0, &vp_reg->rts_access_steer_data0); in vxge_hw_vpath_fw_api() 174 writeq(*data1, &vp_reg->rts_access_steer_data1); in vxge_hw_vpath_fw_api() 530 writeq(VXGE_HW_SWAPPER_READ_BYTE_SWAP_ENABLE, in __vxge_hw_legacy_swapper_set() 532 writeq(VXGE_HW_SWAPPER_READ_BIT_FLAP_ENABLE, in __vxge_hw_legacy_swapper_set() 534 writeq(VXGE_HW_SWAPPER_WRITE_BYTE_SWAP_ENABLE, in __vxge_hw_legacy_swapper_set() 536 writeq(VXGE_HW_SWAPPER_WRITE_BIT_FLAP_ENABLE, in __vxge_hw_legacy_swapper_set() 541 writeq(VXGE_HW_SWAPPER_READ_BYTE_SWAP_ENABLE, in __vxge_hw_legacy_swapper_set() 543 writeq(VXGE_HW_SWAPPER_WRITE_BYTE_SWAP_ENABLE, in __vxge_hw_legacy_swapper_set() 548 writeq(VXGE_HW_SWAPPER_READ_BIT_FLAP_ENABLE, in __vxge_hw_legacy_swapper_set() [all …]
|
/drivers/char/ |
D | hpet.c | 62 #define write_counter(V, MC) writeq(V, MC) 137 #ifndef writeq 138 static inline void writeq(unsigned long long v, void __iomem *addr) in writeq() function 412 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK), in hpet_release() 426 writeq(v, &timer->hpet_config); in hpet_release() 517 writeq(v, &timer->hpet_config); in hpet_ioctl_ieon() 544 writeq(g, &timer->hpet_config); in hpet_ioctl_ieon() 595 writeq(v, &timer->hpet_config); in hpet_ioctl_common() 632 writeq(v, &timer->hpet_config); in hpet_ioctl_common() 912 writeq(mcfg, &hpet->hpet_config); in hpet_alloc()
|
/drivers/scsi/fnic/ |
D | vnic_cq.c | 61 writeq(paddr, &cq->ctrl->ring_base); in vnic_cq_init() 72 writeq(cq_message_addr, &cq->ctrl->cq_message_addr); in vnic_cq_init()
|
D | vnic_wq_copy.c | 109 writeq(paddr, &wq->ctrl->ring_base); in vnic_wq_copy_init()
|
D | vnic_dev.h | 75 static inline void writeq(u64 val, void __iomem *reg) in writeq() function
|
D | vnic_wq.c | 121 writeq(paddr, &wq->ctrl->ring_base); in vnic_wq_init()
|
D | vnic_rq.c | 122 writeq(paddr, &rq->ctrl->ring_base); in vnic_rq_init()
|
/drivers/net/ethernet/cisco/enic/ |
D | vnic_cq.c | 65 writeq(paddr, &cq->ctrl->ring_base); in vnic_cq_init() 76 writeq(cq_message_addr, &cq->ctrl->cq_message_addr); in vnic_cq_init()
|
D | vnic_dev.h | 37 static inline void writeq(u64 val, void __iomem *reg) in writeq() function
|
D | vnic_wq.c | 125 writeq(paddr, &wq->ctrl->ring_base); in vnic_wq_init_start()
|
D | vnic_rq.c | 125 writeq(paddr, &rq->ctrl->ring_base); in vnic_rq_init_start()
|
/drivers/net/ethernet/intel/ixgbe/ |
D | ixgbe_common.h | 129 #ifndef writeq 130 #define writeq(val, addr) writel((u32) (val), addr); \ macro 134 #define IXGBE_WRITE_REG64(a, reg, value) writeq((value), ((a)->hw_addr + (reg)))
|
/drivers/ntb/ |
D | ntb_hw.c | 393 writeq(addr, ndev->reg_ofs.sbar2_xlat); in ntb_set_mw_addr() 396 writeq(addr, ndev->reg_ofs.sbar4_xlat); in ntb_set_mw_addr() 416 writeq((u64) 1 << db, ndev->reg_ofs.sdb); in ntb_ring_sdb() 675 writeq((u64) 1 << db_cb->db_num, ndev->reg_ofs.pdb); in bwd_callback_msix_irq() 906 writeq(~0, ndev->reg_ofs.pdb_mask); in ntb_setup_interrupts() 938 writeq(~0, ndev->reg_ofs.pdb_mask); in ntb_free_interrupts()
|
/drivers/net/ethernet/chelsio/cxgb4vf/ |
D | adapter.h | 412 static inline void writeq(u64 val, volatile void __iomem *addr) in writeq() function 442 writeq(val, adapter->regs + reg_addr); in t4_write_reg64()
|
/drivers/scsi/csiostor/ |
D | csio_defs.h | 59 static inline void writeq(u64 val, void __iomem *addr) in writeq() function
|
/drivers/parport/ |
D | parport_ip32.c | 531 writeq(ctxval, ctxreg); in parport_ip32_dma_setup_context() 592 writeq(ctrl, &mace->perif.ctrl.parport.cntlstat); in parport_ip32_dma_start() 612 writeq(ctrl, &mace->perif.ctrl.parport.cntlstat); in parport_ip32_dma_start() 621 writeq(ctrl, &mace->perif.ctrl.parport.cntlstat); in parport_ip32_dma_start() 659 writeq(ctrl, &mace->perif.ctrl.parport.cntlstat); in parport_ip32_dma_stop() 682 writeq(ctrl, &mace->perif.ctrl.parport.cntlstat); in parport_ip32_dma_stop() 715 writeq(MACEPAR_CTLSTAT_RESET, &mace->perif.ctrl.parport.cntlstat); in parport_ip32_dma_register()
|
/drivers/infiniband/hw/qib/ |
D | qib_7220.h | 141 writeq(value, &dd->kregbase[regno]); in qib_write_kreg()
|
D | qib_sd7220.c | 1068 writeq(data, iaddr + idx); in qib_sd_setvals() 1075 writeq(data, daddr); in qib_sd_setvals() 1097 writeq(rxeq_init_vals[idx].rdesc, iaddr + didx); in qib_sd_setvals() 1103 writeq(data, taddr + (vidx << 6) + idx); in qib_sd_setvals()
|
/drivers/infiniband/hw/ipath/ |
D | ipath_diag.c | 193 writeq(data, reg_addr); in ipath_write_umem64() 468 writeq(dp.pbc_wd, piobuf); in ipath_diagpkt_write()
|
D | ipath_kernel.h | 1148 writeq(value, &ubase[regno]); in ipath_write_ureg() 1172 writeq(value, &dd->ipath_kregbase[regno]); in ipath_write_kreg() 1200 writeq(value, regno + (u64 __iomem *) in ipath_write_creg()
|
/drivers/input/misc/ |
D | sgi_btns.c | 47 writeq(status & ~(3U << 23), &mace->perif.audio.control); in button_status()
|
/drivers/char/agp/ |
D | hp-agp.c | 272 writeq(0, hp->ioc_regs+HP_ZX1_IBASE); in hp_zx1_cleanup() 286 writeq(hp->gart_base | ilog2(hp->gart_size), hp->ioc_regs+HP_ZX1_PCOM); in hp_zx1_tlbflush()
|
/drivers/base/regmap/ |
D | regmap-mmio.c | 64 writeq(*(u64 *)val, ctx->regs + offset); in regmap_mmio_gather_write()
|