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Searched refs:pcr (Results 1 – 25 of 32) sorted by relevance

12

/drivers/mfd/
Drtsx_pcr.c65 void rtsx_pci_start_run(struct rtsx_pcr *pcr) in rtsx_pci_start_run() argument
68 if (pcr->remove_pci) in rtsx_pci_start_run()
71 if (pcr->state != PDEV_STAT_RUN) { in rtsx_pci_start_run()
72 pcr->state = PDEV_STAT_RUN; in rtsx_pci_start_run()
73 if (pcr->ops->enable_auto_blink) in rtsx_pci_start_run()
74 pcr->ops->enable_auto_blink(pcr); in rtsx_pci_start_run()
77 mod_delayed_work(system_wq, &pcr->idle_work, msecs_to_jiffies(200)); in rtsx_pci_start_run()
81 int rtsx_pci_write_register(struct rtsx_pcr *pcr, u16 addr, u8 mask, u8 data) in rtsx_pci_write_register() argument
90 rtsx_pci_writel(pcr, RTSX_HAIMR, val); in rtsx_pci_write_register()
93 val = rtsx_pci_readl(pcr, RTSX_HAIMR); in rtsx_pci_write_register()
[all …]
Drts5227.c32 static int rts5227_extra_init_hw(struct rtsx_pcr *pcr) in rts5227_extra_init_hw() argument
36 rtsx_pci_init_cmd(pcr); in rts5227_extra_init_hw()
39 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02); in rts5227_extra_init_hw()
41 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x00); in rts5227_extra_init_hw()
42 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x01); in rts5227_extra_init_hw()
44 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OLT_LED_CTL, 0x0F, 0x02); in rts5227_extra_init_hw()
46 pcie_capability_read_word(pcr->pci, PCI_EXP_DEVCTL2, &cap); in rts5227_extra_init_hw()
48 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LTR_CTL, 0xFF, 0xA3); in rts5227_extra_init_hw()
50 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OBFF_CFG, 0x03, 0x03); in rts5227_extra_init_hw()
54 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, 0xFF03, 0x08, 0x08); in rts5227_extra_init_hw()
[all …]
Drts5249.c29 static u8 rts5249_get_ic_version(struct rtsx_pcr *pcr) in rts5249_get_ic_version() argument
33 rtsx_pci_read_register(pcr, DUMMY_REG_RESET_0, &val); in rts5249_get_ic_version()
37 static int rts5249_extra_init_hw(struct rtsx_pcr *pcr) in rts5249_extra_init_hw() argument
39 rtsx_pci_init_cmd(pcr); in rts5249_extra_init_hw()
42 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02); in rts5249_extra_init_hw()
44 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x00); in rts5249_extra_init_hw()
45 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x01); in rts5249_extra_init_hw()
47 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OLT_LED_CTL, 0x0F, 0x02); in rts5249_extra_init_hw()
49 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rts5249_extra_init_hw()
51 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rts5249_extra_init_hw()
[all …]
Drts5229.c29 static u8 rts5229_get_ic_version(struct rtsx_pcr *pcr) in rts5229_get_ic_version() argument
33 rtsx_pci_read_register(pcr, DUMMY_REG_RESET_0, &val); in rts5229_get_ic_version()
37 static int rts5229_extra_init_hw(struct rtsx_pcr *pcr) in rts5229_extra_init_hw() argument
39 rtsx_pci_init_cmd(pcr); in rts5229_extra_init_hw()
42 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02); in rts5229_extra_init_hw()
44 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x00); in rts5229_extra_init_hw()
45 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x01); in rts5229_extra_init_hw()
47 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OLT_LED_CTL, 0x0F, 0x02); in rts5229_extra_init_hw()
49 return rtsx_pci_send_cmd(pcr, 100); in rts5229_extra_init_hw()
52 static int rts5229_optimize_phy(struct rtsx_pcr *pcr) in rts5229_optimize_phy() argument
[all …]
Drts5209.c29 static u8 rts5209_get_ic_version(struct rtsx_pcr *pcr) in rts5209_get_ic_version() argument
33 val = rtsx_pci_readb(pcr, 0x1C); in rts5209_get_ic_version()
37 static void rts5209_init_vendor_cfg(struct rtsx_pcr *pcr) in rts5209_init_vendor_cfg() argument
41 rtsx_pci_read_config_dword(pcr, 0x724, &val); in rts5209_init_vendor_cfg()
42 dev_dbg(&(pcr->pci->dev), "Cfg 0x724: 0x%x\n", val); in rts5209_init_vendor_cfg()
46 pcr->ms_pmos = false; in rts5209_init_vendor_cfg()
48 pcr->ms_pmos = true; in rts5209_init_vendor_cfg()
52 static int rts5209_extra_init_hw(struct rtsx_pcr *pcr) in rts5209_extra_init_hw() argument
54 rtsx_pci_init_cmd(pcr); in rts5209_extra_init_hw()
57 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_GPIO, 0xFF, 0x03); in rts5209_extra_init_hw()
[all …]
Drtl8411.c30 static u8 rtl8411_get_ic_version(struct rtsx_pcr *pcr) in rtl8411_get_ic_version() argument
34 rtsx_pci_read_register(pcr, SYS_VER, &val); in rtl8411_get_ic_version()
38 static int rtl8411_extra_init_hw(struct rtsx_pcr *pcr) in rtl8411_extra_init_hw() argument
40 return rtsx_pci_write_register(pcr, CD_PAD_CTL, in rtl8411_extra_init_hw()
44 static int rtl8411_turn_on_led(struct rtsx_pcr *pcr) in rtl8411_turn_on_led() argument
46 return rtsx_pci_write_register(pcr, CARD_GPIO, 0x01, 0x00); in rtl8411_turn_on_led()
49 static int rtl8411_turn_off_led(struct rtsx_pcr *pcr) in rtl8411_turn_off_led() argument
51 return rtsx_pci_write_register(pcr, CARD_GPIO, 0x01, 0x01); in rtl8411_turn_off_led()
54 static int rtl8411_enable_auto_blink(struct rtsx_pcr *pcr) in rtl8411_enable_auto_blink() argument
56 return rtsx_pci_write_register(pcr, CARD_AUTO_BLINK, 0xFF, 0x0D); in rtl8411_enable_auto_blink()
[all …]
Drtsx_pcr.h31 void rts5209_init_params(struct rtsx_pcr *pcr);
32 void rts5229_init_params(struct rtsx_pcr *pcr);
33 void rtl8411_init_params(struct rtsx_pcr *pcr);
34 void rts5227_init_params(struct rtsx_pcr *pcr);
35 void rts5249_init_params(struct rtsx_pcr *pcr);
/drivers/mmc/host/
Drtsx_pci_sdmmc.c47 struct rtsx_pcr *pcr; member
72 rtsx_pci_write_register(host->pcr, CARD_STOP, in sd_clear_error()
79 struct rtsx_pcr *pcr = host->pcr; in sd_print_debug_regs() local
84 rtsx_pci_init_cmd(pcr); in sd_print_debug_regs()
86 rtsx_pci_add_cmd(pcr, READ_REG_CMD, i, 0, 0); in sd_print_debug_regs()
88 rtsx_pci_add_cmd(pcr, READ_REG_CMD, i, 0, 0); in sd_print_debug_regs()
89 rtsx_pci_send_cmd(pcr, 100); in sd_print_debug_regs()
91 ptr = rtsx_pci_get_cmd_data(pcr); in sd_print_debug_regs()
104 struct rtsx_pcr *pcr = host->pcr; in sd_read_data() local
118 rtsx_pci_init_cmd(pcr); in sd_read_data()
[all …]
/drivers/memstick/host/
Drtsx_pci_ms.c33 struct rtsx_pcr *pcr; member
53 rtsx_pci_write_register(host->pcr, CARD_STOP, in ms_clear_error()
61 struct rtsx_pcr *pcr = host->pcr; in ms_print_debug_regs() local
66 rtsx_pci_init_cmd(pcr); in ms_print_debug_regs()
68 rtsx_pci_add_cmd(pcr, READ_REG_CMD, i, 0, 0); in ms_print_debug_regs()
70 rtsx_pci_add_cmd(pcr, READ_REG_CMD, i, 0, 0); in ms_print_debug_regs()
71 rtsx_pci_send_cmd(pcr, 100); in ms_print_debug_regs()
73 ptr = rtsx_pci_get_cmd_data(pcr); in ms_print_debug_regs()
88 struct rtsx_pcr *pcr = host->pcr; in ms_power_on() local
91 rtsx_pci_init_cmd(pcr); in ms_power_on()
[all …]
/drivers/pinctrl/
Dpinctrl-coh901.c72 u32 pcr; member
277 val = readl(U300_PIN_REG(offset, pcr)); in u300_gpio_direction_input()
280 writel(val, U300_PIN_REG(offset, pcr)); in u300_gpio_direction_input()
294 val = readl(U300_PIN_REG(offset, pcr)); in u300_gpio_direction_output()
307 writel(val, U300_PIN_REG(offset, pcr)); in u300_gpio_direction_output()
361 drmode = readl(U300_PIN_REG(offset, pcr)); in u300_gpio_config_get()
426 val = readl(U300_PIN_REG(offset, pcr)); in u300_gpio_config_set()
431 writel(val, U300_PIN_REG(offset, pcr)); in u300_gpio_config_set()
434 val = readl(U300_PIN_REG(offset, pcr)); in u300_gpio_config_set()
439 writel(val, U300_PIN_REG(offset, pcr)); in u300_gpio_config_set()
[all …]
/drivers/video/
Dimxfb.c159 u_int pcr; member
342 u32 pcr = 0; in imxfb_check_var() local
378 pcr = (unsigned int)tmp; in imxfb_check_var()
380 if (--pcr > 0x3F) { in imxfb_check_var()
381 pcr = 0x3F; in imxfb_check_var()
383 lcd_clk / pcr); in imxfb_check_var()
388 pcr |= PCR_BPIX_18; in imxfb_check_var()
394 pcr |= PCR_BPIX_12; in imxfb_check_var()
396 pcr |= PCR_BPIX_16; in imxfb_check_var()
398 if (imxfb_mode->pcr & PCR_TFT) in imxfb_check_var()
[all …]
/drivers/atm/
Dhorizon.c2101 static int atm_pcr_check (struct atm_trafprm * tp, unsigned int pcr) { in atm_pcr_check() argument
2107 else if (tp->min_pcr && tp->min_pcr > pcr) in atm_pcr_check()
2117 else if (tp->max_pcr && tp->max_pcr != ATM_MAX_PCR && tp->max_pcr < pcr) in atm_pcr_check()
2125 pcr, tp->min_pcr, tp->pcr, tp->max_pcr); in atm_pcr_check()
2262 int pcr = atm_pcr_goal (txtp); in hrz_open() local
2264 if (!pcr) { in hrz_open()
2274 pcr = dev->tx_avail; in hrz_open()
2275 } else if (pcr < 0) { in hrz_open()
2277 pcr = -pcr; in hrz_open()
2281 error = make_rate_with_tolerance (dev, pcr, r, 10, in hrz_open()
[all …]
Diphase.c162 if (iavcc_r->pcr < dev->rate_limit) { in ia_hack_tcq()
360 srv_p->pcr = dev->LineRate; in init_abr_vc()
387 if (srv_p->pcr == 0) in ia_open_abr_vc()
389 if (srv_p->pcr > dev->LineRate) in ia_open_abr_vc()
390 srv_p->pcr = dev->LineRate; in ia_open_abr_vc()
393 if (srv_p->mcr > srv_p->pcr) in ia_open_abr_vc()
396 srv_p->icr = srv_p->pcr; in ia_open_abr_vc()
397 if ((srv_p->icr < srv_p->mcr) || (srv_p->icr > srv_p->pcr)) in ia_open_abr_vc()
429 f_abr_vc->f_pcr = cellrate_to_float(srv_p->pcr); in ia_open_abr_vc()
447 air = srv_p->pcr << (15 - srv_p->rif); in ia_open_abr_vc()
[all …]
Dfirestream.c984 int pcr = atm_pcr_goal (txtp); in fs_open() local
986 fs_dprintk (FS_DEBUG_OPEN, "pcr = %d.\n", pcr); in fs_open()
991 if (pcr > 51840000/53/8) pcr = 51840000/53/8; in fs_open()
993 if (pcr > 155520000/53/8) pcr = 155520000/53/8; in fs_open()
995 if (!pcr) { in fs_open()
1000 if (pcr < 0) { in fs_open()
1002 pcr = -pcr; in fs_open()
1006 error = make_rate (pcr, r, &tmc0, NULL); in fs_open()
1012 fs_dprintk (FS_DEBUG_OPEN, "pcr = %d.\n", pcr); in fs_open()
Dzatm.c786 static int alloc_shaper(struct atm_dev *dev,int *pcr,int min,int max,int ubr) in alloc_shaper() argument
803 *pcr = 0; in alloc_shaper()
832 *pcr = i*ATM_OC3_PCR/m; in alloc_shaper()
834 if ((min && *pcr < min) || (max && *pcr > max)) return -EINVAL; in alloc_shaper()
835 if (zatm_dev->tx_bw < *pcr) return -EAGAIN; in alloc_shaper()
836 zatm_dev->tx_bw -= *pcr; in alloc_shaper()
839 DPRINTK("i = %d, m = %d, PCR = %d\n",i,m,*pcr); in alloc_shaper()
940 int uninitialized_var(pcr); in open_tx_first()
943 if ((zatm_vcc->shaper = alloc_shaper(vcc->dev,&pcr, in open_tx_first()
949 if (pcr > ATM_OC3_PCR) pcr = ATM_OC3_PCR; in open_tx_first()
[all …]
Dambassador.c1061 int pcr = atm_pcr_goal (txtp); in amb_open() local
1062 if (!pcr) { in amb_open()
1069 if (pcr < 0) { in amb_open()
1071 pcr = -pcr; in amb_open()
1075 error = make_rate (pcr, r, &tx_rate_bits, NULL); in amb_open()
1085 pcr = atm_pcr_goal (txtp); in amb_open()
1086 PRINTD (DBG_QOS, "pcr goal = %d", pcr); in amb_open()
1125 pcr = atm_pcr_goal (rxtp); in amb_open()
1126 PRINTD (DBG_QOS, "pcr goal = %d", pcr); in amb_open()
Deni.c1247 static int comp_tx(struct eni_dev *eni_dev,int *pcr,int reserved,int *pre, in comp_tx() argument
1255 if (*pcr > 0) { in comp_tx()
1259 if (TS_CLOCK/pre_div[*pre]/64 <= *pcr) break; in comp_tx()
1260 div = pre_div[*pre]**pcr; in comp_tx()
1267 if (!*pcr) *pcr = eni_dev->tx_bw+reserved; in comp_tx()
1269 if (TS_CLOCK/pre_div[*pre]/64 > -*pcr) break; in comp_tx()
1271 div = pre_div[*pre]*-*pcr; in comp_tx()
1278 *pcr = TS_CLOCK/pre_div[*pre]/(*res+1); in comp_tx()
1279 DPRINTK("out pcr: %d (%d:%d)\n",*pcr,*pre,*res); in comp_tx()
1309 txtp->pcr = ATM_OC3_PCR; in reserve_or_set_tx()
[all …]
Diphase.h212 u32 pcr; member
250 u_short pcr; member
811 u32 pcr; /* Peak Cell Rate (24-bit) */ member
Dlanai.c2090 int x, icg, pcr = atm_pcr_goal(&qos->txtp); in pcr_to_cbricg() local
2091 if (pcr == 0) /* Use maximum bandwidth */ in pcr_to_cbricg()
2093 if (pcr < 0) { in pcr_to_cbricg()
2095 pcr = -pcr; in pcr_to_cbricg()
2097 x = pcr * 27; in pcr_to_cbricg()
2105 pcr, rounddown ? 'Y' : 'N', icg); in pcr_to_cbricg()
/drivers/media/platform/omap3isp/
Disph3a_af.c42 u32 pcr; in h3a_af_setup_regs() local
117 pcr = conf->rgb_pos << AF_RGBPOS_SHIFT; in h3a_af_setup_regs()
120 pcr |= AF_FVMODE; in h3a_af_setup_regs()
123 pcr |= AF_ALAW_EN; in h3a_af_setup_regs()
127 pcr |= AF_MED_EN; in h3a_af_setup_regs()
129 pcr |= conf->hmf.threshold << AF_MED_TH_SHIFT; in h3a_af_setup_regs()
133 AF_PCR_MASK, pcr); in h3a_af_setup_regs()
Disph3a_aewb.c41 u32 pcr; in h3a_aewb_setup_regs() local
57 pcr = conf->saturation_limit << ISPH3A_PCR_AEW_AVE2LMT_SHIFT; in h3a_aewb_setup_regs()
58 pcr |= !!conf->alaw_enable << ISPH3A_PCR_AEW_ALAW_EN_SHIFT; in h3a_aewb_setup_regs()
83 ISPH3A_PCR_AEW_MASK, pcr); in h3a_aewb_setup_regs()
/drivers/tty/serial/
Dsunsab.h36 u8 pcr; /* Port Configuration Register */ member
72 u8 pcr; member
108 u8 pcr; member
/drivers/net/wan/
Dn2.c342 u8 cnt, pcr; in n2_run() local
421 pcr = PCR_ENWIN | PCR_VPM | (USE_BUS16BITS ? PCR_BUS16 : 0); in n2_run()
422 outb(pcr, io + N2_PCR); in n2_run()
446 pcr |= PCR_RUNSCA; /* run SCA */ in n2_run()
447 outb(pcr, io + N2_PCR); in n2_run()
/drivers/scsi/qla2xxx/
Dqla_dbg.c646 WRT_REG_WORD(&reg->pcr, 0x2000); in qla2300_fw_dump()
649 WRT_REG_WORD(&reg->pcr, 0x2200); in qla2300_fw_dump()
652 WRT_REG_WORD(&reg->pcr, 0x2400); in qla2300_fw_dump()
655 WRT_REG_WORD(&reg->pcr, 0x2600); in qla2300_fw_dump()
658 WRT_REG_WORD(&reg->pcr, 0x2800); in qla2300_fw_dump()
661 WRT_REG_WORD(&reg->pcr, 0x2A00); in qla2300_fw_dump()
664 WRT_REG_WORD(&reg->pcr, 0x2C00); in qla2300_fw_dump()
667 WRT_REG_WORD(&reg->pcr, 0x2E00); in qla2300_fw_dump()
801 WRT_REG_WORD(&reg->pcr, 0x2000); in qla2100_fw_dump()
804 WRT_REG_WORD(&reg->pcr, 0x2100); in qla2100_fw_dump()
[all …]
/drivers/spi/
Dspi-au1550.c157 u32 pcr; in au1550_spi_reset_fifos() local
162 pcr = hw->regs->psc_spipcr; in au1550_spi_reset_fifos()
164 } while (pcr != 0); in au1550_spi_reset_fifos()

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