/arch/arm/nwfpe/ |
D | fpopcode.h | 204 #define getCoprocessorNumber(opcode) ((opcode & MASK_COPROCESSOR) >> 8) argument 207 #define getOffset(opcode) (opcode & MASK_OFFSET) argument 210 #define TEST_OPCODE(opcode,mask) (((opcode) & (mask)) == (mask)) argument 212 #define LOAD_OP(opcode) TEST_OPCODE((opcode),MASK_CPDT | BIT_LOAD) argument 213 #define STORE_OP(opcode) ((opcode & (MASK_CPDT | BIT_LOAD)) == MASK_CPDT) argument 215 #define LDF_OP(opcode) (LOAD_OP(opcode) && (getCoprocessorNumber(opcode) == 1)) argument 216 #define LFM_OP(opcode) (LOAD_OP(opcode) && (getCoprocessorNumber(opcode) == 2)) argument 217 #define STF_OP(opcode) (STORE_OP(opcode) && (getCoprocessorNumber(opcode) == 1)) argument 218 #define SFM_OP(opcode) (STORE_OP(opcode) && (getCoprocessorNumber(opcode) == 2)) argument 220 #define PREINDEXED(opcode) ((opcode & BIT_PREINDEX) != 0) argument [all …]
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D | fpa11_cpdt.c | 224 unsigned int PerformLDF(const unsigned int opcode) in PerformLDF() argument 227 unsigned int nRc = 1, write_back = WRITE_BACK(opcode); in PerformLDF() 229 pBase = (unsigned int __user *) readRegister(getRn(opcode)); in PerformLDF() 230 if (REG_PC == getRn(opcode)) { in PerformLDF() 236 if (BIT_UP_SET(opcode)) in PerformLDF() 237 pFinal += getOffset(opcode); in PerformLDF() 239 pFinal -= getOffset(opcode); in PerformLDF() 241 if (PREINDEXED(opcode)) in PerformLDF() 246 switch (opcode & MASK_TRANSFER_LENGTH) { in PerformLDF() 248 loadSingle(getFd(opcode), pAddress); in PerformLDF() [all …]
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D | fpa11_cprt.c | 30 unsigned int PerformFLT(const unsigned int opcode); 31 unsigned int PerformFIX(const unsigned int opcode); 33 static unsigned int PerformComparison(const unsigned int opcode); 35 unsigned int EmulateCPRT(const unsigned int opcode) in EmulateCPRT() argument 38 if (opcode & 0x800000) { in EmulateCPRT() 43 return PerformComparison(opcode); in EmulateCPRT() 47 switch ((opcode & 0x700000) >> 20) { in EmulateCPRT() 49 return PerformFLT(opcode); in EmulateCPRT() 52 return PerformFIX(opcode); in EmulateCPRT() 56 writeFPSR(readRegister(getRd(opcode))); in EmulateCPRT() [all …]
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D | fpa11.c | 47 int8 SetRoundingMode(const unsigned int opcode) in SetRoundingMode() argument 49 switch (opcode & MASK_ROUNDING_MODE) { in SetRoundingMode() 65 int8 SetRoundingPrecision(const unsigned int opcode) in SetRoundingPrecision() argument 68 switch (opcode & MASK_ROUNDING_PRECISION) { in SetRoundingPrecision() 97 unsigned int EmulateAll(unsigned int opcode) in EmulateAll() argument 102 printk("NWFPE: emulating opcode %08x\n", opcode); in EmulateAll() 104 code = opcode & 0x00000f00; in EmulateAll() 107 code = opcode & 0x0e000000; in EmulateAll() 109 if (opcode & 0x00000010) { in EmulateAll() 113 return EmulateCPRT(opcode); in EmulateAll() [all …]
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D | fpa11_cpdo.c | 26 unsigned int SingleCPDO(struct roundingData *roundData, const unsigned int opcode, FPREG * rFd); 27 unsigned int DoubleCPDO(struct roundingData *roundData, const unsigned int opcode, FPREG * rFd); 28 unsigned int ExtendedCPDO(struct roundingData *roundData, const unsigned int opcode, FPREG * rFd); 30 unsigned int EmulateCPDO(const unsigned int opcode) in EmulateCPDO() argument 39 nDest = getDestinationSize(opcode); in EmulateCPDO() 43 roundData.mode = SetRoundingMode(opcode); in EmulateCPDO() 44 roundData.precision = SetRoundingPrecision(opcode); in EmulateCPDO() 52 if (MONADIC_INSTRUCTION(opcode)) in EmulateCPDO() 55 nType = fpa11->fType[getFn(opcode)]; in EmulateCPDO() 57 if (!CONSTANT_FM(opcode)) { in EmulateCPDO() [all …]
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D | fpa11.h | 97 extern unsigned int EmulateAll(unsigned int opcode); 99 extern unsigned int EmulateCPDT(const unsigned int opcode); 100 extern unsigned int EmulateCPDO(const unsigned int opcode); 101 extern unsigned int EmulateCPRT(const unsigned int opcode); 104 extern unsigned int PerformLDF(const unsigned int opcode); 105 extern unsigned int PerformSTF(const unsigned int opcode); 106 extern unsigned int PerformLFM(const unsigned int opcode); 107 extern unsigned int PerformSFM(const unsigned int opcode); 112 const unsigned int opcode, FPREG * rFd); 115 const unsigned int opcode, FPREG * rFd); [all …]
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/arch/powerpc/include/asm/ |
D | trace.h | 62 TP_PROTO(unsigned long opcode, unsigned long *args), 64 TP_ARGS(opcode, args), 67 __field(unsigned long, opcode) 71 __entry->opcode = opcode; 74 TP_printk("opcode=%lu", __entry->opcode), 81 TP_PROTO(unsigned long opcode, unsigned long retval, 84 TP_ARGS(opcode, retval, retbuf), 87 __field(unsigned long, opcode) 92 __entry->opcode = opcode; 96 TP_printk("opcode=%lu retval=%lu", __entry->opcode, __entry->retval), [all …]
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/arch/s390/kernel/ |
D | traps.c | 185 __u8 opcode[6]; in illegal_op() local 193 if (get_user(*((__u16 *) opcode), (__u16 __user *) location)) in illegal_op() 195 if (*((__u16 *) opcode) == S390_BREAKPOINT_U16) { in illegal_op() 205 } else if (*((__u16 *) opcode) == UPROBE_SWBP_INSN) { in illegal_op() 209 } else if (opcode[0] == 0xb3) { in illegal_op() 210 if (get_user(*((__u16 *) (opcode+2)), location+1)) in illegal_op() 212 signal = math_emu_b3(opcode, regs); in illegal_op() 213 } else if (opcode[0] == 0xed) { in illegal_op() 214 if (get_user(*((__u32 *) (opcode+2)), in illegal_op() 217 signal = math_emu_ed(opcode, regs); in illegal_op() [all …]
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/arch/c6x/kernel/ |
D | module.c | 19 u32 opcode; in fixup_pcr() local 26 opcode = *ip; in fixup_pcr() 27 opcode &= ~(mask << shift); in fixup_pcr() 28 opcode |= ((delta & mask) << shift); in fixup_pcr() 29 *ip = opcode; in fixup_pcr() 32 maskbits, ip, (void *)dest, opcode); in fixup_pcr() 53 u32 *location, opcode; in apply_relocate_add() local 88 opcode = *location; in apply_relocate_add() 89 opcode &= ~0x7fff80; in apply_relocate_add() 90 opcode |= ((v & 0xffff) << 7); in apply_relocate_add() [all …]
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/arch/sh/kernel/ |
D | traps_64.c | 39 insn_size_t opcode; in read_opcode() local 48 get_user_error = __get_user(opcode, (insn_size_t *)aligned_pc); in read_opcode() 49 *result_opcode = opcode; in read_opcode() 84 insn_size_t opcode, in generate_and_check_address() argument 99 basereg = (opcode >> 20) & 0x3f; in generate_and_check_address() 103 displacement = (opcode >> 10) & 0x3ff; in generate_and_check_address() 109 offsetreg = (opcode >> 10) & 0x3f; in generate_and_check_address() 132 unaligned_fixups_notify(current, opcode, regs); in generate_and_check_address() 166 insn_size_t opcode, in misaligned_load() argument 176 error = generate_and_check_address(regs, opcode, in misaligned_load() [all …]
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D | kprobes.c | 45 kprobe_opcode_t opcode = *(kprobe_opcode_t *) (p->addr); in arch_prepare_kprobe() local 47 if (OPCODE_RTE(opcode)) in arch_prepare_kprobe() 50 p->opcode = opcode; in arch_prepare_kprobe() 58 p->opcode = *p->addr; in arch_copy_kprobe() 70 *p->addr = p->opcode; in arch_disarm_kprobe() 112 saved->opcode = 0; in arch_remove_kprobe() 119 saved->opcode = 0; in arch_remove_kprobe() 159 if (OPCODE_JSR(p->opcode) || OPCODE_JMP(p->opcode)) { in prepare_singlestep() 160 unsigned int reg_nr = ((p->opcode >> 8) & 0x000F); in prepare_singlestep() 162 } else if (OPCODE_BRA(p->opcode) || OPCODE_BSR(p->opcode)) { in prepare_singlestep() [all …]
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/arch/blackfin/kernel/ |
D | trace.c | 274 static void decode_ProgCtrl_0(unsigned int opcode) in decode_ProgCtrl_0() argument 276 int poprnd = ((opcode >> ProgCtrl_poprnd_bits) & ProgCtrl_poprnd_mask); in decode_ProgCtrl_0() 277 int prgfunc = ((opcode >> ProgCtrl_prgfunc_bits) & ProgCtrl_prgfunc_mask); in decode_ProgCtrl_0() 316 pr_cont("0x%04x", opcode); in decode_ProgCtrl_0() 330 static void decode_BRCC_0(unsigned int opcode) in decode_BRCC_0() argument 332 int B = ((opcode >> BRCC_B_bits) & BRCC_B_mask); in decode_BRCC_0() 333 int T = ((opcode >> BRCC_T_bits) & BRCC_T_mask); in decode_BRCC_0() 346 static void decode_CALLa_0(unsigned int opcode) in decode_CALLa_0() argument 348 int S = ((opcode >> (CALLa_S_bits - 16)) & CALLa_S_mask); in decode_CALLa_0() 372 static void decode_LoopSetup_0(unsigned int opcode) in decode_LoopSetup_0() argument [all …]
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D | pseudodbg.c | 106 bool execute_pseudodbg_assert(struct pt_regs *fp, unsigned int opcode) in execute_pseudodbg_assert() argument 108 int expected = ((opcode >> PseudoDbg_Assert_expected_bits) & PseudoDbg_Assert_expected_mask); in execute_pseudodbg_assert() 109 int dbgop = ((opcode >> (PseudoDbg_Assert_dbgop_bits)) & PseudoDbg_Assert_dbgop_mask); in execute_pseudodbg_assert() 110 int grp = ((opcode >> (PseudoDbg_Assert_grp_bits)) & PseudoDbg_Assert_grp_mask); in execute_pseudodbg_assert() 111 int regtest = ((opcode >> (PseudoDbg_Assert_regtest_bits)) & PseudoDbg_Assert_regtest_mask); in execute_pseudodbg_assert() 114 if ((opcode & 0xFF000000) != PseudoDbg_Assert_opcode) in execute_pseudodbg_assert() 158 bool execute_pseudodbg(struct pt_regs *fp, unsigned int opcode) in execute_pseudodbg() argument 163 if ((opcode & 0xFF000000) != PseudoDbg_opcode) in execute_pseudodbg() 166 opcode >>= 16; in execute_pseudodbg() 167 grp = ((opcode >> PseudoDbg_grp_bits) & PseudoDbg_reg_mask); in execute_pseudodbg() [all …]
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D | dumpstack.c | 21 unsigned int opcode; in is_bfin_call() local 23 if (!get_instruction(&opcode, addr)) in is_bfin_call() 26 if ((opcode >= 0x0060 && opcode <= 0x0067) || in is_bfin_call() 27 (opcode >= 0x0070 && opcode <= 0x0077) || in is_bfin_call() 28 (opcode >= 0xE3000000 && opcode <= 0xE3FFFFFF)) in is_bfin_call()
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/arch/x86/mm/ |
D | pf_in.c | 119 static int get_opcode(unsigned char *addr, unsigned int *opcode) in get_opcode() argument 125 *opcode = *(unsigned short *)addr; in get_opcode() 128 *opcode = *addr; in get_opcode() 135 #define CHECK_OP_TYPE(opcode, array, type) \ argument 137 if (array[i] == opcode) { \ 145 unsigned int opcode; in get_ins_type() local 153 p += get_opcode(p, &opcode); in get_ins_type() 155 CHECK_OP_TYPE(opcode, reg_rop, REG_READ); in get_ins_type() 156 CHECK_OP_TYPE(opcode, reg_wop, REG_WRITE); in get_ins_type() 157 CHECK_OP_TYPE(opcode, imm_wop, IMM_WRITE); in get_ins_type() [all …]
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/arch/powerpc/xmon/ |
D | ppc-dis.c | 33 const struct powerpc_opcode *opcode; in print_insn_powerpc() local 57 for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++) in print_insn_powerpc() 66 table_op = PPC_OP (opcode->opcode); in print_insn_powerpc() 72 if ((insn & opcode->mask) != opcode->opcode in print_insn_powerpc() 73 || (opcode->flags & dialect) == 0) in print_insn_powerpc() 80 for (opindex = opcode->operands; *opindex != 0; opindex++) in print_insn_powerpc() 90 printf("%s", opcode->name); in print_insn_powerpc() 91 if (opcode->operands[0] != 0) in print_insn_powerpc() 97 for (opindex = opcode->operands; *opindex != 0; opindex++) in print_insn_powerpc()
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/arch/s390/math-emu/ |
D | math.c | 1615 int math_emu_b3(__u8 *opcode, struct pt_regs * regs) { in math_emu_b3() argument 1657 switch (format_table[opcode[1]]) { in math_emu_b3() 1659 if (opcode[3] & 0x22) in math_emu_b3() 1661 emu_store_regd((opcode[3] >> 4) & 15); in math_emu_b3() 1662 emu_store_regd(((opcode[3] >> 4) & 15) + 2); in math_emu_b3() 1663 emu_store_regd(opcode[3] & 15); in math_emu_b3() 1664 emu_store_regd((opcode[3] & 15) + 2); in math_emu_b3() 1667 jump_table[opcode[1]]) in math_emu_b3() 1668 (regs, opcode[3] >> 4, opcode[3] & 15); in math_emu_b3() 1669 emu_load_regd((opcode[3] >> 4) & 15); in math_emu_b3() [all …]
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/arch/x86/lib/ |
D | inat.c | 27 insn_attr_t inat_get_opcode_attribute(insn_byte_t opcode) in inat_get_opcode_attribute() argument 29 return inat_primary_table[opcode]; in inat_get_opcode_attribute() 40 insn_attr_t inat_get_escape_attribute(insn_byte_t opcode, int lpfx_id, in inat_get_escape_attribute() argument 51 if (inat_has_variant(table[opcode]) && lpfx_id) { in inat_get_escape_attribute() 56 return table[opcode]; in inat_get_escape_attribute() 79 insn_attr_t inat_get_avx_attribute(insn_byte_t opcode, insn_byte_t vex_m, in inat_get_avx_attribute() argument 89 if (!inat_is_group(table[opcode]) && vex_p) { in inat_get_avx_attribute() 95 return table[opcode]; in inat_get_avx_attribute()
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/arch/mips/include/uapi/asm/ |
D | inst.h | 538 __BITFIELD_FIELD(unsigned int opcode : 6, /* Jump format */ 544 __BITFIELD_FIELD(unsigned int opcode : 6, 552 __BITFIELD_FIELD(unsigned int opcode : 6, 560 __BITFIELD_FIELD(unsigned int opcode : 6, 569 __BITFIELD_FIELD(unsigned int opcode : 6, 579 __BITFIELD_FIELD(unsigned int opcode : 6, 589 __BITFIELD_FIELD(unsigned int opcode : 6, 600 __BITFIELD_FIELD(unsigned int opcode : 6, 611 __BITFIELD_FIELD(unsigned int opcode : 6, 618 __BITFIELD_FIELD(unsigned int opcode : 6, [all …]
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/arch/mn10300/mm/ |
D | misalignment.c | 44 unsigned params, unsigned opcode, 50 unsigned opcode, unsigned long disp, 53 static void misalignment_MOV_Lcc(struct pt_regs *regs, uint32_t opcode); 154 u_int32_t opcode; member 325 uint32_t opcode, noc, xo, xm; in misalignment() local 351 opcode = byte; in misalignment() 355 npop = ilog2(pop->opcode | pop->opmask); in misalignment() 362 if ((opcode & pop->opmask) == pop->opcode) in misalignment() 365 xo = pop->opcode >> (npop - noc); in misalignment() 368 if ((opcode & xm) != xo) in misalignment() [all …]
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/arch/x86/include/asm/ |
D | iosf_mbi.h | 89 int iosf_mbi_read(u8 port, u8 opcode, u32 offset, u32 *mdr); 101 int iosf_mbi_write(u8 port, u8 opcode, u32 offset, u32 mdr); 114 int iosf_mbi_modify(u8 port, u8 opcode, u32 offset, u32 mdr, u32 mask); 124 int iosf_mbi_read(u8 port, u8 opcode, u32 offset, u32 *mdr) in iosf_mbi_read() argument 131 int iosf_mbi_write(u8 port, u8 opcode, u32 offset, u32 mdr) in iosf_mbi_write() argument 138 int iosf_mbi_modify(u8 port, u8 opcode, u32 offset, u32 mdr, u32 mask) in iosf_mbi_modify() argument
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/arch/arm/kernel/ |
D | probes-arm.h | 56 void __kprobes simulate_bbl(probes_opcode_t opcode, 58 void __kprobes simulate_blx1(probes_opcode_t opcode, 60 void __kprobes simulate_blx2bx(probes_opcode_t opcode, 62 void __kprobes simulate_mrs(probes_opcode_t opcode, 64 void __kprobes simulate_mov_ipsp(probes_opcode_t opcode,
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/arch/x86/kernel/kprobes/ |
D | core.c | 168 kprobe_opcode_t opcode; in can_boost() local 177 opcode = *(opcodes++); in can_boost() 180 if (opcode == 0x0f) { in can_boost() 187 switch (opcode & 0xf0) { in can_boost() 193 if (0x63 < opcode && opcode < 0x67) in can_boost() 196 return (opcode != 0x62 && opcode != 0x67); in can_boost() 201 return (0xc1 < opcode && opcode < 0xcc) || opcode == 0xcf; in can_boost() 204 return (opcode == 0xd4 || opcode == 0xd5 || opcode == 0xd7); in can_boost() 207 return ((opcode & 0x04) || opcode == 0xea); in can_boost() 209 if ((opcode & 0x0c) == 0 && opcode != 0xf1) in can_boost() [all …]
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/arch/powerpc/platforms/powernv/ |
D | opal-tracepoints.c | 44 void __trace_opal_entry(unsigned long opcode, unsigned long *args) in __trace_opal_entry() argument 58 trace_opal_entry(opcode, args); in __trace_opal_entry() 65 void __trace_opal_exit(long opcode, unsigned long retval) in __trace_opal_exit() argument 78 trace_opal_exit(opcode, retval); in __trace_opal_exit()
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/arch/x86/kernel/cpu/ |
D | perf_event_p4.c | 23 unsigned int opcode; /* Event code and ESCR selector */ member 73 .opcode = P4_OPCODE(P4_EVENT_TC_DELIVER_MODE), 87 .opcode = P4_OPCODE(P4_EVENT_BPU_FETCH_REQUEST), 94 .opcode = P4_OPCODE(P4_EVENT_ITLB_REFERENCE), 103 .opcode = P4_OPCODE(P4_EVENT_MEMORY_CANCEL), 111 .opcode = P4_OPCODE(P4_EVENT_MEMORY_COMPLETE), 119 .opcode = P4_OPCODE(P4_EVENT_LOAD_PORT_REPLAY), 126 .opcode = P4_OPCODE(P4_EVENT_STORE_PORT_REPLAY), 133 .opcode = P4_OPCODE(P4_EVENT_MOB_LOAD_REPLAY), 143 .opcode = P4_OPCODE(P4_EVENT_PAGE_WALK_TYPE), [all …]
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